spi-topcliff-pch: supports a spi mode setup and bit order setup by IO control
[zen-stable.git] / arch / arm / plat-omap / devices.c
blob60278f47c0bdd71953cc5c1483a68a7a02a0b50f
1 /*
2 * linux/arch/arm/plat-omap/devices.c
4 * Common platform device setup/initialization for OMAP1 and OMAP2
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
11 #include <linux/gpio.h>
12 #include <linux/module.h>
13 #include <linux/kernel.h>
14 #include <linux/init.h>
15 #include <linux/platform_device.h>
16 #include <linux/io.h>
17 #include <linux/slab.h>
18 #include <linux/memblock.h>
20 #include <mach/hardware.h>
21 #include <asm/mach-types.h>
22 #include <asm/mach/map.h>
23 #include <asm/memblock.h>
25 #include <plat/tc.h>
26 #include <plat/board.h>
27 #include <plat/mmc.h>
28 #include <plat/menelaus.h>
29 #include <plat/omap44xx.h>
31 #if defined(CONFIG_MMC_OMAP) || defined(CONFIG_MMC_OMAP_MODULE) || \
32 defined(CONFIG_MMC_OMAP_HS) || defined(CONFIG_MMC_OMAP_HS_MODULE)
34 #define OMAP_MMC_NR_RES 2
37 * Register MMC devices. Called from mach-omap1 and mach-omap2 device init.
39 int __init omap_mmc_add(const char *name, int id, unsigned long base,
40 unsigned long size, unsigned int irq,
41 struct omap_mmc_platform_data *data)
43 struct platform_device *pdev;
44 struct resource res[OMAP_MMC_NR_RES];
45 int ret;
47 pdev = platform_device_alloc(name, id);
48 if (!pdev)
49 return -ENOMEM;
51 memset(res, 0, OMAP_MMC_NR_RES * sizeof(struct resource));
52 res[0].start = base;
53 res[0].end = base + size - 1;
54 res[0].flags = IORESOURCE_MEM;
55 res[1].start = res[1].end = irq;
56 res[1].flags = IORESOURCE_IRQ;
58 ret = platform_device_add_resources(pdev, res, ARRAY_SIZE(res));
59 if (ret == 0)
60 ret = platform_device_add_data(pdev, data, sizeof(*data));
61 if (ret)
62 goto fail;
64 ret = platform_device_add(pdev);
65 if (ret)
66 goto fail;
68 /* return device handle to board setup code */
69 data->dev = &pdev->dev;
70 return 0;
72 fail:
73 platform_device_put(pdev);
74 return ret;
77 #endif
79 /*-------------------------------------------------------------------------*/
81 #if defined(CONFIG_HW_RANDOM_OMAP) || defined(CONFIG_HW_RANDOM_OMAP_MODULE)
83 #ifdef CONFIG_ARCH_OMAP2
84 #define OMAP_RNG_BASE 0x480A0000
85 #else
86 #define OMAP_RNG_BASE 0xfffe5000
87 #endif
89 static struct resource rng_resources[] = {
91 .start = OMAP_RNG_BASE,
92 .end = OMAP_RNG_BASE + 0x4f,
93 .flags = IORESOURCE_MEM,
97 static struct platform_device omap_rng_device = {
98 .name = "omap_rng",
99 .id = -1,
100 .num_resources = ARRAY_SIZE(rng_resources),
101 .resource = rng_resources,
104 static void omap_init_rng(void)
106 (void) platform_device_register(&omap_rng_device);
108 #else
109 static inline void omap_init_rng(void) {}
110 #endif
112 /*-------------------------------------------------------------------------*/
114 /* Numbering for the SPI-capable controllers when used for SPI:
115 * spi = 1
116 * uwire = 2
117 * mmc1..2 = 3..4
118 * mcbsp1..3 = 5..7
121 #if defined(CONFIG_SPI_OMAP_UWIRE) || defined(CONFIG_SPI_OMAP_UWIRE_MODULE)
123 #define OMAP_UWIRE_BASE 0xfffb3000
125 static struct resource uwire_resources[] = {
127 .start = OMAP_UWIRE_BASE,
128 .end = OMAP_UWIRE_BASE + 0x20,
129 .flags = IORESOURCE_MEM,
133 static struct platform_device omap_uwire_device = {
134 .name = "omap_uwire",
135 .id = -1,
136 .num_resources = ARRAY_SIZE(uwire_resources),
137 .resource = uwire_resources,
140 static void omap_init_uwire(void)
142 /* FIXME define and use a boot tag; not all boards will be hooking
143 * up devices to the microwire controller, and multi-board configs
144 * mean that CONFIG_SPI_OMAP_UWIRE may be configured anyway...
147 /* board-specific code must configure chipselects (only a few
148 * are normally used) and SCLK/SDI/SDO (each has two choices).
150 (void) platform_device_register(&omap_uwire_device);
152 #else
153 static inline void omap_init_uwire(void) {}
154 #endif
156 #if defined(CONFIG_TIDSPBRIDGE) || defined(CONFIG_TIDSPBRIDGE_MODULE)
158 static phys_addr_t omap_dsp_phys_mempool_base;
160 void __init omap_dsp_reserve_sdram_memblock(void)
162 phys_addr_t size = CONFIG_TIDSPBRIDGE_MEMPOOL_SIZE;
163 phys_addr_t paddr;
165 if (!size)
166 return;
168 paddr = arm_memblock_steal(size, SZ_1M);
169 if (!paddr) {
170 pr_err("%s: failed to reserve %x bytes\n",
171 __func__, size);
172 return;
175 omap_dsp_phys_mempool_base = paddr;
178 phys_addr_t omap_dsp_get_mempool_base(void)
180 return omap_dsp_phys_mempool_base;
182 EXPORT_SYMBOL(omap_dsp_get_mempool_base);
183 #endif
186 * This gets called after board-specific INIT_MACHINE, and initializes most
187 * on-chip peripherals accessible on this board (except for few like USB):
189 * (a) Does any "standard config" pin muxing needed. Board-specific
190 * code will have muxed GPIO pins and done "nonstandard" setup;
191 * that code could live in the boot loader.
192 * (b) Populating board-specific platform_data with the data drivers
193 * rely on to handle wiring variations.
194 * (c) Creating platform devices as meaningful on this board and
195 * with this kernel configuration.
197 * Claiming GPIOs, and setting their direction and initial values, is the
198 * responsibility of the device drivers. So is responding to probe().
200 * Board-specific knowledge like creating devices or pin setup is to be
201 * kept out of drivers as much as possible. In particular, pin setup
202 * may be handled by the boot loader, and drivers should expect it will
203 * normally have been done by the time they're probed.
205 static int __init omap_init_devices(void)
207 /* please keep these calls, and their implementations above,
208 * in alphabetical order so they're easier to sort through.
210 omap_init_rng();
211 omap_init_uwire();
212 return 0;
214 arch_initcall(omap_init_devices);