spi-topcliff-pch: supports a spi mode setup and bit order setup by IO control
[zen-stable.git] / arch / arm / plat-omap / include / plat / dsp.h
blob9c604b390f9f74cd8fdfa63eb617a1cd6e3ebe02
1 #ifndef __OMAP_DSP_H__
2 #define __OMAP_DSP_H__
4 #include <linux/types.h>
6 struct omap_dsp_platform_data {
7 void (*dsp_set_min_opp) (u8 opp_id);
8 u8 (*dsp_get_opp) (void);
9 void (*cpu_set_freq) (unsigned long f);
10 unsigned long (*cpu_get_freq) (void);
11 unsigned long mpu_speed[6];
13 /* functions to write and read PRCM registers */
14 void (*dsp_prm_write)(u32, s16 , u16);
15 u32 (*dsp_prm_read)(s16 , u16);
16 u32 (*dsp_prm_rmw_bits)(u32, u32, s16, s16);
17 void (*dsp_cm_write)(u32, s16 , u16);
18 u32 (*dsp_cm_read)(s16 , u16);
19 u32 (*dsp_cm_rmw_bits)(u32, u32, s16, s16);
21 phys_addr_t phys_mempool_base;
22 phys_addr_t phys_mempool_size;
25 #if defined(CONFIG_TIDSPBRIDGE) || defined(CONFIG_TIDSPBRIDGE_MODULE)
26 extern void omap_dsp_reserve_sdram_memblock(void);
27 #else
28 static inline void omap_dsp_reserve_sdram_memblock(void) { }
29 #endif
31 #endif