spi-topcliff-pch: supports a spi mode setup and bit order setup by IO control
[zen-stable.git] / arch / h8300 / platform / h8300h / aki3068net / crt0_ram.S
blobecaeb31ae9a44060a7c64c5ddc5d4c270688afac
1 /*
2  *  linux/arch/h8300/platform/h8300h/aki3068net/crt0_ram.S
3  *
4  *  Yoshinori Sato <ysato@users.sourceforge.jp>
5  *
6  *  Platform depend startup
7  *  Target Archtecture: AE-3068 (aka. aki3068net)
8  *  Memory Layout     : RAM
9  */
11 #define ASSEMBLY
13 #include <asm/linkage.h>
14         
15 #if !defined(CONFIG_BLKDEV_RESERVE)
16 #if defined(CONFIG_GDB_DEBUG)
17 #define RAMEND (__ramend - 0xc000)
18 #else
19 #define RAMEND __ramend
20 #endif
21 #else
22 #define RAMEND CONFIG_BLKDEV_RESERVE_ADDRESS
23 #endif
24         
25         .global SYMBOL_NAME(_start)
26         .global SYMBOL_NAME(command_line)
27         .global SYMBOL_NAME(_platform_gpio_table)
28         .global SYMBOL_NAME(_target_name)
29         
30         .h8300h
32         .section .text
33         .file   "crt0_ram.S"
35         /* CPU Reset entry */
36 SYMBOL_NAME_LABEL(_start)
37         mov.l   #RAMEND,sp
38         ldc     #0x80,ccr
40         /* Peripheral Setup */
41         
42 #if defined(CONFIG_MTD_UCLINUX)
43         /* move romfs image */
44         jsr     @__move_romfs   
45 #endif
46         
47         /* .bss clear */
48         mov.l   #__sbss,er5
49         mov.l   #__ebss,er4
50         sub.l   er5,er4
51         shlr    er4
52         shlr    er4
53         sub.l   er0,er0
54 1:      
55         mov.l   er0,@er5
56         adds    #4,er5
57         dec.l   #1,er4
58         bne     1b
60         /* copy kernel commandline */
61         mov.l   #COMMAND_START,er5
62         mov.l   #SYMBOL_NAME(command_line),er6
63         mov.w   #512,r4
64         eepmov.w
66         /* uClinux kernel start */
67         ldc     #0x90,ccr       /* running kernel */
68         mov.l   #SYMBOL_NAME(init_thread_union),sp
69         add.l   #0x2000,sp
70         jsr     @_start_kernel
71 _exit:
73         jmp     _exit
75         rts
77         /* I/O port assign information */
78 __platform_gpio_table:  
79         mov.l   #gpio_table,er0
80         rts
82 gpio_table:
83         ;; P1DDR
84         .byte   0xff,0xff
85         ;; P2DDR
86         .byte   0xff,0xff
87         ;; P3DDR
88         .byte   0xff,0x00
89         ;; P4DDR
90         .byte   0x00,0x00
91         ;; P5DDR
92         .byte   0x01,0x01
93         ;; P6DDR
94         .byte   0x00,0x00
95         ;; dummy
96         .byte   0x00,0x00
97         ;; P8DDR
98         .byte   0x0c,0x0c
99         ;; P9DDR
100         .byte   0x00,0x00
101         ;; PADDR
102         .byte   0x00,0x00
103         ;; PBDDR
104         .byte   0x30,0x30
106 __target_name:  
107         .asciz  "AE-3068"
108         
109         .section .bootvec,"ax"
110         jmp     @SYMBOL_NAME(_start)