arch/mips/ath79/dev-usb.c

   1 /*
   2  *  Atheros AR7XXX/AR9XXX USB Host Controller device
   3  *
   4  *  Copyright (C) 2008-2011 Gabor Juhos <juhosg@openwrt.org>
   5  *  Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
   6  *
   7  *  Parts of this file are based on Atheros' 2.6.15 BSP
   8  *
   9  *  This program is free software; you can redistribute it and/or modify it
  10  *  under the terms of the GNU General Public License version 2 as published
  11  *  by the Free Software Foundation.
  12  */
  13
  14 #include <linux/kernel.h>
  15 #include <linux/init.h>
  16 #include <linux/delay.h>
  17 #include <linux/irq.h>
  18 #include <linux/dma-mapping.h>
  19 #include <linux/platform_device.h>
  20
  21 #include <asm/mach-ath79/ath79.h>
  22 #include <asm/mach-ath79/ar71xx_regs.h>
  23 #include "common.h"
  24 #include "dev-usb.h"
  25
  26 static struct resource ath79_ohci_resources[] = {
  27         [0] = {
  28                 /* .start and .end fields are filled dynamically */
  29                 .flags  = IORESOURCE_MEM,
  30         },
  31         [1] = {
  32                 .start  = ATH79_MISC_IRQ_OHCI,
  33                 .end    = ATH79_MISC_IRQ_OHCI,
  34                 .flags  = IORESOURCE_IRQ,
  35         },
  36 };
  37
  38 static u64 ath79_ohci_dmamask = DMA_BIT_MASK(32);
  39 static struct platform_device ath79_ohci_device = {
  40         .name           = "ath79-ohci",
  41         .id             = -1,
  42         .resource       = ath79_ohci_resources,
  43         .num_resources  = ARRAY_SIZE(ath79_ohci_resources),
  44         .dev = {
  45                 .dma_mask               = &ath79_ohci_dmamask,
  46                 .coherent_dma_mask      = DMA_BIT_MASK(32),
  47         },
  48 };
  49
  50 static struct resource ath79_ehci_resources[] = {
  51         [0] = {
  52                 /* .start and .end fields are filled dynamically */
  53                 .flags  = IORESOURCE_MEM,
  54         },
  55         [1] = {
  56                 .start  = ATH79_CPU_IRQ_USB,
  57                 .end    = ATH79_CPU_IRQ_USB,
  58                 .flags  = IORESOURCE_IRQ,
  59         },
  60 };
  61
  62 static u64 ath79_ehci_dmamask = DMA_BIT_MASK(32);
  63 static struct platform_device ath79_ehci_device = {
  64         .name           = "ath79-ehci",
  65         .id             = -1,
  66         .resource       = ath79_ehci_resources,
  67         .num_resources  = ARRAY_SIZE(ath79_ehci_resources),
  68         .dev = {
  69                 .dma_mask               = &ath79_ehci_dmamask,
  70                 .coherent_dma_mask      = DMA_BIT_MASK(32),
  71         },
  72 };
  73
  74 #define AR71XX_USB_RESET_MASK   (AR71XX_RESET_USB_HOST | \
  75                                  AR71XX_RESET_USB_PHY | \
  76                                  AR71XX_RESET_USB_OHCI_DLL)
  77
  78 static void __init ath79_usb_setup(void)
  79 {
  80         void __iomem *usb_ctrl_base;
  81
  82         ath79_device_reset_set(AR71XX_USB_RESET_MASK);
  83         mdelay(1000);
  84         ath79_device_reset_clear(AR71XX_USB_RESET_MASK);
  85
  86         usb_ctrl_base = ioremap(AR71XX_USB_CTRL_BASE, AR71XX_USB_CTRL_SIZE);
  87
  88         /* Turning on the Buff and Desc swap bits */
  89         __raw_writel(0xf0000, usb_ctrl_base + AR71XX_USB_CTRL_REG_CONFIG);
  90
  91         /* WAR for HW bug. Here it adjusts the duration between two SOFS */
  92         __raw_writel(0x20c00, usb_ctrl_base + AR71XX_USB_CTRL_REG_FLADJ);
  93
  94         iounmap(usb_ctrl_base);
  95
  96         mdelay(900);
  97
  98         ath79_ohci_resources[0].start = AR71XX_OHCI_BASE;
  99         ath79_ohci_resources[0].end = AR71XX_OHCI_BASE + AR71XX_OHCI_SIZE - 1;
 100         platform_device_register(&ath79_ohci_device);
 101
 102         ath79_ehci_resources[0].start = AR71XX_EHCI_BASE;
 103         ath79_ehci_resources[0].end = AR71XX_EHCI_BASE + AR71XX_EHCI_SIZE - 1;
 104         ath79_ehci_device.name = "ar71xx-ehci";
 105         platform_device_register(&ath79_ehci_device);
 106 }
 107
 108 static void __init ar7240_usb_setup(void)
 109 {
 110         void __iomem *usb_ctrl_base;
 111
 112         ath79_device_reset_clear(AR7240_RESET_OHCI_DLL);
 113         ath79_device_reset_set(AR7240_RESET_USB_HOST);
 114
 115         mdelay(1000);
 116
 117         ath79_device_reset_set(AR7240_RESET_OHCI_DLL);
 118         ath79_device_reset_clear(AR7240_RESET_USB_HOST);
 119
 120         usb_ctrl_base = ioremap(AR7240_USB_CTRL_BASE, AR7240_USB_CTRL_SIZE);
 121
 122         /* WAR for HW bug. Here it adjusts the duration between two SOFS */
 123         __raw_writel(0x3, usb_ctrl_base + AR71XX_USB_CTRL_REG_FLADJ);
 124
 125         iounmap(usb_ctrl_base);
 126
 127         ath79_ohci_resources[0].start = AR7240_OHCI_BASE;
 128         ath79_ohci_resources[0].end = AR7240_OHCI_BASE + AR7240_OHCI_SIZE - 1;
 129         platform_device_register(&ath79_ohci_device);
 130 }
 131
 132 static void __init ar724x_usb_setup(void)
 133 {
 134         ath79_device_reset_set(AR724X_RESET_USBSUS_OVERRIDE);
 135         mdelay(10);
 136
 137         ath79_device_reset_clear(AR724X_RESET_USB_HOST);
 138         mdelay(10);
 139
 140         ath79_device_reset_clear(AR724X_RESET_USB_PHY);
 141         mdelay(10);
 142
 143         ath79_ehci_resources[0].start = AR724X_EHCI_BASE;
 144         ath79_ehci_resources[0].end = AR724X_EHCI_BASE + AR724X_EHCI_SIZE - 1;
 145         ath79_ehci_device.name = "ar724x-ehci";
 146         platform_device_register(&ath79_ehci_device);
 147 }
 148
 149 static void __init ar913x_usb_setup(void)
 150 {
 151         ath79_device_reset_set(AR913X_RESET_USBSUS_OVERRIDE);
 152         mdelay(10);
 153
 154         ath79_device_reset_clear(AR913X_RESET_USB_HOST);
 155         mdelay(10);
 156
 157         ath79_device_reset_clear(AR913X_RESET_USB_PHY);
 158         mdelay(10);
 159
 160         ath79_ehci_resources[0].start = AR913X_EHCI_BASE;
 161         ath79_ehci_resources[0].end = AR913X_EHCI_BASE + AR913X_EHCI_SIZE - 1;
 162         ath79_ehci_device.name = "ar913x-ehci";
 163         platform_device_register(&ath79_ehci_device);
 164 }
 165
 166 static void __init ar933x_usb_setup(void)
 167 {
 168         ath79_device_reset_set(AR933X_RESET_USBSUS_OVERRIDE);
 169         mdelay(10);
 170
 171         ath79_device_reset_clear(AR933X_RESET_USB_HOST);
 172         mdelay(10);
 173
 174         ath79_device_reset_clear(AR933X_RESET_USB_PHY);
 175         mdelay(10);
 176
 177         ath79_ehci_resources[0].start = AR933X_EHCI_BASE;
 178         ath79_ehci_resources[0].end = AR933X_EHCI_BASE + AR933X_EHCI_SIZE - 1;
 179         ath79_ehci_device.name = "ar933x-ehci";
 180         platform_device_register(&ath79_ehci_device);
 181 }
 182
 183 void __init ath79_register_usb(void)
 184 {
 185         if (soc_is_ar71xx())
 186                 ath79_usb_setup();
 187         else if (soc_is_ar7240())
 188                 ar7240_usb_setup();
 189         else if (soc_is_ar7241() || soc_is_ar7242())
 190                 ar724x_usb_setup();
 191         else if (soc_is_ar913x())
 192                 ar913x_usb_setup();
 193         else if (soc_is_ar933x())
 194                 ar933x_usb_setup();
 195         else
 196                 BUG();
 197 }