spi-topcliff-pch: supports a spi mode setup and bit order setup by IO control
[zen-stable.git] / arch / mips / dec / prom / locore.S
blobf72b5741025fa8cc10a83dd430b0feb51b3a83d0
1 /*
2  * locore.S
3  */
4 #include <asm/asm.h>
5 #include <asm/regdef.h>
6 #include <asm/mipsregs.h>
8         .text
11  * Simple general exception handling routine. This one is used for the
12  * Memory sizing routine for pmax machines. HK
13  */
15 NESTED(genexcept_early, 0, sp)
16         .set    noat
17         .set    noreorder
19         mfc0    k0, CP0_STATUS
20         la      k1, mem_err
22         sw      k0, 0(k1)
24         mfc0    k0, CP0_EPC
25         nop
26         addiu   k0, 4           # skip the causing instruction
27         jr      k0
28          rfe
29 END(genexcept_early)