spi-topcliff-pch: supports a spi mode setup and bit order setup by IO control
[zen-stable.git] / arch / mips / math-emu / dp_add.c
blobb422fcad852a33811d7564d78f3ae3ed9b329e62
1 /* IEEE754 floating point arithmetic
2 * double precision: common utilities
3 */
4 /*
5 * MIPS floating point support
6 * Copyright (C) 1994-2000 Algorithmics Ltd.
8 * ########################################################################
10 * This program is free software; you can distribute it and/or modify it
11 * under the terms of the GNU General Public License (Version 2) as
12 * published by the Free Software Foundation.
14 * This program is distributed in the hope it will be useful, but WITHOUT
15 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
16 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
17 * for more details.
19 * You should have received a copy of the GNU General Public License along
20 * with this program; if not, write to the Free Software Foundation, Inc.,
21 * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
23 * ########################################################################
28 #include "ieee754dp.h"
30 ieee754dp ieee754dp_add(ieee754dp x, ieee754dp y)
32 COMPXDP;
33 COMPYDP;
35 EXPLODEXDP;
36 EXPLODEYDP;
38 CLEARCX;
40 FLUSHXDP;
41 FLUSHYDP;
43 switch (CLPAIR(xc, yc)) {
44 case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_QNAN):
45 case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_SNAN):
46 case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_SNAN):
47 case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_SNAN):
48 case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_SNAN):
49 case CLPAIR(IEEE754_CLASS_DNORM, IEEE754_CLASS_SNAN):
50 case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_SNAN):
51 case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_ZERO):
52 case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_NORM):
53 case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_DNORM):
54 case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_INF):
55 SETCX(IEEE754_INVALID_OPERATION);
56 return ieee754dp_nanxcpt(ieee754dp_indef(), "add", x, y);
58 case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_QNAN):
59 case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_QNAN):
60 case CLPAIR(IEEE754_CLASS_DNORM, IEEE754_CLASS_QNAN):
61 case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_QNAN):
62 return y;
64 case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_QNAN):
65 case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_ZERO):
66 case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_NORM):
67 case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_DNORM):
68 case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_INF):
69 return x;
72 /* Infinity handling
75 case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_INF):
76 if (xs == ys)
77 return x;
78 SETCX(IEEE754_INVALID_OPERATION);
79 return ieee754dp_xcpt(ieee754dp_indef(), "add", x, y);
81 case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_INF):
82 case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_INF):
83 case CLPAIR(IEEE754_CLASS_DNORM, IEEE754_CLASS_INF):
84 return y;
86 case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_ZERO):
87 case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_NORM):
88 case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_DNORM):
89 return x;
91 /* Zero handling
94 case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_ZERO):
95 if (xs == ys)
96 return x;
97 else
98 return ieee754dp_zero(ieee754_csr.rm ==
99 IEEE754_RD);
101 case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_ZERO):
102 case CLPAIR(IEEE754_CLASS_DNORM, IEEE754_CLASS_ZERO):
103 return x;
105 case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_NORM):
106 case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_DNORM):
107 return y;
109 case CLPAIR(IEEE754_CLASS_DNORM, IEEE754_CLASS_DNORM):
110 DPDNORMX;
112 /* FALL THROUGH */
114 case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_DNORM):
115 DPDNORMY;
116 break;
118 case CLPAIR(IEEE754_CLASS_DNORM, IEEE754_CLASS_NORM):
119 DPDNORMX;
120 break;
122 case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_NORM):
123 break;
125 assert(xm & DP_HIDDEN_BIT);
126 assert(ym & DP_HIDDEN_BIT);
128 /* provide guard,round and stick bit space */
129 xm <<= 3;
130 ym <<= 3;
132 if (xe > ye) {
133 /* have to shift y fraction right to align
135 int s = xe - ye;
136 ym = XDPSRS(ym, s);
137 ye += s;
138 } else if (ye > xe) {
139 /* have to shift x fraction right to align
141 int s = ye - xe;
142 xm = XDPSRS(xm, s);
143 xe += s;
145 assert(xe == ye);
146 assert(xe <= DP_EMAX);
148 if (xs == ys) {
149 /* generate 28 bit result of adding two 27 bit numbers
150 * leaving result in xm,xs,xe
152 xm = xm + ym;
153 xe = xe;
154 xs = xs;
156 if (xm >> (DP_MBITS + 1 + 3)) { /* carry out */
157 xm = XDPSRS1(xm);
158 xe++;
160 } else {
161 if (xm >= ym) {
162 xm = xm - ym;
163 xe = xe;
164 xs = xs;
165 } else {
166 xm = ym - xm;
167 xe = xe;
168 xs = ys;
170 if (xm == 0)
171 return ieee754dp_zero(ieee754_csr.rm ==
172 IEEE754_RD);
174 /* normalize to rounding precision */
175 while ((xm >> (DP_MBITS + 3)) == 0) {
176 xm <<= 1;
177 xe--;
181 DPNORMRET2(xs, xe, xm, "add", x, y);