arch/mips/pmc-sierra/msp71xx/gpio_extended.c

   1 /*
   2  * Generic PMC MSP71xx EXTENDED (EXD) GPIO handling. The extended gpio is
   3  * a set of hardware registers that have no need for explicit locking as
   4  * it is handled by unique method of writing individual set/clr bits.
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License version 2 as
   8  * published by the Free Software Foundation.
   9  *
  10  * @author Patrick Glass <patrickglass@gmail.com>
  11  */
  12
  13 #include <linux/kernel.h>
  14 #include <linux/module.h>
  15 #include <linux/init.h>
  16 #include <linux/gpio.h>
  17 #include <linux/io.h>
  18
  19 #define MSP71XX_DATA_OFFSET(gpio)       (2 * (gpio))
  20 #define MSP71XX_READ_OFFSET(gpio)       (MSP71XX_DATA_OFFSET(gpio) + 1)
  21 #define MSP71XX_CFG_OUT_OFFSET(gpio)    (MSP71XX_DATA_OFFSET(gpio) + 16)
  22 #define MSP71XX_CFG_IN_OFFSET(gpio)     (MSP71XX_CFG_OUT_OFFSET(gpio) + 1)
  23
  24 #define MSP71XX_EXD_GPIO_BASE   0x0BC000000L
  25
  26 #define to_msp71xx_exd_gpio_chip(c) \
  27                         container_of(c, struct msp71xx_exd_gpio_chip, chip)
  28
  29 /*
  30  * struct msp71xx_exd_gpio_chip - container for gpio chip and registers
  31  * @chip: chip structure for the specified gpio bank
  32  * @reg: register for control and data of gpio pin
  33  */
  34 struct msp71xx_exd_gpio_chip {
  35         struct gpio_chip chip;
  36         void __iomem *reg;
  37 };
  38
  39 /*
  40  * msp71xx_exd_gpio_get() - return the chip's gpio value
  41  * @chip: chip structure which controls the specified gpio
  42  * @offset: gpio whose value will be returned
  43  *
  44  * It will return 0 if gpio value is low and other if high.
  45  */
  46 static int msp71xx_exd_gpio_get(struct gpio_chip *chip, unsigned offset)
  47 {
  48         struct msp71xx_exd_gpio_chip *msp71xx_chip =
  49             to_msp71xx_exd_gpio_chip(chip);
  50         const unsigned bit = MSP71XX_READ_OFFSET(offset);
  51
  52         return __raw_readl(msp71xx_chip->reg) & (1 << bit);
  53 }
  54
  55 /*
  56  * msp71xx_exd_gpio_set() - set the output value for the gpio
  57  * @chip: chip structure who controls the specified gpio
  58  * @offset: gpio whose value will be assigned
  59  * @value: logic level to assign to the gpio initially
  60  *
  61  * This will set the gpio bit specified to the desired value. It will set the
  62  * gpio pin low if value is 0 otherwise it will be high.
  63  */
  64 static void msp71xx_exd_gpio_set(struct gpio_chip *chip,
  65                                  unsigned offset, int value)
  66 {
  67         struct msp71xx_exd_gpio_chip *msp71xx_chip =
  68             to_msp71xx_exd_gpio_chip(chip);
  69         const unsigned bit = MSP71XX_DATA_OFFSET(offset);
  70
  71         __raw_writel(1 << (bit + (value ? 1 : 0)), msp71xx_chip->reg);
  72 }
  73
  74 /*
  75  * msp71xx_exd_direction_output() - declare the direction mode for a gpio
  76  * @chip: chip structure which controls the specified gpio
  77  * @offset: gpio whose value will be assigned
  78  * @value: logic level to assign to the gpio initially
  79  *
  80  * This call will set the mode for the @gpio to output. It will set the
  81  * gpio pin low if value is 0 otherwise it will be high.
  82  */
  83 static int msp71xx_exd_direction_output(struct gpio_chip *chip,
  84                                         unsigned offset, int value)
  85 {
  86         struct msp71xx_exd_gpio_chip *msp71xx_chip =
  87             to_msp71xx_exd_gpio_chip(chip);
  88
  89         msp71xx_exd_gpio_set(chip, offset, value);
  90         __raw_writel(1 << MSP71XX_CFG_OUT_OFFSET(offset), msp71xx_chip->reg);
  91         return 0;
  92 }
  93
  94 /*
  95  * msp71xx_exd_direction_input() - declare the direction mode for a gpio
  96  * @chip: chip structure which controls the specified gpio
  97  * @offset: gpio whose to which the value will be assigned
  98  *
  99  * This call will set the mode for the @gpio to input.
 100  */
 101 static int msp71xx_exd_direction_input(struct gpio_chip *chip, unsigned offset)
 102 {
 103         struct msp71xx_exd_gpio_chip *msp71xx_chip =
 104             to_msp71xx_exd_gpio_chip(chip);
 105
 106         __raw_writel(1 << MSP71XX_CFG_IN_OFFSET(offset), msp71xx_chip->reg);
 107         return 0;
 108 }
 109
 110 #define MSP71XX_EXD_GPIO_BANK(name, exd_reg, base_gpio, num_gpio) \
 111 { \
 112         .chip = { \
 113                 .label            = name, \
 114                 .direction_input  = msp71xx_exd_direction_input, \
 115                 .direction_output = msp71xx_exd_direction_output, \
 116                 .get              = msp71xx_exd_gpio_get, \
 117                 .set              = msp71xx_exd_gpio_set, \
 118                 .base             = base_gpio, \
 119                 .ngpio            = num_gpio, \
 120         }, \
 121         .reg    = (void __iomem *)(MSP71XX_EXD_GPIO_BASE + exd_reg), \
 122 }
 123
 124 /*
 125  * struct msp71xx_exd_gpio_banks[] - container array of gpio banks
 126  * @chip: chip structure for the specified gpio bank
 127  * @reg: register for reading and writing the gpio pin value
 128  *
 129  * This array structure defines the extended gpio banks for the
 130  * PMC MIPS Processor. We specify the bank name, the data/config
 131  * register,the base starting gpio number, and the number of
 132  * gpios exposed by the bank of gpios.
 133  */
 134 static struct msp71xx_exd_gpio_chip msp71xx_exd_gpio_banks[] = {
 135
 136         MSP71XX_EXD_GPIO_BANK("GPIO_23_16", 0x188, 16, 8),
 137         MSP71XX_EXD_GPIO_BANK("GPIO_27_24", 0x18C, 24, 4),
 138 };
 139
 140 void __init msp71xx_init_gpio_extended(void)
 141 {
 142         int i;
 143
 144         for (i = 0; i < ARRAY_SIZE(msp71xx_exd_gpio_banks); i++)
 145                 gpiochip_add(&msp71xx_exd_gpio_banks[i].chip);
 146 }