spi-topcliff-pch: supports a spi mode setup and bit order setup by IO control
[zen-stable.git] / arch / mips / pmc-sierra / msp71xx / msp_irq_slp.c
blob5bbcc47da6b96954134a514888e99fc0b132ef50
1 /*
2 * This file define the irq handler for MSP SLM subsystem interrupts.
4 * Copyright 2005-2006 PMC-Sierra, Inc, derived from irq_cpu.c
5 * Author: Andrew Hughes, Andrew_Hughes@pmc-sierra.com
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License as published by the
9 * Free Software Foundation; either version 2 of the License, or (at your
10 * option) any later version.
13 #include <linux/init.h>
14 #include <linux/interrupt.h>
15 #include <linux/kernel.h>
16 #include <linux/bitops.h>
18 #include <asm/mipsregs.h>
19 #include <asm/system.h>
21 #include <msp_slp_int.h>
22 #include <msp_regs.h>
24 static inline void unmask_msp_slp_irq(struct irq_data *d)
26 unsigned int irq = d->irq;
28 /* check for PER interrupt range */
29 if (irq < MSP_PER_INTBASE)
30 *SLP_INT_MSK_REG |= (1 << (irq - MSP_SLP_INTBASE));
31 else
32 *PER_INT_MSK_REG |= (1 << (irq - MSP_PER_INTBASE));
35 static inline void mask_msp_slp_irq(struct irq_data *d)
37 unsigned int irq = d->irq;
39 /* check for PER interrupt range */
40 if (irq < MSP_PER_INTBASE)
41 *SLP_INT_MSK_REG &= ~(1 << (irq - MSP_SLP_INTBASE));
42 else
43 *PER_INT_MSK_REG &= ~(1 << (irq - MSP_PER_INTBASE));
47 * While we ack the interrupt interrupts are disabled and thus we don't need
48 * to deal with concurrency issues. Same for msp_slp_irq_end.
50 static inline void ack_msp_slp_irq(struct irq_data *d)
52 unsigned int irq = d->irq;
54 /* check for PER interrupt range */
55 if (irq < MSP_PER_INTBASE)
56 *SLP_INT_STS_REG = (1 << (irq - MSP_SLP_INTBASE));
57 else
58 *PER_INT_STS_REG = (1 << (irq - MSP_PER_INTBASE));
61 static struct irq_chip msp_slp_irq_controller = {
62 .name = "MSP_SLP",
63 .irq_ack = ack_msp_slp_irq,
64 .irq_mask = mask_msp_slp_irq,
65 .irq_unmask = unmask_msp_slp_irq,
68 void __init msp_slp_irq_init(void)
70 int i;
72 /* Mask/clear interrupts. */
73 *SLP_INT_MSK_REG = 0x00000000;
74 *PER_INT_MSK_REG = 0x00000000;
75 *SLP_INT_STS_REG = 0xFFFFFFFF;
76 *PER_INT_STS_REG = 0xFFFFFFFF;
78 /* initialize all the IRQ descriptors */
79 for (i = MSP_SLP_INTBASE; i < MSP_PER_INTBASE + 32; i++)
80 irq_set_chip_and_handler(i, &msp_slp_irq_controller,
81 handle_level_irq);
84 void msp_slp_irq_dispatch(void)
86 u32 pending;
87 int intbase;
89 intbase = MSP_SLP_INTBASE;
90 pending = *SLP_INT_STS_REG & *SLP_INT_MSK_REG;
92 /* check for PER interrupt */
93 if (pending == (1 << (MSP_INT_PER - MSP_SLP_INTBASE))) {
94 intbase = MSP_PER_INTBASE;
95 pending = *PER_INT_STS_REG & *PER_INT_MSK_REG;
98 /* check for spurious interrupt */
99 if (pending == 0x00000000) {
100 printk(KERN_ERR "Spurious %s interrupt?\n",
101 (intbase == MSP_SLP_INTBASE) ? "SLP" : "PER");
102 return;
105 /* dispatch the irq */
106 do_IRQ(ffs(pending) + intbase - 1);