spi-topcliff-pch: supports a spi mode setup and bit order setup by IO control
[zen-stable.git] / arch / mips / pnx8550 / common / platform.c
blob5264cc09a27bacbe2057ca7a66e50645a3eefd04
1 /*
2 * Platform device support for NXP PNX8550 SoCs
4 * Copyright 2005, Embedded Alley Solutions, Inc
6 * Based on arch/mips/au1000/common/platform.c
7 * Platform device support for Au1x00 SoCs.
9 * Copyright 2004, Matt Porter <mporter@kernel.crashing.org>
11 * This file is licensed under the terms of the GNU General Public
12 * License version 2. This program is licensed "as is" without any
13 * warranty of any kind, whether express or implied.
15 #include <linux/device.h>
16 #include <linux/dma-mapping.h>
17 #include <linux/kernel.h>
18 #include <linux/init.h>
19 #include <linux/resource.h>
20 #include <linux/serial.h>
21 #include <linux/serial_pnx8xxx.h>
22 #include <linux/platform_device.h>
24 #include <int.h>
25 #include <usb.h>
26 #include <uart.h>
28 static struct resource pnx8550_usb_ohci_resources[] = {
29 [0] = {
30 .start = PNX8550_USB_OHCI_OP_BASE,
31 .end = PNX8550_USB_OHCI_OP_BASE +
32 PNX8550_USB_OHCI_OP_LEN,
33 .flags = IORESOURCE_MEM,
35 [1] = {
36 .start = PNX8550_INT_USB,
37 .end = PNX8550_INT_USB,
38 .flags = IORESOURCE_IRQ,
42 static struct resource pnx8550_uart_resources[] = {
43 [0] = {
44 .start = PNX8550_UART_PORT0,
45 .end = PNX8550_UART_PORT0 + 0xfff,
46 .flags = IORESOURCE_MEM,
48 [1] = {
49 .start = PNX8550_UART_INT(0),
50 .end = PNX8550_UART_INT(0),
51 .flags = IORESOURCE_IRQ,
53 [2] = {
54 .start = PNX8550_UART_PORT1,
55 .end = PNX8550_UART_PORT1 + 0xfff,
56 .flags = IORESOURCE_MEM,
58 [3] = {
59 .start = PNX8550_UART_INT(1),
60 .end = PNX8550_UART_INT(1),
61 .flags = IORESOURCE_IRQ,
65 struct pnx8xxx_port pnx8xxx_ports[] = {
66 [0] = {
67 .port = {
68 .type = PORT_PNX8XXX,
69 .iotype = UPIO_MEM,
70 .membase = (void __iomem *)PNX8550_UART_PORT0,
71 .mapbase = PNX8550_UART_PORT0,
72 .irq = PNX8550_UART_INT(0),
73 .uartclk = 3692300,
74 .fifosize = 16,
75 .flags = UPF_BOOT_AUTOCONF,
76 .line = 0,
79 [1] = {
80 .port = {
81 .type = PORT_PNX8XXX,
82 .iotype = UPIO_MEM,
83 .membase = (void __iomem *)PNX8550_UART_PORT1,
84 .mapbase = PNX8550_UART_PORT1,
85 .irq = PNX8550_UART_INT(1),
86 .uartclk = 3692300,
87 .fifosize = 16,
88 .flags = UPF_BOOT_AUTOCONF,
89 .line = 1,
94 /* The dmamask must be set for OHCI to work */
95 static u64 ohci_dmamask = DMA_BIT_MASK(32);
97 static u64 uart_dmamask = DMA_BIT_MASK(32);
99 static struct platform_device pnx8550_usb_ohci_device = {
100 .name = "pnx8550-ohci",
101 .id = -1,
102 .dev = {
103 .dma_mask = &ohci_dmamask,
104 .coherent_dma_mask = DMA_BIT_MASK(32),
106 .num_resources = ARRAY_SIZE(pnx8550_usb_ohci_resources),
107 .resource = pnx8550_usb_ohci_resources,
110 static struct platform_device pnx8550_uart_device = {
111 .name = "pnx8xxx-uart",
112 .id = -1,
113 .dev = {
114 .dma_mask = &uart_dmamask,
115 .coherent_dma_mask = DMA_BIT_MASK(32),
116 .platform_data = pnx8xxx_ports,
118 .num_resources = ARRAY_SIZE(pnx8550_uart_resources),
119 .resource = pnx8550_uart_resources,
122 static struct platform_device *pnx8550_platform_devices[] __initdata = {
123 &pnx8550_usb_ohci_device,
124 &pnx8550_uart_device,
127 static int __init pnx8550_platform_init(void)
129 return platform_add_devices(pnx8550_platform_devices,
130 ARRAY_SIZE(pnx8550_platform_devices));
133 arch_initcall(pnx8550_platform_init);