spi-topcliff-pch: supports a spi mode setup and bit order setup by IO control
[zen-stable.git] / arch / mips / sgi-ip22 / ip22-hpc.c
blobbb70589b5f74ce8c4407fa62c7bc2804f558b707
1 /*
2 * ip22-hpc.c: Routines for generic manipulation of the HPC controllers.
4 * Copyright (C) 1996 David S. Miller (davem@davemloft.net)
5 * Copyright (C) 1998 Ralf Baechle
6 */
8 #include <linux/init.h>
9 #include <linux/module.h>
10 #include <linux/types.h>
12 #include <asm/io.h>
13 #include <asm/sgi/hpc3.h>
14 #include <asm/sgi/ioc.h>
15 #include <asm/sgi/ip22.h>
17 struct hpc3_regs *hpc3c0, *hpc3c1;
19 EXPORT_SYMBOL(hpc3c0);
20 EXPORT_SYMBOL(hpc3c1);
22 struct sgioc_regs *sgioc;
24 EXPORT_SYMBOL(sgioc);
26 /* We need software copies of these because they are write only. */
27 u8 sgi_ioc_reset, sgi_ioc_write;
29 extern char *system_type;
31 void __init sgihpc_init(void)
33 /* ioremap can't fail */
34 hpc3c0 = (struct hpc3_regs *)
35 ioremap(HPC3_CHIP0_BASE, sizeof(struct hpc3_regs));
36 hpc3c1 = (struct hpc3_regs *)
37 ioremap(HPC3_CHIP1_BASE, sizeof(struct hpc3_regs));
38 /* IOC lives in PBUS PIO channel 6 */
39 sgioc = (struct sgioc_regs *)hpc3c0->pbus_extregs[6];
41 hpc3c0->pbus_piocfg[6][0] |= HPC3_PIOCFG_DS16;
42 if (ip22_is_fullhouse()) {
43 /* Full House comes with INT2 which lives in PBUS PIO
44 * channel 4 */
45 sgint = (struct sgint_regs *)hpc3c0->pbus_extregs[4];
46 system_type = "SGI Indigo2";
47 } else {
48 /* Guiness comes with INT3 which is part of IOC */
49 sgint = &sgioc->int3;
50 system_type = "SGI Indy";
53 sgi_ioc_reset = (SGIOC_RESET_PPORT | SGIOC_RESET_KBDMOUSE |
54 SGIOC_RESET_EISA | SGIOC_RESET_ISDN |
55 SGIOC_RESET_LC0OFF);
57 sgi_ioc_write = (SGIOC_WRITE_EASEL | SGIOC_WRITE_NTHRESH |
58 SGIOC_WRITE_TPSPEED | SGIOC_WRITE_EPSEL |
59 SGIOC_WRITE_U0AMODE | SGIOC_WRITE_U1AMODE);
61 sgioc->reset = sgi_ioc_reset;
62 sgioc->write = sgi_ioc_write;