spi-topcliff-pch: supports a spi mode setup and bit order setup by IO control
[zen-stable.git] / arch / sh / include / asm / irq.h
blob45d08b6a5ef71de204578bb0569f4fba3c836cbd
1 #ifndef __ASM_SH_IRQ_H
2 #define __ASM_SH_IRQ_H
4 #include <linux/cpumask.h>
5 #include <asm/machvec.h>
7 /*
8 * A sane default based on a reasonable vector table size, platforms are
9 * advised to cap this at the hard limit that they're interested in
10 * through the machvec.
12 #define NR_IRQS 512
13 #define NR_IRQS_LEGACY 8 /* Legacy external IRQ0-7 */
16 * This is a special IRQ number for indicating that no IRQ has been
17 * triggered and to simply ignore the IRQ dispatch. This is a special
18 * case that can happen with IRQ auto-distribution when multiple CPUs
19 * are woken up and signalled in parallel.
21 #define NO_IRQ_IGNORE ((unsigned int)-1)
24 * Convert back and forth between INTEVT and IRQ values.
26 #ifdef CONFIG_CPU_HAS_INTEVT
27 #define evt2irq(evt) (((evt) >> 5) - 16)
28 #define irq2evt(irq) (((irq) + 16) << 5)
29 #else
30 #define evt2irq(evt) (evt)
31 #define irq2evt(irq) (irq)
32 #endif
35 * Simple Mask Register Support
37 extern void make_maskreg_irq(unsigned int irq);
38 extern unsigned short *irq_mask_register;
41 * PINT IRQs
43 void init_IRQ_pint(void);
44 void make_imask_irq(unsigned int irq);
46 static inline int generic_irq_demux(int irq)
48 return irq;
51 #define irq_demux(irq) sh_mv.mv_irq_demux(irq)
53 void init_IRQ(void);
54 void migrate_irqs(void);
56 asmlinkage int do_IRQ(unsigned int irq, struct pt_regs *regs);
58 #ifdef CONFIG_IRQSTACKS
59 extern void irq_ctx_init(int cpu);
60 extern void irq_ctx_exit(int cpu);
61 # define __ARCH_HAS_DO_SOFTIRQ
62 #else
63 # define irq_ctx_init(cpu) do { } while (0)
64 # define irq_ctx_exit(cpu) do { } while (0)
65 #endif
67 #ifdef CONFIG_INTC_BALANCING
68 extern unsigned int irq_lookup(unsigned int irq);
69 extern void irq_finish(unsigned int irq);
70 #else
71 #define irq_lookup(irq) (irq)
72 #define irq_finish(irq) do { } while (0)
73 #endif
75 #include <asm-generic/irq.h>
76 #ifdef CONFIG_CPU_SH5
77 #include <cpu/irq.h>
78 #endif
80 #endif /* __ASM_SH_IRQ_H */