spi-topcliff-pch: supports a spi mode setup and bit order setup by IO control
[zen-stable.git] / arch / sh / include / asm / perf_event.h
blob14308bed7ea510cb6b43429887ca727cf1f0510d
1 #ifndef __ASM_SH_PERF_EVENT_H
2 #define __ASM_SH_PERF_EVENT_H
4 struct hw_perf_event;
6 #define MAX_HWEVENTS 2
8 struct sh_pmu {
9 const char *name;
10 unsigned int num_events;
11 void (*disable_all)(void);
12 void (*enable_all)(void);
13 void (*enable)(struct hw_perf_event *, int);
14 void (*disable)(struct hw_perf_event *, int);
15 u64 (*read)(int);
16 int (*event_map)(int);
17 unsigned int max_events;
18 unsigned long raw_event_mask;
19 const int (*cache_events)[PERF_COUNT_HW_CACHE_MAX]
20 [PERF_COUNT_HW_CACHE_OP_MAX]
21 [PERF_COUNT_HW_CACHE_RESULT_MAX];
24 /* arch/sh/kernel/perf_event.c */
25 extern int register_sh_pmu(struct sh_pmu *);
26 extern int reserve_pmc_hardware(void);
27 extern void release_pmc_hardware(void);
29 #endif /* __ASM_SH_PERF_EVENT_H */