spi-topcliff-pch: supports a spi mode setup and bit order setup by IO control
[zen-stable.git] / arch / sh / include / cpu-sh4 / cpu / addrspace.h
blobd51da25da72c401267a05e01ed70bb86d0b03d82
1 /*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
6 * Copyright (C) 1999 by Kaz Kojima
8 * Defitions for the address spaces of the SH-4 CPUs.
9 */
10 #ifndef __ASM_CPU_SH4_ADDRSPACE_H
11 #define __ASM_CPU_SH4_ADDRSPACE_H
13 #define P0SEG 0x00000000
14 #define P1SEG 0x80000000
15 #define P2SEG 0xa0000000
16 #define P3SEG 0xc0000000
17 #define P4SEG 0xe0000000
19 /* Detailed P4SEG */
20 #define P4SEG_STORE_QUE (P4SEG)
21 #define P4SEG_IC_ADDR 0xf0000000
22 #define P4SEG_IC_DATA 0xf1000000
23 #define P4SEG_ITLB_ADDR 0xf2000000
24 #define P4SEG_ITLB_DATA 0xf3000000
25 #define P4SEG_OC_ADDR 0xf4000000
26 #define P4SEG_OC_DATA 0xf5000000
27 #define P4SEG_TLB_ADDR 0xf6000000
28 #define P4SEG_TLB_DATA 0xf7000000
29 #define P4SEG_REG_BASE 0xff000000
31 #define PA_AREA0 0x00000000
32 #define PA_AREA1 0x04000000
33 #define PA_AREA2 0x08000000
34 #define PA_AREA3 0x0c000000
35 #define PA_AREA4 0x10000000
36 #define PA_AREA5 0x14000000
37 #define PA_AREA6 0x18000000
38 #define PA_AREA7 0x1c000000
40 #define PA_AREA5_IO 0xb4000000 /* Area 5 IO Memory */
41 #define PA_AREA6_IO 0xb8000000 /* Area 6 IO Memory */
43 #endif /* __ASM_CPU_SH4_ADDRSPACE_H */