spi-topcliff-pch: supports a spi mode setup and bit order setup by IO control
[zen-stable.git] / arch / sh / include / cpu-sh4 / cpu / sigcontext.h
blobab392f120e06266305914a5d69c6e61c0faf2793
1 #ifndef __ASM_CPU_SH4_SIGCONTEXT_H
2 #define __ASM_CPU_SH4_SIGCONTEXT_H
4 struct sigcontext {
5 unsigned long oldmask;
7 /* CPU registers */
8 unsigned long sc_regs[16];
9 unsigned long sc_pc;
10 unsigned long sc_pr;
11 unsigned long sc_sr;
12 unsigned long sc_gbr;
13 unsigned long sc_mach;
14 unsigned long sc_macl;
16 /* FPU registers */
17 unsigned long sc_fpregs[16];
18 unsigned long sc_xfpregs[16];
19 unsigned int sc_fpscr;
20 unsigned int sc_fpul;
21 unsigned int sc_ownedfp;
24 #endif /* __ASM_CPU_SH4_SIGCONTEXT_H */