spi-topcliff-pch: supports a spi mode setup and bit order setup by IO control
[zen-stable.git] / arch / sh / kernel / cpu / sh3 / ex.S
blob99b4d020179a5a0c17b52e9927cbda49d225ed38
1 /*
2  *  arch/sh/kernel/cpu/sh3/ex.S
3  *
4  *  The SH-3 and SH-4 exception vector table.
6  *  Copyright (C) 1999, 2000, 2002  Niibe Yutaka
7  *  Copyright (C) 2003 - 2008  Paul Mundt
8  *
9  * This file is subject to the terms and conditions of the GNU General Public
10  * License.  See the file "COPYING" in the main directory of this archive
11  * for more details.
12  */
13 #include <linux/linkage.h>
15 #if !defined(CONFIG_MMU)
16 #define tlb_miss_load                   exception_error
17 #define tlb_miss_store                  exception_error
18 #define initial_page_write              exception_error
19 #define tlb_protection_violation_load   exception_error
20 #define tlb_protection_violation_store  exception_error
21 #define address_error_load              exception_error
22 #define address_error_store             exception_error
23 #endif
25 #if !defined(CONFIG_SH_FPU)
26 #define fpu_error_trap_handler          exception_error
27 #endif
29 #if !defined(CONFIG_KGDB)
30 #define kgdb_handle_exception           exception_error
31 #endif
33         .align 2
34         .data
36 ENTRY(exception_handling_table)
37         .long   exception_error         /* 000 */
38         .long   exception_error
39         .long   tlb_miss_load           /* 040 */
40         .long   tlb_miss_store
41         .long   initial_page_write
42         .long   tlb_protection_violation_load
43         .long   tlb_protection_violation_store
44         .long   address_error_load
45         .long   address_error_store     /* 100 */
46         .long   fpu_error_trap_handler  /* 120 */
47         .long   exception_error         /* 140 */
48         .long   system_call     ! Unconditional Trap     /* 160 */
49         .long   exception_error ! reserved_instruction (filled by trap_init) /* 180 */
50         .long   exception_error ! illegal_slot_instruction (filled by trap_init) /*1A0*/
51         .long   nmi_trap_handler        /* 1C0 */       ! Allow trap to debugger
52         .long   breakpoint_trap_handler /* 1E0 */
54         /*
55          * Pad the remainder of the table out, exceptions residing in far
56          * away offsets can be manually inserted in to their appropriate
57          * location via set_exception_table_{evt,vec}().
58          */
59         .balign 4096,0,4096