spi-topcliff-pch: supports a spi mode setup and bit order setup by IO control
[zen-stable.git] / arch / sh / kernel / cpu / sh3 / pinmux-sh7720.c
blob9ca15462714775deaf2dee2f2289321f81990af9
1 /*
2 * SH7720 Pinmux
4 * Copyright (C) 2008 Magnus Damm
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
8 * for more details.
9 */
11 #include <linux/init.h>
12 #include <linux/kernel.h>
13 #include <linux/gpio.h>
14 #include <cpu/sh7720.h>
16 enum {
17 PINMUX_RESERVED = 0,
19 PINMUX_DATA_BEGIN,
20 PTA7_DATA, PTA6_DATA, PTA5_DATA, PTA4_DATA,
21 PTA3_DATA, PTA2_DATA, PTA1_DATA, PTA0_DATA,
22 PTB7_DATA, PTB6_DATA, PTB5_DATA, PTB4_DATA,
23 PTB3_DATA, PTB2_DATA, PTB1_DATA, PTB0_DATA,
24 PTC7_DATA, PTC6_DATA, PTC5_DATA, PTC4_DATA,
25 PTC3_DATA, PTC2_DATA, PTC1_DATA, PTC0_DATA,
26 PTD7_DATA, PTD6_DATA, PTD5_DATA, PTD4_DATA,
27 PTD3_DATA, PTD2_DATA, PTD1_DATA, PTD0_DATA,
28 PTE6_DATA, PTE5_DATA, PTE4_DATA,
29 PTE3_DATA, PTE2_DATA, PTE1_DATA, PTE0_DATA,
30 PTF6_DATA, PTF5_DATA, PTF4_DATA,
31 PTF3_DATA, PTF2_DATA, PTF1_DATA, PTF0_DATA,
32 PTG6_DATA, PTG5_DATA, PTG4_DATA,
33 PTG3_DATA, PTG2_DATA, PTG1_DATA, PTG0_DATA,
34 PTH6_DATA, PTH5_DATA, PTH4_DATA,
35 PTH3_DATA, PTH2_DATA, PTH1_DATA, PTH0_DATA,
36 PTJ6_DATA, PTJ5_DATA, PTJ4_DATA,
37 PTJ3_DATA, PTJ2_DATA, PTJ1_DATA, PTJ0_DATA,
38 PTK3_DATA, PTK2_DATA, PTK1_DATA, PTK0_DATA,
39 PTL7_DATA, PTL6_DATA, PTL5_DATA, PTL4_DATA, PTL3_DATA,
40 PTM7_DATA, PTM6_DATA, PTM5_DATA, PTM4_DATA,
41 PTM3_DATA, PTM2_DATA, PTM1_DATA, PTM0_DATA,
42 PTP4_DATA, PTP3_DATA, PTP2_DATA, PTP1_DATA, PTP0_DATA,
43 PTR7_DATA, PTR6_DATA, PTR5_DATA, PTR4_DATA,
44 PTR3_DATA, PTR2_DATA, PTR1_DATA, PTR0_DATA,
45 PTS4_DATA, PTS3_DATA, PTS2_DATA, PTS1_DATA, PTS0_DATA,
46 PTT4_DATA, PTT3_DATA, PTT2_DATA, PTT1_DATA, PTT0_DATA,
47 PTU4_DATA, PTU3_DATA, PTU2_DATA, PTU1_DATA, PTU0_DATA,
48 PTV4_DATA, PTV3_DATA, PTV2_DATA, PTV1_DATA, PTV0_DATA,
49 PINMUX_DATA_END,
51 PINMUX_INPUT_BEGIN,
52 PTA7_IN, PTA6_IN, PTA5_IN, PTA4_IN,
53 PTA3_IN, PTA2_IN, PTA1_IN, PTA0_IN,
54 PTB7_IN, PTB6_IN, PTB5_IN, PTB4_IN,
55 PTB3_IN, PTB2_IN, PTB1_IN, PTB0_IN,
56 PTC7_IN, PTC6_IN, PTC5_IN, PTC4_IN,
57 PTC3_IN, PTC2_IN, PTC1_IN, PTC0_IN,
58 PTD7_IN, PTD6_IN, PTD5_IN, PTD4_IN,
59 PTD3_IN, PTD2_IN, PTD1_IN, PTD0_IN,
60 PTE6_IN, PTE5_IN, PTE4_IN,
61 PTE3_IN, PTE2_IN, PTE1_IN, PTE0_IN,
62 PTF6_IN, PTF5_IN, PTF4_IN,
63 PTF3_IN, PTF2_IN, PTF1_IN, PTF0_IN,
64 PTG6_IN, PTG5_IN, PTG4_IN,
65 PTG3_IN, PTG2_IN, PTG1_IN, PTG0_IN,
66 PTH6_IN, PTH5_IN, PTH4_IN,
67 PTH3_IN, PTH2_IN, PTH1_IN, PTH0_IN,
68 PTJ6_IN, PTJ5_IN, PTJ4_IN,
69 PTJ3_IN, PTJ2_IN, PTJ1_IN, PTJ0_IN,
70 PTK3_IN, PTK2_IN, PTK1_IN, PTK0_IN,
71 PTL7_IN, PTL6_IN, PTL5_IN, PTL4_IN, PTL3_IN,
72 PTM7_IN, PTM6_IN, PTM5_IN, PTM4_IN,
73 PTM3_IN, PTM2_IN, PTM1_IN, PTM0_IN,
74 PTP4_IN, PTP3_IN, PTP2_IN, PTP1_IN, PTP0_IN,
75 PTR7_IN, PTR6_IN, PTR5_IN, PTR4_IN,
76 PTR3_IN, PTR2_IN, PTR1_IN, PTR0_IN,
77 PTS4_IN, PTS3_IN, PTS2_IN, PTS1_IN, PTS0_IN,
78 PTT4_IN, PTT3_IN, PTT2_IN, PTT1_IN, PTT0_IN,
79 PTU4_IN, PTU3_IN, PTU2_IN, PTU1_IN, PTU0_IN,
80 PTV4_IN, PTV3_IN, PTV2_IN, PTV1_IN, PTV0_IN,
81 PINMUX_INPUT_END,
83 PINMUX_INPUT_PULLUP_BEGIN,
84 PTA7_IN_PU, PTA6_IN_PU, PTA5_IN_PU, PTA4_IN_PU,
85 PTA3_IN_PU, PTA2_IN_PU, PTA1_IN_PU, PTA0_IN_PU,
86 PTB7_IN_PU, PTB6_IN_PU, PTB5_IN_PU, PTB4_IN_PU,
87 PTB3_IN_PU, PTB2_IN_PU, PTB1_IN_PU, PTB0_IN_PU,
88 PTC7_IN_PU, PTC6_IN_PU, PTC5_IN_PU, PTC4_IN_PU,
89 PTC3_IN_PU, PTC2_IN_PU, PTC1_IN_PU, PTC0_IN_PU,
90 PTD7_IN_PU, PTD6_IN_PU, PTD5_IN_PU, PTD4_IN_PU,
91 PTD3_IN_PU, PTD2_IN_PU, PTD1_IN_PU, PTD0_IN_PU,
92 PTE4_IN_PU, PTE3_IN_PU, PTE2_IN_PU, PTE1_IN_PU, PTE0_IN_PU,
93 PTF0_IN_PU,
94 PTG6_IN_PU, PTG5_IN_PU, PTG4_IN_PU,
95 PTG3_IN_PU, PTG2_IN_PU, PTG1_IN_PU, PTG0_IN_PU,
96 PTH6_IN_PU, PTH5_IN_PU, PTH4_IN_PU,
97 PTH3_IN_PU, PTH2_IN_PU, PTH1_IN_PU, PTH0_IN_PU,
98 PTJ6_IN_PU, PTJ5_IN_PU, PTJ4_IN_PU,
99 PTJ3_IN_PU, PTJ2_IN_PU, PTJ1_IN_PU, PTJ0_IN_PU,
100 PTK3_IN_PU, PTK2_IN_PU, PTK1_IN_PU, PTK0_IN_PU,
101 PTL7_IN_PU, PTL6_IN_PU, PTL5_IN_PU, PTL4_IN_PU, PTL3_IN_PU,
102 PTM7_IN_PU, PTM6_IN_PU, PTM5_IN_PU, PTM4_IN_PU,
103 PTM3_IN_PU, PTM2_IN_PU, PTM1_IN_PU, PTM0_IN_PU,
104 PTP4_IN_PU, PTP3_IN_PU, PTP2_IN_PU, PTP1_IN_PU, PTP0_IN_PU,
105 PTR7_IN_PU, PTR6_IN_PU, PTR5_IN_PU, PTR4_IN_PU,
106 PTR3_IN_PU, PTR2_IN_PU, PTR1_IN_PU, PTR0_IN_PU,
107 PTS4_IN_PU, PTS3_IN_PU, PTS2_IN_PU, PTS1_IN_PU, PTS0_IN_PU,
108 PTT4_IN_PU, PTT3_IN_PU, PTT2_IN_PU, PTT1_IN_PU, PTT0_IN_PU,
109 PTU4_IN_PU, PTU3_IN_PU, PTU2_IN_PU, PTU1_IN_PU, PTU0_IN_PU,
110 PTV4_IN_PU, PTV3_IN_PU, PTV2_IN_PU, PTV1_IN_PU, PTV0_IN_PU,
111 PINMUX_INPUT_PULLUP_END,
113 PINMUX_OUTPUT_BEGIN,
114 PTA7_OUT, PTA6_OUT, PTA5_OUT, PTA4_OUT,
115 PTA3_OUT, PTA2_OUT, PTA1_OUT, PTA0_OUT,
116 PTB7_OUT, PTB6_OUT, PTB5_OUT, PTB4_OUT,
117 PTB3_OUT, PTB2_OUT, PTB1_OUT, PTB0_OUT,
118 PTC7_OUT, PTC6_OUT, PTC5_OUT, PTC4_OUT,
119 PTC3_OUT, PTC2_OUT, PTC1_OUT, PTC0_OUT,
120 PTD7_OUT, PTD6_OUT, PTD5_OUT, PTD4_OUT,
121 PTD3_OUT, PTD2_OUT, PTD1_OUT, PTD0_OUT,
122 PTE4_OUT, PTE3_OUT, PTE2_OUT, PTE1_OUT, PTE0_OUT,
123 PTF0_OUT,
124 PTG6_OUT, PTG5_OUT, PTG4_OUT,
125 PTG3_OUT, PTG2_OUT, PTG1_OUT, PTG0_OUT,
126 PTH6_OUT, PTH5_OUT, PTH4_OUT,
127 PTH3_OUT, PTH2_OUT, PTH1_OUT, PTH0_OUT,
128 PTJ6_OUT, PTJ5_OUT, PTJ4_OUT,
129 PTJ3_OUT, PTJ2_OUT, PTJ1_OUT, PTJ0_OUT,
130 PTK3_OUT, PTK2_OUT, PTK1_OUT, PTK0_OUT,
131 PTL7_OUT, PTL6_OUT, PTL5_OUT, PTL4_OUT, PTL3_OUT,
132 PTM7_OUT, PTM6_OUT, PTM5_OUT, PTM4_OUT,
133 PTM3_OUT, PTM2_OUT, PTM1_OUT, PTM0_OUT,
134 PTP4_OUT, PTP3_OUT, PTP2_OUT, PTP1_OUT, PTP0_OUT,
135 PTR7_OUT, PTR6_OUT, PTR5_OUT, PTR4_OUT,
136 PTR3_OUT, PTR2_OUT, PTR1_OUT, PTR0_OUT,
137 PTS4_OUT, PTS3_OUT, PTS2_OUT, PTS1_OUT, PTS0_OUT,
138 PTT4_OUT, PTT3_OUT, PTT2_OUT, PTT1_OUT, PTT0_OUT,
139 PTU4_OUT, PTU3_OUT, PTU2_OUT, PTU1_OUT, PTU0_OUT,
140 PTV4_OUT, PTV3_OUT, PTV2_OUT, PTV1_OUT, PTV0_OUT,
141 PINMUX_OUTPUT_END,
143 PINMUX_FUNCTION_BEGIN,
144 PTA7_FN, PTA6_FN, PTA5_FN, PTA4_FN,
145 PTA3_FN, PTA2_FN, PTA1_FN, PTA0_FN,
146 PTB7_FN, PTB6_FN, PTB5_FN, PTB4_FN,
147 PTB3_FN, PTB2_FN, PTB1_FN, PTB0_FN,
148 PTC7_FN, PTC6_FN, PTC5_FN, PTC4_FN,
149 PTC3_FN, PTC2_FN, PTC1_FN, PTC0_FN,
150 PTD7_FN, PTD6_FN, PTD5_FN, PTD4_FN,
151 PTD3_FN, PTD2_FN, PTD1_FN, PTD0_FN,
152 PTE6_FN, PTE5_FN, PTE4_FN,
153 PTE3_FN, PTE2_FN, PTE1_FN, PTE0_FN,
154 PTF6_FN, PTF5_FN, PTF4_FN,
155 PTF3_FN, PTF2_FN, PTF1_FN, PTF0_FN,
156 PTG6_FN, PTG5_FN, PTG4_FN,
157 PTG3_FN, PTG2_FN, PTG1_FN, PTG0_FN,
158 PTH6_FN, PTH5_FN, PTH4_FN,
159 PTH3_FN, PTH2_FN, PTH1_FN, PTH0_FN,
160 PTJ6_FN, PTJ5_FN, PTJ4_FN,
161 PTJ3_FN, PTJ2_FN, PTJ1_FN, PTJ0_FN,
162 PTK3_FN, PTK2_FN, PTK1_FN, PTK0_FN,
163 PTL7_FN, PTL6_FN, PTL5_FN, PTL4_FN, PTL3_FN,
164 PTM7_FN, PTM6_FN, PTM5_FN, PTM4_FN,
165 PTM3_FN, PTM2_FN, PTM1_FN, PTM0_FN,
166 PTP4_FN, PTP3_FN, PTP2_FN, PTP1_FN, PTP0_FN,
167 PTR7_FN, PTR6_FN, PTR5_FN, PTR4_FN,
168 PTR3_FN, PTR2_FN, PTR1_FN, PTR0_FN,
169 PTS4_FN, PTS3_FN, PTS2_FN, PTS1_FN, PTS0_FN,
170 PTT4_FN, PTT3_FN, PTT2_FN, PTT1_FN, PTT0_FN,
171 PTU4_FN, PTU3_FN, PTU2_FN, PTU1_FN, PTU0_FN,
172 PTV4_FN, PTV3_FN, PTV2_FN, PTV1_FN, PTV0_FN,
174 PSELA_1_0_00, PSELA_1_0_01, PSELA_1_0_10,
175 PSELA_3_2_00, PSELA_3_2_01, PSELA_3_2_10, PSELA_3_2_11,
176 PSELA_5_4_00, PSELA_5_4_01, PSELA_5_4_10, PSELA_5_4_11,
177 PSELA_7_6_00, PSELA_7_6_01, PSELA_7_6_10,
178 PSELA_9_8_00, PSELA_9_8_01, PSELA_9_8_10,
179 PSELA_11_10_00, PSELA_11_10_01, PSELA_11_10_10,
180 PSELA_13_12_00, PSELA_13_12_10,
181 PSELA_15_14_00, PSELA_15_14_10,
182 PSELB_9_8_00, PSELB_9_8_11,
183 PSELB_11_10_00, PSELB_11_10_01, PSELB_11_10_10, PSELB_11_10_11,
184 PSELB_13_12_00, PSELB_13_12_01, PSELB_13_12_10, PSELB_13_12_11,
185 PSELB_15_14_00, PSELB_15_14_11,
186 PSELC_9_8_00, PSELC_9_8_10,
187 PSELC_11_10_00, PSELC_11_10_10,
188 PSELC_13_12_00, PSELC_13_12_01, PSELC_13_12_10,
189 PSELC_15_14_00, PSELC_15_14_01, PSELC_15_14_10,
190 PSELD_1_0_00, PSELD_1_0_10,
191 PSELD_11_10_00, PSELD_11_10_01,
192 PSELD_15_14_00, PSELD_15_14_01, PSELD_15_14_10,
193 PINMUX_FUNCTION_END,
195 PINMUX_MARK_BEGIN,
196 D31_MARK, D30_MARK, D29_MARK, D28_MARK,
197 D27_MARK, D26_MARK, D25_MARK, D24_MARK,
198 D23_MARK, D22_MARK, D21_MARK, D20_MARK,
199 D19_MARK, D18_MARK, D17_MARK, D16_MARK,
200 IOIS16_MARK, RAS_MARK, CAS_MARK, CKE_MARK,
201 CS5B_CE1A_MARK, CS6B_CE1B_MARK,
202 A25_MARK, A24_MARK, A23_MARK, A22_MARK,
203 A21_MARK, A20_MARK, A19_MARK, A0_MARK,
204 REFOUT_MARK, IRQOUT_MARK,
205 LCD_DATA15_MARK, LCD_DATA14_MARK,
206 LCD_DATA13_MARK, LCD_DATA12_MARK,
207 LCD_DATA11_MARK, LCD_DATA10_MARK,
208 LCD_DATA9_MARK, LCD_DATA8_MARK,
209 LCD_DATA7_MARK, LCD_DATA6_MARK,
210 LCD_DATA5_MARK, LCD_DATA4_MARK,
211 LCD_DATA3_MARK, LCD_DATA2_MARK,
212 LCD_DATA1_MARK, LCD_DATA0_MARK,
213 LCD_M_DISP_MARK,
214 LCD_CL1_MARK, LCD_CL2_MARK,
215 LCD_DON_MARK, LCD_FLM_MARK,
216 LCD_VEPWC_MARK, LCD_VCPWC_MARK,
217 AFE_RXIN_MARK, AFE_RDET_MARK,
218 AFE_FS_MARK, AFE_TXOUT_MARK,
219 AFE_SCLK_MARK, AFE_RLYCNT_MARK,
220 AFE_HC1_MARK,
221 IIC_SCL_MARK, IIC_SDA_MARK,
222 DA1_MARK, DA0_MARK,
223 AN3_MARK, AN2_MARK, AN1_MARK, AN0_MARK, ADTRG_MARK,
224 USB1D_RCV_MARK, USB1D_TXSE0_MARK,
225 USB1D_TXDPLS_MARK, USB1D_DMNS_MARK,
226 USB1D_DPLS_MARK, USB1D_SPEED_MARK,
227 USB1D_TXENL_MARK,
228 USB2_PWR_EN_MARK, USB1_PWR_EN_USBF_UPLUP_MARK, USB1D_SUSPEND_MARK,
229 IRQ5_MARK, IRQ4_MARK,
230 IRQ3_IRL3_MARK, IRQ2_IRL2_MARK,
231 IRQ1_IRL1_MARK, IRQ0_IRL0_MARK,
232 PCC_REG_MARK, PCC_DRV_MARK,
233 PCC_BVD2_MARK, PCC_BVD1_MARK,
234 PCC_CD2_MARK, PCC_CD1_MARK,
235 PCC_RESET_MARK, PCC_RDY_MARK,
236 PCC_VS2_MARK, PCC_VS1_MARK,
237 AUDATA3_MARK, AUDATA2_MARK, AUDATA1_MARK, AUDATA0_MARK,
238 AUDCK_MARK, AUDSYNC_MARK, ASEBRKAK_MARK, TRST_MARK,
239 TMS_MARK, TDO_MARK, TDI_MARK, TCK_MARK,
240 DACK1_MARK, DREQ1_MARK, DACK0_MARK, DREQ0_MARK,
241 TEND1_MARK, TEND0_MARK,
242 SIOF0_SYNC_MARK, SIOF0_MCLK_MARK,
243 SIOF0_TXD_MARK, SIOF0_RXD_MARK,
244 SIOF0_SCK_MARK,
245 SIOF1_SYNC_MARK, SIOF1_MCLK_MARK,
246 SIOF1_TXD_MARK, SIOF1_RXD_MARK,
247 SIOF1_SCK_MARK,
248 SCIF0_TXD_MARK, SCIF0_RXD_MARK,
249 SCIF0_RTS_MARK, SCIF0_CTS_MARK, SCIF0_SCK_MARK,
250 SCIF1_TXD_MARK, SCIF1_RXD_MARK,
251 SCIF1_RTS_MARK, SCIF1_CTS_MARK, SCIF1_SCK_MARK,
252 TPU_TO1_MARK, TPU_TO0_MARK,
253 TPU_TI3B_MARK, TPU_TI3A_MARK,
254 TPU_TI2B_MARK, TPU_TI2A_MARK,
255 TPU_TO3_MARK, TPU_TO2_MARK,
256 SIM_D_MARK, SIM_CLK_MARK, SIM_RST_MARK,
257 MMC_DAT_MARK, MMC_CMD_MARK,
258 MMC_CLK_MARK, MMC_VDDON_MARK,
259 MMC_ODMOD_MARK,
260 STATUS0_MARK, STATUS1_MARK,
261 PINMUX_MARK_END,
264 static pinmux_enum_t pinmux_data[] = {
265 /* PTA GPIO */
266 PINMUX_DATA(PTA7_DATA, PTA7_IN, PTA7_OUT, PTA7_IN_PU),
267 PINMUX_DATA(PTA6_DATA, PTA6_IN, PTA6_OUT, PTA6_IN_PU),
268 PINMUX_DATA(PTA5_DATA, PTA5_IN, PTA5_OUT, PTA5_IN_PU),
269 PINMUX_DATA(PTA4_DATA, PTA4_IN, PTA4_OUT, PTA4_IN_PU),
270 PINMUX_DATA(PTA3_DATA, PTA3_IN, PTA3_OUT, PTA3_IN_PU),
271 PINMUX_DATA(PTA2_DATA, PTA2_IN, PTA2_OUT, PTA2_IN_PU),
272 PINMUX_DATA(PTA1_DATA, PTA1_IN, PTA1_OUT, PTA1_IN_PU),
273 PINMUX_DATA(PTA0_DATA, PTA0_IN, PTA0_OUT, PTA0_IN_PU),
275 /* PTB GPIO */
276 PINMUX_DATA(PTB7_DATA, PTB7_IN, PTB7_OUT, PTB7_IN_PU),
277 PINMUX_DATA(PTB6_DATA, PTB6_IN, PTB6_OUT, PTB6_IN_PU),
278 PINMUX_DATA(PTB5_DATA, PTB5_IN, PTB5_OUT, PTB5_IN_PU),
279 PINMUX_DATA(PTB4_DATA, PTB4_IN, PTB4_OUT, PTB4_IN_PU),
280 PINMUX_DATA(PTB3_DATA, PTB3_IN, PTB3_OUT, PTB3_IN_PU),
281 PINMUX_DATA(PTB2_DATA, PTB2_IN, PTB2_OUT, PTB2_IN_PU),
282 PINMUX_DATA(PTB1_DATA, PTB1_IN, PTB1_OUT, PTB1_IN_PU),
283 PINMUX_DATA(PTB0_DATA, PTB0_IN, PTB0_OUT, PTB0_IN_PU),
285 /* PTC GPIO */
286 PINMUX_DATA(PTC7_DATA, PTC7_IN, PTC7_OUT, PTC7_IN_PU),
287 PINMUX_DATA(PTC6_DATA, PTC6_IN, PTC6_OUT, PTC6_IN_PU),
288 PINMUX_DATA(PTC5_DATA, PTC5_IN, PTC5_OUT, PTC5_IN_PU),
289 PINMUX_DATA(PTC4_DATA, PTC4_IN, PTC4_OUT, PTC4_IN_PU),
290 PINMUX_DATA(PTC3_DATA, PTC3_IN, PTC3_OUT, PTC3_IN_PU),
291 PINMUX_DATA(PTC2_DATA, PTC2_IN, PTC2_OUT, PTC2_IN_PU),
292 PINMUX_DATA(PTC1_DATA, PTC1_IN, PTC1_OUT, PTC1_IN_PU),
293 PINMUX_DATA(PTC0_DATA, PTC0_IN, PTC0_OUT, PTC0_IN_PU),
295 /* PTD GPIO */
296 PINMUX_DATA(PTD7_DATA, PTD7_IN, PTD7_OUT, PTD7_IN_PU),
297 PINMUX_DATA(PTD6_DATA, PTD6_IN, PTD6_OUT, PTD6_IN_PU),
298 PINMUX_DATA(PTD5_DATA, PTD5_IN, PTD5_OUT, PTD5_IN_PU),
299 PINMUX_DATA(PTD4_DATA, PTD4_IN, PTD4_OUT, PTD4_IN_PU),
300 PINMUX_DATA(PTD3_DATA, PTD3_IN, PTD3_OUT, PTD3_IN_PU),
301 PINMUX_DATA(PTD2_DATA, PTD2_IN, PTD2_OUT, PTD2_IN_PU),
302 PINMUX_DATA(PTD1_DATA, PTD1_IN, PTD1_OUT, PTD1_IN_PU),
303 PINMUX_DATA(PTD0_DATA, PTD0_IN, PTD0_OUT, PTD0_IN_PU),
305 /* PTE GPIO */
306 PINMUX_DATA(PTE6_DATA, PTE6_IN),
307 PINMUX_DATA(PTE5_DATA, PTE5_IN),
308 PINMUX_DATA(PTE4_DATA, PTE4_IN, PTE4_OUT, PTE4_IN_PU),
309 PINMUX_DATA(PTE3_DATA, PTE3_IN, PTE3_OUT, PTE3_IN_PU),
310 PINMUX_DATA(PTE2_DATA, PTE2_IN, PTE2_OUT, PTE2_IN_PU),
311 PINMUX_DATA(PTE1_DATA, PTE1_IN, PTE1_OUT, PTE1_IN_PU),
312 PINMUX_DATA(PTE0_DATA, PTE0_IN, PTE0_OUT, PTE0_IN_PU),
314 /* PTF GPIO */
315 PINMUX_DATA(PTF6_DATA, PTF6_IN),
316 PINMUX_DATA(PTF5_DATA, PTF5_IN),
317 PINMUX_DATA(PTF4_DATA, PTF4_IN),
318 PINMUX_DATA(PTF3_DATA, PTF3_IN),
319 PINMUX_DATA(PTF2_DATA, PTF2_IN),
320 PINMUX_DATA(PTF1_DATA, PTF1_IN),
321 PINMUX_DATA(PTF0_DATA, PTF0_IN, PTF0_OUT, PTF0_IN_PU),
323 /* PTG GPIO */
324 PINMUX_DATA(PTG6_DATA, PTG6_IN, PTG6_OUT, PTG6_IN_PU),
325 PINMUX_DATA(PTG5_DATA, PTG5_IN, PTG5_OUT, PTG5_IN_PU),
326 PINMUX_DATA(PTG4_DATA, PTG4_IN, PTG4_OUT, PTG4_IN_PU),
327 PINMUX_DATA(PTG3_DATA, PTG3_IN, PTG3_OUT, PTG3_IN_PU),
328 PINMUX_DATA(PTG2_DATA, PTG2_IN, PTG2_OUT, PTG2_IN_PU),
329 PINMUX_DATA(PTG1_DATA, PTG1_IN, PTG1_OUT, PTG1_IN_PU),
330 PINMUX_DATA(PTG0_DATA, PTG0_IN, PTG0_OUT, PTG0_IN_PU),
332 /* PTH GPIO */
333 PINMUX_DATA(PTH6_DATA, PTH6_IN, PTH6_OUT, PTH6_IN_PU),
334 PINMUX_DATA(PTH5_DATA, PTH5_IN, PTH5_OUT, PTH5_IN_PU),
335 PINMUX_DATA(PTH4_DATA, PTH4_IN, PTH4_OUT, PTH4_IN_PU),
336 PINMUX_DATA(PTH3_DATA, PTH3_IN, PTH3_OUT, PTH3_IN_PU),
337 PINMUX_DATA(PTH2_DATA, PTH2_IN, PTH2_OUT, PTH2_IN_PU),
338 PINMUX_DATA(PTH1_DATA, PTH1_IN, PTH1_OUT, PTH1_IN_PU),
339 PINMUX_DATA(PTH0_DATA, PTH0_IN, PTH0_OUT, PTH0_IN_PU),
341 /* PTJ GPIO */
342 PINMUX_DATA(PTJ6_DATA, PTJ6_IN, PTJ6_OUT, PTJ6_IN_PU),
343 PINMUX_DATA(PTJ5_DATA, PTJ5_IN, PTJ5_OUT, PTJ5_IN_PU),
344 PINMUX_DATA(PTJ4_DATA, PTJ4_IN, PTJ4_OUT, PTJ4_IN_PU),
345 PINMUX_DATA(PTJ3_DATA, PTJ3_IN, PTJ3_OUT, PTJ3_IN_PU),
346 PINMUX_DATA(PTJ2_DATA, PTJ2_IN, PTJ2_OUT, PTJ2_IN_PU),
347 PINMUX_DATA(PTJ1_DATA, PTJ1_IN, PTJ1_OUT, PTJ1_IN_PU),
348 PINMUX_DATA(PTJ0_DATA, PTJ0_IN, PTJ0_OUT, PTJ0_IN_PU),
350 /* PTK GPIO */
351 PINMUX_DATA(PTK3_DATA, PTK3_IN, PTK3_OUT, PTK3_IN_PU),
352 PINMUX_DATA(PTK2_DATA, PTK2_IN, PTK2_OUT, PTK2_IN_PU),
353 PINMUX_DATA(PTK1_DATA, PTK1_IN, PTK1_OUT, PTK1_IN_PU),
354 PINMUX_DATA(PTK0_DATA, PTK0_IN, PTK0_OUT, PTK0_IN_PU),
356 /* PTL GPIO */
357 PINMUX_DATA(PTL7_DATA, PTL7_IN, PTL7_OUT, PTL7_IN_PU),
358 PINMUX_DATA(PTL6_DATA, PTL6_IN, PTL6_OUT, PTL6_IN_PU),
359 PINMUX_DATA(PTL5_DATA, PTL5_IN, PTL5_OUT, PTL5_IN_PU),
360 PINMUX_DATA(PTL4_DATA, PTL4_IN, PTL4_OUT, PTL4_IN_PU),
361 PINMUX_DATA(PTL3_DATA, PTL3_IN, PTL3_OUT, PTL3_IN_PU),
363 /* PTM GPIO */
364 PINMUX_DATA(PTM7_DATA, PTM7_IN, PTM7_OUT, PTM7_IN_PU),
365 PINMUX_DATA(PTM6_DATA, PTM6_IN, PTM6_OUT, PTM6_IN_PU),
366 PINMUX_DATA(PTM5_DATA, PTM5_IN, PTM5_OUT, PTM5_IN_PU),
367 PINMUX_DATA(PTM4_DATA, PTM4_IN, PTM4_OUT, PTM4_IN_PU),
368 PINMUX_DATA(PTM3_DATA, PTM3_IN, PTM3_OUT, PTM3_IN_PU),
369 PINMUX_DATA(PTM2_DATA, PTM2_IN, PTM2_OUT, PTM2_IN_PU),
370 PINMUX_DATA(PTM1_DATA, PTM1_IN, PTM1_OUT, PTM1_IN_PU),
371 PINMUX_DATA(PTM0_DATA, PTM0_IN, PTM0_OUT, PTM0_IN_PU),
373 /* PTP GPIO */
374 PINMUX_DATA(PTP4_DATA, PTP4_IN, PTP4_OUT, PTP4_IN_PU),
375 PINMUX_DATA(PTP3_DATA, PTP3_IN, PTP3_OUT, PTP3_IN_PU),
376 PINMUX_DATA(PTP2_DATA, PTP2_IN, PTP2_OUT, PTP2_IN_PU),
377 PINMUX_DATA(PTP1_DATA, PTP1_IN, PTP1_OUT, PTP1_IN_PU),
378 PINMUX_DATA(PTP0_DATA, PTP0_IN, PTP0_OUT, PTP0_IN_PU),
380 /* PTR GPIO */
381 PINMUX_DATA(PTR7_DATA, PTR7_IN, PTR7_OUT, PTR7_IN_PU),
382 PINMUX_DATA(PTR6_DATA, PTR6_IN, PTR6_OUT, PTR6_IN_PU),
383 PINMUX_DATA(PTR5_DATA, PTR5_IN, PTR5_OUT, PTR5_IN_PU),
384 PINMUX_DATA(PTR4_DATA, PTR4_IN, PTR4_OUT, PTR4_IN_PU),
385 PINMUX_DATA(PTR3_DATA, PTR3_IN, PTR3_OUT, PTR3_IN_PU),
386 PINMUX_DATA(PTR2_DATA, PTR2_IN, PTR2_OUT, PTR2_IN_PU),
387 PINMUX_DATA(PTR1_DATA, PTR1_IN, PTR1_OUT, PTR1_IN_PU),
388 PINMUX_DATA(PTR0_DATA, PTR0_IN, PTR0_OUT, PTR0_IN_PU),
390 /* PTS GPIO */
391 PINMUX_DATA(PTS4_DATA, PTS4_IN, PTS4_OUT, PTS4_IN_PU),
392 PINMUX_DATA(PTS3_DATA, PTS3_IN, PTS3_OUT, PTS3_IN_PU),
393 PINMUX_DATA(PTS2_DATA, PTS2_IN, PTS2_OUT, PTS2_IN_PU),
394 PINMUX_DATA(PTS1_DATA, PTS1_IN, PTS1_OUT, PTS1_IN_PU),
395 PINMUX_DATA(PTS0_DATA, PTS0_IN, PTS0_OUT, PTS0_IN_PU),
397 /* PTT GPIO */
398 PINMUX_DATA(PTT4_DATA, PTT4_IN, PTT4_OUT, PTT4_IN_PU),
399 PINMUX_DATA(PTT3_DATA, PTT3_IN, PTT3_OUT, PTT3_IN_PU),
400 PINMUX_DATA(PTT2_DATA, PTT2_IN, PTT2_OUT, PTT2_IN_PU),
401 PINMUX_DATA(PTT1_DATA, PTT1_IN, PTT1_OUT, PTT1_IN_PU),
402 PINMUX_DATA(PTT0_DATA, PTT0_IN, PTT0_OUT, PTT0_IN_PU),
404 /* PTU GPIO */
405 PINMUX_DATA(PTU4_DATA, PTU4_IN, PTU4_OUT, PTU4_IN_PU),
406 PINMUX_DATA(PTU3_DATA, PTU3_IN, PTU3_OUT, PTU3_IN_PU),
407 PINMUX_DATA(PTU2_DATA, PTU2_IN, PTU2_OUT, PTU2_IN_PU),
408 PINMUX_DATA(PTU1_DATA, PTU1_IN, PTU1_OUT, PTU1_IN_PU),
409 PINMUX_DATA(PTU0_DATA, PTU0_IN, PTU0_OUT, PTU0_IN_PU),
411 /* PTV GPIO */
412 PINMUX_DATA(PTV4_DATA, PTV4_IN, PTV4_OUT, PTV4_IN_PU),
413 PINMUX_DATA(PTV3_DATA, PTV3_IN, PTV3_OUT, PTV3_IN_PU),
414 PINMUX_DATA(PTV2_DATA, PTV2_IN, PTV2_OUT, PTV2_IN_PU),
415 PINMUX_DATA(PTV1_DATA, PTV1_IN, PTV1_OUT, PTV1_IN_PU),
416 PINMUX_DATA(PTV0_DATA, PTV0_IN, PTV0_OUT, PTV0_IN_PU),
418 /* PTA FN */
419 PINMUX_DATA(D23_MARK, PTA7_FN),
420 PINMUX_DATA(D22_MARK, PTA6_FN),
421 PINMUX_DATA(D21_MARK, PTA5_FN),
422 PINMUX_DATA(D20_MARK, PTA4_FN),
423 PINMUX_DATA(D19_MARK, PTA3_FN),
424 PINMUX_DATA(D18_MARK, PTA2_FN),
425 PINMUX_DATA(D17_MARK, PTA1_FN),
426 PINMUX_DATA(D16_MARK, PTA0_FN),
428 /* PTB FN */
429 PINMUX_DATA(D31_MARK, PTB7_FN),
430 PINMUX_DATA(D30_MARK, PTB6_FN),
431 PINMUX_DATA(D29_MARK, PTB5_FN),
432 PINMUX_DATA(D28_MARK, PTB4_FN),
433 PINMUX_DATA(D27_MARK, PTB3_FN),
434 PINMUX_DATA(D26_MARK, PTB2_FN),
435 PINMUX_DATA(D25_MARK, PTB1_FN),
436 PINMUX_DATA(D24_MARK, PTB0_FN),
438 /* PTC FN */
439 PINMUX_DATA(LCD_DATA7_MARK, PTC7_FN),
440 PINMUX_DATA(LCD_DATA6_MARK, PTC6_FN),
441 PINMUX_DATA(LCD_DATA5_MARK, PTC5_FN),
442 PINMUX_DATA(LCD_DATA4_MARK, PTC4_FN),
443 PINMUX_DATA(LCD_DATA3_MARK, PTC3_FN),
444 PINMUX_DATA(LCD_DATA2_MARK, PTC2_FN),
445 PINMUX_DATA(LCD_DATA1_MARK, PTC1_FN),
446 PINMUX_DATA(LCD_DATA0_MARK, PTC0_FN),
448 /* PTD FN */
449 PINMUX_DATA(LCD_DATA15_MARK, PTD7_FN),
450 PINMUX_DATA(LCD_DATA14_MARK, PTD6_FN),
451 PINMUX_DATA(LCD_DATA13_MARK, PTD5_FN),
452 PINMUX_DATA(LCD_DATA12_MARK, PTD4_FN),
453 PINMUX_DATA(LCD_DATA11_MARK, PTD3_FN),
454 PINMUX_DATA(LCD_DATA10_MARK, PTD2_FN),
455 PINMUX_DATA(LCD_DATA9_MARK, PTD1_FN),
456 PINMUX_DATA(LCD_DATA8_MARK, PTD0_FN),
458 /* PTE FN */
459 PINMUX_DATA(IIC_SCL_MARK, PSELB_9_8_00, PTE6_FN),
460 PINMUX_DATA(AFE_RXIN_MARK, PSELB_9_8_11, PTE6_FN),
461 PINMUX_DATA(IIC_SDA_MARK, PSELB_9_8_00, PTE5_FN),
462 PINMUX_DATA(AFE_RDET_MARK, PSELB_9_8_11, PTE5_FN),
463 PINMUX_DATA(LCD_M_DISP_MARK, PTE4_FN),
464 PINMUX_DATA(LCD_CL1_MARK, PTE3_FN),
465 PINMUX_DATA(LCD_CL2_MARK, PTE2_FN),
466 PINMUX_DATA(LCD_DON_MARK, PTE1_FN),
467 PINMUX_DATA(LCD_FLM_MARK, PTE0_FN),
469 /* PTF FN */
470 PINMUX_DATA(DA1_MARK, PTF6_FN),
471 PINMUX_DATA(DA0_MARK, PTF5_FN),
472 PINMUX_DATA(AN3_MARK, PTF4_FN),
473 PINMUX_DATA(AN2_MARK, PTF3_FN),
474 PINMUX_DATA(AN1_MARK, PTF2_FN),
475 PINMUX_DATA(AN0_MARK, PTF1_FN),
476 PINMUX_DATA(ADTRG_MARK, PTF0_FN),
478 /* PTG FN */
479 PINMUX_DATA(USB1D_RCV_MARK, PSELA_3_2_00, PTG6_FN),
480 PINMUX_DATA(AFE_FS_MARK, PSELA_3_2_01, PTG6_FN),
481 PINMUX_DATA(PCC_REG_MARK, PSELA_3_2_10, PTG6_FN),
482 PINMUX_DATA(IRQ5_MARK, PSELA_3_2_11, PTG6_FN),
483 PINMUX_DATA(USB1D_TXSE0_MARK, PSELA_5_4_00, PTG5_FN),
484 PINMUX_DATA(AFE_TXOUT_MARK, PSELA_5_4_01, PTG5_FN),
485 PINMUX_DATA(PCC_DRV_MARK, PSELA_5_4_10, PTG5_FN),
486 PINMUX_DATA(IRQ4_MARK, PSELA_5_4_11, PTG5_FN),
487 PINMUX_DATA(USB1D_TXDPLS_MARK, PSELA_7_6_00, PTG4_FN),
488 PINMUX_DATA(AFE_SCLK_MARK, PSELA_7_6_01, PTG4_FN),
489 PINMUX_DATA(IOIS16_MARK, PSELA_7_6_10, PTG4_FN),
490 PINMUX_DATA(USB1D_DMNS_MARK, PSELA_9_8_00, PTG3_FN),
491 PINMUX_DATA(AFE_RLYCNT_MARK, PSELA_9_8_01, PTG3_FN),
492 PINMUX_DATA(PCC_BVD2_MARK, PSELA_9_8_10, PTG3_FN),
493 PINMUX_DATA(USB1D_DPLS_MARK, PSELA_11_10_00, PTG2_FN),
494 PINMUX_DATA(AFE_HC1_MARK, PSELA_11_10_01, PTG2_FN),
495 PINMUX_DATA(PCC_BVD1_MARK, PSELA_11_10_10, PTG2_FN),
496 PINMUX_DATA(USB1D_SPEED_MARK, PSELA_13_12_00, PTG1_FN),
497 PINMUX_DATA(PCC_CD2_MARK, PSELA_13_12_10, PTG1_FN),
498 PINMUX_DATA(USB1D_TXENL_MARK, PSELA_15_14_00, PTG0_FN),
499 PINMUX_DATA(PCC_CD1_MARK, PSELA_15_14_10, PTG0_FN),
501 /* PTH FN */
502 PINMUX_DATA(RAS_MARK, PTH6_FN),
503 PINMUX_DATA(CAS_MARK, PTH5_FN),
504 PINMUX_DATA(CKE_MARK, PTH4_FN),
505 PINMUX_DATA(STATUS1_MARK, PTH3_FN),
506 PINMUX_DATA(STATUS0_MARK, PTH2_FN),
507 PINMUX_DATA(USB2_PWR_EN_MARK, PTH1_FN),
508 PINMUX_DATA(USB1_PWR_EN_USBF_UPLUP_MARK, PTH0_FN),
510 /* PTJ FN */
511 PINMUX_DATA(AUDCK_MARK, PTJ6_FN),
512 PINMUX_DATA(ASEBRKAK_MARK, PTJ5_FN),
513 PINMUX_DATA(AUDATA3_MARK, PTJ4_FN),
514 PINMUX_DATA(AUDATA2_MARK, PTJ3_FN),
515 PINMUX_DATA(AUDATA1_MARK, PTJ2_FN),
516 PINMUX_DATA(AUDATA0_MARK, PTJ1_FN),
517 PINMUX_DATA(AUDSYNC_MARK, PTJ0_FN),
519 /* PTK FN */
520 PINMUX_DATA(PCC_RESET_MARK, PTK3_FN),
521 PINMUX_DATA(PCC_RDY_MARK, PTK2_FN),
522 PINMUX_DATA(PCC_VS2_MARK, PTK1_FN),
523 PINMUX_DATA(PCC_VS1_MARK, PTK0_FN),
525 /* PTL FN */
526 PINMUX_DATA(TRST_MARK, PTL7_FN),
527 PINMUX_DATA(TMS_MARK, PTL6_FN),
528 PINMUX_DATA(TDO_MARK, PTL5_FN),
529 PINMUX_DATA(TDI_MARK, PTL4_FN),
530 PINMUX_DATA(TCK_MARK, PTL3_FN),
532 /* PTM FN */
533 PINMUX_DATA(DREQ1_MARK, PTM7_FN),
534 PINMUX_DATA(DREQ0_MARK, PTM6_FN),
535 PINMUX_DATA(DACK1_MARK, PTM5_FN),
536 PINMUX_DATA(DACK0_MARK, PTM4_FN),
537 PINMUX_DATA(TEND1_MARK, PTM3_FN),
538 PINMUX_DATA(TEND0_MARK, PTM2_FN),
539 PINMUX_DATA(CS5B_CE1A_MARK, PTM1_FN),
540 PINMUX_DATA(CS6B_CE1B_MARK, PTM0_FN),
542 /* PTP FN */
543 PINMUX_DATA(USB1D_SUSPEND_MARK, PSELA_1_0_00, PTP4_FN),
544 PINMUX_DATA(REFOUT_MARK, PSELA_1_0_01, PTP4_FN),
545 PINMUX_DATA(IRQOUT_MARK, PSELA_1_0_10, PTP4_FN),
546 PINMUX_DATA(IRQ3_IRL3_MARK, PTP3_FN),
547 PINMUX_DATA(IRQ2_IRL2_MARK, PTP2_FN),
548 PINMUX_DATA(IRQ1_IRL1_MARK, PTP1_FN),
549 PINMUX_DATA(IRQ0_IRL0_MARK, PTP0_FN),
551 /* PTR FN */
552 PINMUX_DATA(A25_MARK, PTR7_FN),
553 PINMUX_DATA(A24_MARK, PTR6_FN),
554 PINMUX_DATA(A23_MARK, PTR5_FN),
555 PINMUX_DATA(A22_MARK, PTR4_FN),
556 PINMUX_DATA(A21_MARK, PTR3_FN),
557 PINMUX_DATA(A20_MARK, PTR2_FN),
558 PINMUX_DATA(A19_MARK, PTR1_FN),
559 PINMUX_DATA(A0_MARK, PTR0_FN),
561 /* PTS FN */
562 PINMUX_DATA(SIOF0_SYNC_MARK, PTS4_FN),
563 PINMUX_DATA(SIOF0_MCLK_MARK, PTS3_FN),
564 PINMUX_DATA(SIOF0_TXD_MARK, PTS2_FN),
565 PINMUX_DATA(SIOF0_RXD_MARK, PTS1_FN),
566 PINMUX_DATA(SIOF0_SCK_MARK, PTS0_FN),
568 /* PTT FN */
569 PINMUX_DATA(SCIF0_CTS_MARK, PSELB_15_14_00, PTT4_FN),
570 PINMUX_DATA(TPU_TO1_MARK, PSELB_15_14_11, PTT4_FN),
571 PINMUX_DATA(SCIF0_RTS_MARK, PSELB_15_14_00, PTT3_FN),
572 PINMUX_DATA(TPU_TO0_MARK, PSELB_15_14_11, PTT3_FN),
573 PINMUX_DATA(SCIF0_TXD_MARK, PTT2_FN),
574 PINMUX_DATA(SCIF0_RXD_MARK, PTT1_FN),
575 PINMUX_DATA(SCIF0_SCK_MARK, PTT0_FN),
577 /* PTU FN */
578 PINMUX_DATA(SIOF1_SYNC_MARK, PTU4_FN),
579 PINMUX_DATA(SIOF1_MCLK_MARK, PSELD_11_10_00, PTU3_FN),
580 PINMUX_DATA(TPU_TI3B_MARK, PSELD_11_10_01, PTU3_FN),
581 PINMUX_DATA(SIOF1_TXD_MARK, PSELD_15_14_00, PTU2_FN),
582 PINMUX_DATA(TPU_TI3A_MARK, PSELD_15_14_01, PTU2_FN),
583 PINMUX_DATA(MMC_DAT_MARK, PSELD_15_14_10, PTU2_FN),
584 PINMUX_DATA(SIOF1_RXD_MARK, PSELC_13_12_00, PTU1_FN),
585 PINMUX_DATA(TPU_TI2B_MARK, PSELC_13_12_01, PTU1_FN),
586 PINMUX_DATA(MMC_CMD_MARK, PSELC_13_12_10, PTU1_FN),
587 PINMUX_DATA(SIOF1_SCK_MARK, PSELC_15_14_00, PTU0_FN),
588 PINMUX_DATA(TPU_TI2A_MARK, PSELC_15_14_01, PTU0_FN),
589 PINMUX_DATA(MMC_CLK_MARK, PSELC_15_14_10, PTU0_FN),
591 /* PTV FN */
592 PINMUX_DATA(SCIF1_CTS_MARK, PSELB_11_10_00, PTV4_FN),
593 PINMUX_DATA(TPU_TO3_MARK, PSELB_11_10_01, PTV4_FN),
594 PINMUX_DATA(MMC_VDDON_MARK, PSELB_11_10_10, PTV4_FN),
595 PINMUX_DATA(LCD_VEPWC_MARK, PSELB_11_10_11, PTV4_FN),
596 PINMUX_DATA(SCIF1_RTS_MARK, PSELB_13_12_00, PTV3_FN),
597 PINMUX_DATA(TPU_TO2_MARK, PSELB_13_12_01, PTV3_FN),
598 PINMUX_DATA(MMC_ODMOD_MARK, PSELB_13_12_10, PTV3_FN),
599 PINMUX_DATA(LCD_VCPWC_MARK, PSELB_13_12_11, PTV3_FN),
600 PINMUX_DATA(SCIF1_TXD_MARK, PSELC_9_8_00, PTV2_FN),
601 PINMUX_DATA(SIM_D_MARK, PSELC_9_8_10, PTV2_FN),
602 PINMUX_DATA(SCIF1_RXD_MARK, PSELC_11_10_00, PTV1_FN),
603 PINMUX_DATA(SIM_RST_MARK, PSELC_11_10_10, PTV1_FN),
604 PINMUX_DATA(SCIF1_SCK_MARK, PSELD_1_0_00, PTV0_FN),
605 PINMUX_DATA(SIM_CLK_MARK, PSELD_1_0_10, PTV0_FN),
608 static struct pinmux_gpio pinmux_gpios[] = {
609 /* PTA */
610 PINMUX_GPIO(GPIO_PTA7, PTA7_DATA),
611 PINMUX_GPIO(GPIO_PTA6, PTA6_DATA),
612 PINMUX_GPIO(GPIO_PTA5, PTA5_DATA),
613 PINMUX_GPIO(GPIO_PTA4, PTA4_DATA),
614 PINMUX_GPIO(GPIO_PTA3, PTA3_DATA),
615 PINMUX_GPIO(GPIO_PTA2, PTA2_DATA),
616 PINMUX_GPIO(GPIO_PTA1, PTA1_DATA),
617 PINMUX_GPIO(GPIO_PTA0, PTA0_DATA),
619 /* PTB */
620 PINMUX_GPIO(GPIO_PTB7, PTB7_DATA),
621 PINMUX_GPIO(GPIO_PTB6, PTB6_DATA),
622 PINMUX_GPIO(GPIO_PTB5, PTB5_DATA),
623 PINMUX_GPIO(GPIO_PTB4, PTB4_DATA),
624 PINMUX_GPIO(GPIO_PTB3, PTB3_DATA),
625 PINMUX_GPIO(GPIO_PTB2, PTB2_DATA),
626 PINMUX_GPIO(GPIO_PTB1, PTB1_DATA),
627 PINMUX_GPIO(GPIO_PTB0, PTB0_DATA),
629 /* PTC */
630 PINMUX_GPIO(GPIO_PTC7, PTC7_DATA),
631 PINMUX_GPIO(GPIO_PTC6, PTC6_DATA),
632 PINMUX_GPIO(GPIO_PTC5, PTC5_DATA),
633 PINMUX_GPIO(GPIO_PTC4, PTC4_DATA),
634 PINMUX_GPIO(GPIO_PTC3, PTC3_DATA),
635 PINMUX_GPIO(GPIO_PTC2, PTC2_DATA),
636 PINMUX_GPIO(GPIO_PTC1, PTC1_DATA),
637 PINMUX_GPIO(GPIO_PTC0, PTC0_DATA),
639 /* PTD */
640 PINMUX_GPIO(GPIO_PTD7, PTD7_DATA),
641 PINMUX_GPIO(GPIO_PTD6, PTD6_DATA),
642 PINMUX_GPIO(GPIO_PTD5, PTD5_DATA),
643 PINMUX_GPIO(GPIO_PTD4, PTD4_DATA),
644 PINMUX_GPIO(GPIO_PTD3, PTD3_DATA),
645 PINMUX_GPIO(GPIO_PTD2, PTD2_DATA),
646 PINMUX_GPIO(GPIO_PTD1, PTD1_DATA),
647 PINMUX_GPIO(GPIO_PTD0, PTD0_DATA),
649 /* PTE */
650 PINMUX_GPIO(GPIO_PTE6, PTE6_DATA),
651 PINMUX_GPIO(GPIO_PTE5, PTE5_DATA),
652 PINMUX_GPIO(GPIO_PTE4, PTE4_DATA),
653 PINMUX_GPIO(GPIO_PTE3, PTE3_DATA),
654 PINMUX_GPIO(GPIO_PTE2, PTE2_DATA),
655 PINMUX_GPIO(GPIO_PTE1, PTE1_DATA),
656 PINMUX_GPIO(GPIO_PTE0, PTE0_DATA),
658 /* PTF */
659 PINMUX_GPIO(GPIO_PTF6, PTF6_DATA),
660 PINMUX_GPIO(GPIO_PTF5, PTF5_DATA),
661 PINMUX_GPIO(GPIO_PTF4, PTF4_DATA),
662 PINMUX_GPIO(GPIO_PTF3, PTF3_DATA),
663 PINMUX_GPIO(GPIO_PTF2, PTF2_DATA),
664 PINMUX_GPIO(GPIO_PTF1, PTF1_DATA),
665 PINMUX_GPIO(GPIO_PTF0, PTF0_DATA),
667 /* PTG */
668 PINMUX_GPIO(GPIO_PTG6, PTG6_DATA),
669 PINMUX_GPIO(GPIO_PTG5, PTG5_DATA),
670 PINMUX_GPIO(GPIO_PTG4, PTG4_DATA),
671 PINMUX_GPIO(GPIO_PTG3, PTG3_DATA),
672 PINMUX_GPIO(GPIO_PTG2, PTG2_DATA),
673 PINMUX_GPIO(GPIO_PTG1, PTG1_DATA),
674 PINMUX_GPIO(GPIO_PTG0, PTG0_DATA),
676 /* PTH */
677 PINMUX_GPIO(GPIO_PTH6, PTH6_DATA),
678 PINMUX_GPIO(GPIO_PTH5, PTH5_DATA),
679 PINMUX_GPIO(GPIO_PTH4, PTH4_DATA),
680 PINMUX_GPIO(GPIO_PTH3, PTH3_DATA),
681 PINMUX_GPIO(GPIO_PTH2, PTH2_DATA),
682 PINMUX_GPIO(GPIO_PTH1, PTH1_DATA),
683 PINMUX_GPIO(GPIO_PTH0, PTH0_DATA),
685 /* PTJ */
686 PINMUX_GPIO(GPIO_PTJ6, PTJ6_DATA),
687 PINMUX_GPIO(GPIO_PTJ5, PTJ5_DATA),
688 PINMUX_GPIO(GPIO_PTJ4, PTJ4_DATA),
689 PINMUX_GPIO(GPIO_PTJ3, PTJ3_DATA),
690 PINMUX_GPIO(GPIO_PTJ2, PTJ2_DATA),
691 PINMUX_GPIO(GPIO_PTJ1, PTJ1_DATA),
692 PINMUX_GPIO(GPIO_PTJ0, PTJ0_DATA),
694 /* PTK */
695 PINMUX_GPIO(GPIO_PTK3, PTK3_DATA),
696 PINMUX_GPIO(GPIO_PTK2, PTK2_DATA),
697 PINMUX_GPIO(GPIO_PTK1, PTK1_DATA),
698 PINMUX_GPIO(GPIO_PTK0, PTK0_DATA),
700 /* PTL */
701 PINMUX_GPIO(GPIO_PTL7, PTL7_DATA),
702 PINMUX_GPIO(GPIO_PTL6, PTL6_DATA),
703 PINMUX_GPIO(GPIO_PTL5, PTL5_DATA),
704 PINMUX_GPIO(GPIO_PTL4, PTL4_DATA),
705 PINMUX_GPIO(GPIO_PTL3, PTL3_DATA),
707 /* PTM */
708 PINMUX_GPIO(GPIO_PTM7, PTM7_DATA),
709 PINMUX_GPIO(GPIO_PTM6, PTM6_DATA),
710 PINMUX_GPIO(GPIO_PTM5, PTM5_DATA),
711 PINMUX_GPIO(GPIO_PTM4, PTM4_DATA),
712 PINMUX_GPIO(GPIO_PTM3, PTM3_DATA),
713 PINMUX_GPIO(GPIO_PTM2, PTM2_DATA),
714 PINMUX_GPIO(GPIO_PTM1, PTM1_DATA),
715 PINMUX_GPIO(GPIO_PTM0, PTM0_DATA),
717 /* PTP */
718 PINMUX_GPIO(GPIO_PTP4, PTP4_DATA),
719 PINMUX_GPIO(GPIO_PTP3, PTP3_DATA),
720 PINMUX_GPIO(GPIO_PTP2, PTP2_DATA),
721 PINMUX_GPIO(GPIO_PTP1, PTP1_DATA),
722 PINMUX_GPIO(GPIO_PTP0, PTP0_DATA),
724 /* PTR */
725 PINMUX_GPIO(GPIO_PTR7, PTR7_DATA),
726 PINMUX_GPIO(GPIO_PTR6, PTR6_DATA),
727 PINMUX_GPIO(GPIO_PTR5, PTR5_DATA),
728 PINMUX_GPIO(GPIO_PTR4, PTR4_DATA),
729 PINMUX_GPIO(GPIO_PTR3, PTR3_DATA),
730 PINMUX_GPIO(GPIO_PTR2, PTR2_DATA),
731 PINMUX_GPIO(GPIO_PTR1, PTR1_DATA),
732 PINMUX_GPIO(GPIO_PTR0, PTR0_DATA),
734 /* PTS */
735 PINMUX_GPIO(GPIO_PTS4, PTS4_DATA),
736 PINMUX_GPIO(GPIO_PTS3, PTS3_DATA),
737 PINMUX_GPIO(GPIO_PTS2, PTS2_DATA),
738 PINMUX_GPIO(GPIO_PTS1, PTS1_DATA),
739 PINMUX_GPIO(GPIO_PTS0, PTS0_DATA),
741 /* PTT */
742 PINMUX_GPIO(GPIO_PTT4, PTT4_DATA),
743 PINMUX_GPIO(GPIO_PTT3, PTT3_DATA),
744 PINMUX_GPIO(GPIO_PTT2, PTT2_DATA),
745 PINMUX_GPIO(GPIO_PTT1, PTT1_DATA),
746 PINMUX_GPIO(GPIO_PTT0, PTT0_DATA),
748 /* PTU */
749 PINMUX_GPIO(GPIO_PTU4, PTU4_DATA),
750 PINMUX_GPIO(GPIO_PTU3, PTU3_DATA),
751 PINMUX_GPIO(GPIO_PTU2, PTU2_DATA),
752 PINMUX_GPIO(GPIO_PTU1, PTU1_DATA),
753 PINMUX_GPIO(GPIO_PTU0, PTU0_DATA),
755 /* PTV */
756 PINMUX_GPIO(GPIO_PTV4, PTV4_DATA),
757 PINMUX_GPIO(GPIO_PTV3, PTV3_DATA),
758 PINMUX_GPIO(GPIO_PTV2, PTV2_DATA),
759 PINMUX_GPIO(GPIO_PTV1, PTV1_DATA),
760 PINMUX_GPIO(GPIO_PTV0, PTV0_DATA),
762 /* BSC */
763 PINMUX_GPIO(GPIO_FN_D31, D31_MARK),
764 PINMUX_GPIO(GPIO_FN_D30, D30_MARK),
765 PINMUX_GPIO(GPIO_FN_D29, D29_MARK),
766 PINMUX_GPIO(GPIO_FN_D28, D28_MARK),
767 PINMUX_GPIO(GPIO_FN_D27, D27_MARK),
768 PINMUX_GPIO(GPIO_FN_D26, D26_MARK),
769 PINMUX_GPIO(GPIO_FN_D25, D25_MARK),
770 PINMUX_GPIO(GPIO_FN_D24, D24_MARK),
771 PINMUX_GPIO(GPIO_FN_D23, D23_MARK),
772 PINMUX_GPIO(GPIO_FN_D22, D22_MARK),
773 PINMUX_GPIO(GPIO_FN_D21, D21_MARK),
774 PINMUX_GPIO(GPIO_FN_D20, D20_MARK),
775 PINMUX_GPIO(GPIO_FN_D19, D19_MARK),
776 PINMUX_GPIO(GPIO_FN_D18, D18_MARK),
777 PINMUX_GPIO(GPIO_FN_D17, D17_MARK),
778 PINMUX_GPIO(GPIO_FN_D16, D16_MARK),
779 PINMUX_GPIO(GPIO_FN_IOIS16, IOIS16_MARK),
780 PINMUX_GPIO(GPIO_FN_RAS, RAS_MARK),
781 PINMUX_GPIO(GPIO_FN_CAS, CAS_MARK),
782 PINMUX_GPIO(GPIO_FN_CKE, CKE_MARK),
783 PINMUX_GPIO(GPIO_FN_CS5B_CE1A, CS5B_CE1A_MARK),
784 PINMUX_GPIO(GPIO_FN_CS6B_CE1B, CS6B_CE1B_MARK),
785 PINMUX_GPIO(GPIO_FN_A25, A25_MARK),
786 PINMUX_GPIO(GPIO_FN_A24, A24_MARK),
787 PINMUX_GPIO(GPIO_FN_A23, A23_MARK),
788 PINMUX_GPIO(GPIO_FN_A22, A22_MARK),
789 PINMUX_GPIO(GPIO_FN_A21, A21_MARK),
790 PINMUX_GPIO(GPIO_FN_A20, A20_MARK),
791 PINMUX_GPIO(GPIO_FN_A19, A19_MARK),
792 PINMUX_GPIO(GPIO_FN_A0, A0_MARK),
793 PINMUX_GPIO(GPIO_FN_REFOUT, REFOUT_MARK),
794 PINMUX_GPIO(GPIO_FN_IRQOUT, IRQOUT_MARK),
796 /* LCDC */
797 PINMUX_GPIO(GPIO_FN_LCD_DATA15, LCD_DATA15_MARK),
798 PINMUX_GPIO(GPIO_FN_LCD_DATA14, LCD_DATA14_MARK),
799 PINMUX_GPIO(GPIO_FN_LCD_DATA13, LCD_DATA13_MARK),
800 PINMUX_GPIO(GPIO_FN_LCD_DATA12, LCD_DATA12_MARK),
801 PINMUX_GPIO(GPIO_FN_LCD_DATA11, LCD_DATA11_MARK),
802 PINMUX_GPIO(GPIO_FN_LCD_DATA10, LCD_DATA10_MARK),
803 PINMUX_GPIO(GPIO_FN_LCD_DATA9, LCD_DATA9_MARK),
804 PINMUX_GPIO(GPIO_FN_LCD_DATA8, LCD_DATA8_MARK),
805 PINMUX_GPIO(GPIO_FN_LCD_DATA7, LCD_DATA7_MARK),
806 PINMUX_GPIO(GPIO_FN_LCD_DATA6, LCD_DATA6_MARK),
807 PINMUX_GPIO(GPIO_FN_LCD_DATA5, LCD_DATA5_MARK),
808 PINMUX_GPIO(GPIO_FN_LCD_DATA4, LCD_DATA4_MARK),
809 PINMUX_GPIO(GPIO_FN_LCD_DATA3, LCD_DATA3_MARK),
810 PINMUX_GPIO(GPIO_FN_LCD_DATA2, LCD_DATA2_MARK),
811 PINMUX_GPIO(GPIO_FN_LCD_DATA1, LCD_DATA1_MARK),
812 PINMUX_GPIO(GPIO_FN_LCD_DATA0, LCD_DATA0_MARK),
813 PINMUX_GPIO(GPIO_FN_LCD_M_DISP, LCD_M_DISP_MARK),
814 PINMUX_GPIO(GPIO_FN_LCD_CL1, LCD_CL1_MARK),
815 PINMUX_GPIO(GPIO_FN_LCD_CL2, LCD_CL2_MARK),
816 PINMUX_GPIO(GPIO_FN_LCD_DON, LCD_DON_MARK),
817 PINMUX_GPIO(GPIO_FN_LCD_FLM, LCD_FLM_MARK),
818 PINMUX_GPIO(GPIO_FN_LCD_VEPWC, LCD_VEPWC_MARK),
819 PINMUX_GPIO(GPIO_FN_LCD_VCPWC, LCD_VCPWC_MARK),
821 /* AFEIF */
822 PINMUX_GPIO(GPIO_FN_AFE_RXIN, AFE_RXIN_MARK),
823 PINMUX_GPIO(GPIO_FN_AFE_RDET, AFE_RDET_MARK),
824 PINMUX_GPIO(GPIO_FN_AFE_FS, AFE_FS_MARK),
825 PINMUX_GPIO(GPIO_FN_AFE_TXOUT, AFE_TXOUT_MARK),
826 PINMUX_GPIO(GPIO_FN_AFE_SCLK, AFE_SCLK_MARK),
827 PINMUX_GPIO(GPIO_FN_AFE_RLYCNT, AFE_RLYCNT_MARK),
828 PINMUX_GPIO(GPIO_FN_AFE_HC1, AFE_HC1_MARK),
830 /* IIC */
831 PINMUX_GPIO(GPIO_FN_IIC_SCL, IIC_SCL_MARK),
832 PINMUX_GPIO(GPIO_FN_IIC_SDA, IIC_SDA_MARK),
834 /* DAC */
835 PINMUX_GPIO(GPIO_FN_DA1, DA1_MARK),
836 PINMUX_GPIO(GPIO_FN_DA0, DA0_MARK),
838 /* ADC */
839 PINMUX_GPIO(GPIO_FN_AN3, AN3_MARK),
840 PINMUX_GPIO(GPIO_FN_AN2, AN2_MARK),
841 PINMUX_GPIO(GPIO_FN_AN1, AN1_MARK),
842 PINMUX_GPIO(GPIO_FN_AN0, AN0_MARK),
843 PINMUX_GPIO(GPIO_FN_ADTRG, ADTRG_MARK),
845 /* USB */
846 PINMUX_GPIO(GPIO_FN_USB1D_RCV, USB1D_RCV_MARK),
847 PINMUX_GPIO(GPIO_FN_USB1D_TXSE0, USB1D_TXSE0_MARK),
848 PINMUX_GPIO(GPIO_FN_USB1D_TXDPLS, USB1D_TXDPLS_MARK),
849 PINMUX_GPIO(GPIO_FN_USB1D_DMNS, USB1D_DMNS_MARK),
850 PINMUX_GPIO(GPIO_FN_USB1D_DPLS, USB1D_DPLS_MARK),
851 PINMUX_GPIO(GPIO_FN_USB1D_SPEED, USB1D_SPEED_MARK),
852 PINMUX_GPIO(GPIO_FN_USB1D_TXENL, USB1D_TXENL_MARK),
854 PINMUX_GPIO(GPIO_FN_USB2_PWR_EN, USB2_PWR_EN_MARK),
855 PINMUX_GPIO(GPIO_FN_USB1_PWR_EN_USBF_UPLUP,
856 USB1_PWR_EN_USBF_UPLUP_MARK),
857 PINMUX_GPIO(GPIO_FN_USB1D_SUSPEND, USB1D_SUSPEND_MARK),
859 /* INTC */
860 PINMUX_GPIO(GPIO_FN_IRQ5, IRQ5_MARK),
861 PINMUX_GPIO(GPIO_FN_IRQ4, IRQ4_MARK),
862 PINMUX_GPIO(GPIO_FN_IRQ3_IRL3, IRQ3_IRL3_MARK),
863 PINMUX_GPIO(GPIO_FN_IRQ2_IRL2, IRQ2_IRL2_MARK),
864 PINMUX_GPIO(GPIO_FN_IRQ1_IRL1, IRQ1_IRL1_MARK),
865 PINMUX_GPIO(GPIO_FN_IRQ0_IRL0, IRQ0_IRL0_MARK),
867 /* PCC */
868 PINMUX_GPIO(GPIO_FN_PCC_REG, PCC_REG_MARK),
869 PINMUX_GPIO(GPIO_FN_PCC_DRV, PCC_DRV_MARK),
870 PINMUX_GPIO(GPIO_FN_PCC_BVD2, PCC_BVD2_MARK),
871 PINMUX_GPIO(GPIO_FN_PCC_BVD1, PCC_BVD1_MARK),
872 PINMUX_GPIO(GPIO_FN_PCC_CD2, PCC_CD2_MARK),
873 PINMUX_GPIO(GPIO_FN_PCC_CD1, PCC_CD1_MARK),
874 PINMUX_GPIO(GPIO_FN_PCC_RESET, PCC_RESET_MARK),
875 PINMUX_GPIO(GPIO_FN_PCC_RDY, PCC_RDY_MARK),
876 PINMUX_GPIO(GPIO_FN_PCC_VS2, PCC_VS2_MARK),
877 PINMUX_GPIO(GPIO_FN_PCC_VS1, PCC_VS1_MARK),
879 /* HUDI */
880 PINMUX_GPIO(GPIO_FN_AUDATA3, AUDATA3_MARK),
881 PINMUX_GPIO(GPIO_FN_AUDATA2, AUDATA2_MARK),
882 PINMUX_GPIO(GPIO_FN_AUDATA1, AUDATA1_MARK),
883 PINMUX_GPIO(GPIO_FN_AUDATA0, AUDATA0_MARK),
884 PINMUX_GPIO(GPIO_FN_AUDCK, AUDCK_MARK),
885 PINMUX_GPIO(GPIO_FN_AUDSYNC, AUDSYNC_MARK),
886 PINMUX_GPIO(GPIO_FN_ASEBRKAK, ASEBRKAK_MARK),
887 PINMUX_GPIO(GPIO_FN_TRST, TRST_MARK),
888 PINMUX_GPIO(GPIO_FN_TMS, TMS_MARK),
889 PINMUX_GPIO(GPIO_FN_TDO, TDO_MARK),
890 PINMUX_GPIO(GPIO_FN_TDI, TDI_MARK),
891 PINMUX_GPIO(GPIO_FN_TCK, TCK_MARK),
893 /* DMAC */
894 PINMUX_GPIO(GPIO_FN_DACK1, DACK1_MARK),
895 PINMUX_GPIO(GPIO_FN_DREQ1, DREQ1_MARK),
896 PINMUX_GPIO(GPIO_FN_DACK0, DACK0_MARK),
897 PINMUX_GPIO(GPIO_FN_DREQ0, DREQ0_MARK),
898 PINMUX_GPIO(GPIO_FN_TEND1, TEND1_MARK),
899 PINMUX_GPIO(GPIO_FN_TEND0, TEND0_MARK),
901 /* SIOF0 */
902 PINMUX_GPIO(GPIO_FN_SIOF0_SYNC, SIOF0_SYNC_MARK),
903 PINMUX_GPIO(GPIO_FN_SIOF0_MCLK, SIOF0_MCLK_MARK),
904 PINMUX_GPIO(GPIO_FN_SIOF0_TXD, SIOF0_TXD_MARK),
905 PINMUX_GPIO(GPIO_FN_SIOF0_RXD, SIOF0_RXD_MARK),
906 PINMUX_GPIO(GPIO_FN_SIOF0_SCK, SIOF0_SCK_MARK),
908 /* SIOF1 */
909 PINMUX_GPIO(GPIO_FN_SIOF1_SYNC, SIOF1_SYNC_MARK),
910 PINMUX_GPIO(GPIO_FN_SIOF1_MCLK, SIOF1_MCLK_MARK),
911 PINMUX_GPIO(GPIO_FN_SIOF1_TXD, SIOF1_TXD_MARK),
912 PINMUX_GPIO(GPIO_FN_SIOF1_RXD, SIOF1_RXD_MARK),
913 PINMUX_GPIO(GPIO_FN_SIOF1_SCK, SIOF1_SCK_MARK),
915 /* SCIF0 */
916 PINMUX_GPIO(GPIO_FN_SCIF0_TXD, SCIF0_TXD_MARK),
917 PINMUX_GPIO(GPIO_FN_SCIF0_RXD, SCIF0_RXD_MARK),
918 PINMUX_GPIO(GPIO_FN_SCIF0_RTS, SCIF0_RTS_MARK),
919 PINMUX_GPIO(GPIO_FN_SCIF0_CTS, SCIF0_CTS_MARK),
920 PINMUX_GPIO(GPIO_FN_SCIF0_SCK, SCIF0_SCK_MARK),
922 /* SCIF1 */
923 PINMUX_GPIO(GPIO_FN_SCIF1_TXD, SCIF1_TXD_MARK),
924 PINMUX_GPIO(GPIO_FN_SCIF1_RXD, SCIF1_RXD_MARK),
925 PINMUX_GPIO(GPIO_FN_SCIF1_RTS, SCIF1_RTS_MARK),
926 PINMUX_GPIO(GPIO_FN_SCIF1_CTS, SCIF1_CTS_MARK),
927 PINMUX_GPIO(GPIO_FN_SCIF1_SCK, SCIF1_SCK_MARK),
929 /* TPU */
930 PINMUX_GPIO(GPIO_FN_TPU_TO1, TPU_TO1_MARK),
931 PINMUX_GPIO(GPIO_FN_TPU_TO0, TPU_TO0_MARK),
932 PINMUX_GPIO(GPIO_FN_TPU_TI3B, TPU_TI3B_MARK),
933 PINMUX_GPIO(GPIO_FN_TPU_TI3A, TPU_TI3A_MARK),
934 PINMUX_GPIO(GPIO_FN_TPU_TI2B, TPU_TI2B_MARK),
935 PINMUX_GPIO(GPIO_FN_TPU_TI2A, TPU_TI2A_MARK),
936 PINMUX_GPIO(GPIO_FN_TPU_TO3, TPU_TO3_MARK),
937 PINMUX_GPIO(GPIO_FN_TPU_TO2, TPU_TO2_MARK),
939 /* SIM */
940 PINMUX_GPIO(GPIO_FN_SIM_D, SIM_D_MARK),
941 PINMUX_GPIO(GPIO_FN_SIM_CLK, SIM_CLK_MARK),
942 PINMUX_GPIO(GPIO_FN_SIM_RST, SIM_RST_MARK),
944 /* MMC */
945 PINMUX_GPIO(GPIO_FN_MMC_DAT, MMC_DAT_MARK),
946 PINMUX_GPIO(GPIO_FN_MMC_CMD, MMC_CMD_MARK),
947 PINMUX_GPIO(GPIO_FN_MMC_CLK, MMC_CLK_MARK),
948 PINMUX_GPIO(GPIO_FN_MMC_VDDON, MMC_VDDON_MARK),
949 PINMUX_GPIO(GPIO_FN_MMC_ODMOD, MMC_ODMOD_MARK),
951 /* SYSC */
952 PINMUX_GPIO(GPIO_FN_STATUS0, STATUS0_MARK),
953 PINMUX_GPIO(GPIO_FN_STATUS1, STATUS1_MARK),
956 static struct pinmux_cfg_reg pinmux_config_regs[] = {
957 { PINMUX_CFG_REG("PACR", 0xa4050100, 16, 2) {
958 PTA7_FN, PTA7_OUT, PTA7_IN_PU, PTA7_IN,
959 PTA6_FN, PTA6_OUT, PTA6_IN_PU, PTA6_IN,
960 PTA5_FN, PTA5_OUT, PTA5_IN_PU, PTA5_IN,
961 PTA4_FN, PTA4_OUT, PTA4_IN_PU, PTA4_IN,
962 PTA3_FN, PTA3_OUT, PTA3_IN_PU, PTA3_IN,
963 PTA2_FN, PTA2_OUT, PTA2_IN_PU, PTA2_IN,
964 PTA1_FN, PTA1_OUT, PTA1_IN_PU, PTA1_IN,
965 PTA0_FN, PTA0_OUT, PTA0_IN_PU, PTA0_IN }
967 { PINMUX_CFG_REG("PBCR", 0xa4050102, 16, 2) {
968 PTB7_FN, PTB7_OUT, PTB7_IN_PU, PTB7_IN,
969 PTB6_FN, PTB6_OUT, PTB6_IN_PU, PTB6_IN,
970 PTB5_FN, PTB5_OUT, PTB5_IN_PU, PTB5_IN,
971 PTB4_FN, PTB4_OUT, PTB4_IN_PU, PTB4_IN,
972 PTB3_FN, PTB3_OUT, PTB3_IN_PU, PTB3_IN,
973 PTB2_FN, PTB2_OUT, PTB2_IN_PU, PTB2_IN,
974 PTB1_FN, PTB1_OUT, PTB1_IN_PU, PTB1_IN,
975 PTB0_FN, PTB0_OUT, PTB0_IN_PU, PTB0_IN }
977 { PINMUX_CFG_REG("PCCR", 0xa4050104, 16, 2) {
978 PTC7_FN, PTC7_OUT, PTC7_IN_PU, PTC7_IN,
979 PTC6_FN, PTC6_OUT, PTC6_IN_PU, PTC6_IN,
980 PTC5_FN, PTC5_OUT, PTC5_IN_PU, PTC5_IN,
981 PTC4_FN, PTC4_OUT, PTC4_IN_PU, PTC4_IN,
982 PTC3_FN, PTC3_OUT, PTC3_IN_PU, PTC3_IN,
983 PTC2_FN, PTC2_OUT, PTC2_IN_PU, PTC2_IN,
984 PTC1_FN, PTC1_OUT, PTC1_IN_PU, PTC1_IN,
985 PTC0_FN, PTC0_OUT, PTC0_IN_PU, PTC0_IN }
987 { PINMUX_CFG_REG("PDCR", 0xa4050106, 16, 2) {
988 PTD7_FN, PTD7_OUT, PTD7_IN_PU, PTD7_IN,
989 PTD6_FN, PTD6_OUT, PTD6_IN_PU, PTD6_IN,
990 PTD5_FN, PTD5_OUT, PTD5_IN_PU, PTD5_IN,
991 PTD4_FN, PTD4_OUT, PTD4_IN_PU, PTD4_IN,
992 PTD3_FN, PTD3_OUT, PTD3_IN_PU, PTD3_IN,
993 PTD2_FN, PTD2_OUT, PTD2_IN_PU, PTD2_IN,
994 PTD1_FN, PTD1_OUT, PTD1_IN_PU, PTD1_IN,
995 PTD0_FN, PTD0_OUT, PTD0_IN_PU, PTD0_IN }
997 { PINMUX_CFG_REG("PECR", 0xa4050108, 16, 2) {
998 0, 0, 0, 0,
999 PTE6_FN, 0, 0, PTE6_IN,
1000 PTE5_FN, 0, 0, PTE5_IN,
1001 PTE4_FN, PTE4_OUT, PTE4_IN_PU, PTE4_IN,
1002 PTE3_FN, PTE3_OUT, PTE3_IN_PU, PTE3_IN,
1003 PTE2_FN, PTE2_OUT, PTE2_IN_PU, PTE2_IN,
1004 PTE1_FN, PTE1_OUT, PTE1_IN_PU, PTE1_IN,
1005 PTE0_FN, PTE0_OUT, PTE0_IN_PU, PTE0_IN }
1007 { PINMUX_CFG_REG("PFCR", 0xa405010a, 16, 2) {
1008 0, 0, 0, 0,
1009 PTF6_FN, 0, 0, PTF6_IN,
1010 PTF5_FN, 0, 0, PTF5_IN,
1011 PTF4_FN, 0, 0, PTF4_IN,
1012 PTF3_FN, 0, 0, PTF3_IN,
1013 PTF2_FN, 0, 0, PTF2_IN,
1014 PTF1_FN, 0, 0, PTF1_IN,
1015 PTF0_FN, 0, 0, PTF0_IN }
1017 { PINMUX_CFG_REG("PGCR", 0xa405010c, 16, 2) {
1018 0, 0, 0, 0,
1019 PTG6_FN, PTG6_OUT, PTG6_IN_PU, PTG6_IN,
1020 PTG5_FN, PTG5_OUT, PTG5_IN_PU, PTG5_IN,
1021 PTG4_FN, PTG4_OUT, PTG4_IN_PU, PTG4_IN,
1022 PTG3_FN, PTG3_OUT, PTG3_IN_PU, PTG3_IN,
1023 PTG2_FN, PTG2_OUT, PTG2_IN_PU, PTG2_IN,
1024 PTG1_FN, PTG1_OUT, PTG1_IN_PU, PTG1_IN,
1025 PTG0_FN, PTG0_OUT, PTG0_IN_PU, PTG0_IN }
1027 { PINMUX_CFG_REG("PHCR", 0xa405010e, 16, 2) {
1028 0, 0, 0, 0,
1029 PTH6_FN, PTH6_OUT, PTH6_IN_PU, PTH6_IN,
1030 PTH5_FN, PTH5_OUT, PTH5_IN_PU, PTH5_IN,
1031 PTH4_FN, PTH4_OUT, PTH4_IN_PU, PTH4_IN,
1032 PTH3_FN, PTH3_OUT, PTH3_IN_PU, PTH3_IN,
1033 PTH2_FN, PTH2_OUT, PTH2_IN_PU, PTH2_IN,
1034 PTH1_FN, PTH1_OUT, PTH1_IN_PU, PTH1_IN,
1035 PTH0_FN, PTH0_OUT, PTH0_IN_PU, PTH0_IN }
1037 { PINMUX_CFG_REG("PJCR", 0xa4050110, 16, 2) {
1038 0, 0, 0, 0,
1039 PTJ6_FN, PTJ6_OUT, PTJ6_IN_PU, PTJ6_IN,
1040 PTJ5_FN, PTJ5_OUT, PTJ5_IN_PU, PTJ5_IN,
1041 PTJ4_FN, PTJ4_OUT, PTJ4_IN_PU, PTJ4_IN,
1042 PTJ3_FN, PTJ3_OUT, PTJ3_IN_PU, PTJ3_IN,
1043 PTJ2_FN, PTJ2_OUT, PTJ2_IN_PU, PTJ2_IN,
1044 PTJ1_FN, PTJ1_OUT, PTJ1_IN_PU, PTJ1_IN,
1045 PTJ0_FN, PTJ0_OUT, PTJ0_IN_PU, PTJ0_IN }
1047 { PINMUX_CFG_REG("PKCR", 0xa4050112, 16, 2) {
1048 0, 0, 0, 0,
1049 0, 0, 0, 0,
1050 0, 0, 0, 0,
1051 0, 0, 0, 0,
1052 PTK3_FN, PTK3_OUT, PTK3_IN_PU, PTK3_IN,
1053 PTK2_FN, PTK2_OUT, PTK2_IN_PU, PTK2_IN,
1054 PTK1_FN, PTK1_OUT, PTK1_IN_PU, PTK1_IN,
1055 PTK0_FN, PTK0_OUT, PTK0_IN_PU, PTK0_IN }
1057 { PINMUX_CFG_REG("PLCR", 0xa4050114, 16, 2) {
1058 PTL7_FN, PTL7_OUT, PTL7_IN_PU, PTL7_IN,
1059 PTL6_FN, PTL6_OUT, PTL6_IN_PU, PTL6_IN,
1060 PTL5_FN, PTL5_OUT, PTL5_IN_PU, PTL5_IN,
1061 PTL4_FN, PTL4_OUT, PTL4_IN_PU, PTL4_IN,
1062 PTL3_FN, PTL3_OUT, PTL3_IN_PU, PTL3_IN,
1063 0, 0, 0, 0,
1064 0, 0, 0, 0,
1065 0, 0, 0, 0 }
1067 { PINMUX_CFG_REG("PMCR", 0xa4050116, 16, 2) {
1068 PTM7_FN, PTM7_OUT, PTM7_IN_PU, PTM7_IN,
1069 PTM6_FN, PTM6_OUT, PTM6_IN_PU, PTM6_IN,
1070 PTM5_FN, PTM5_OUT, PTM5_IN_PU, PTM5_IN,
1071 PTM4_FN, PTM4_OUT, PTM4_IN_PU, PTM4_IN,
1072 PTM3_FN, PTM3_OUT, PTM3_IN_PU, PTM3_IN,
1073 PTM2_FN, PTM2_OUT, PTM2_IN_PU, PTM2_IN,
1074 PTM1_FN, PTM1_OUT, PTM1_IN_PU, PTM1_IN,
1075 PTM0_FN, PTM0_OUT, PTM0_IN_PU, PTM0_IN }
1077 { PINMUX_CFG_REG("PPCR", 0xa4050118, 16, 2) {
1078 0, 0, 0, 0,
1079 0, 0, 0, 0,
1080 0, 0, 0, 0,
1081 PTP4_FN, PTP4_OUT, PTP4_IN_PU, PTP4_IN,
1082 PTP3_FN, PTP3_OUT, PTP3_IN_PU, PTP3_IN,
1083 PTP2_FN, PTP2_OUT, PTP2_IN_PU, PTP2_IN,
1084 PTP1_FN, PTP1_OUT, PTP1_IN_PU, PTP1_IN,
1085 PTP0_FN, PTP0_OUT, PTP0_IN_PU, PTP0_IN }
1087 { PINMUX_CFG_REG("PRCR", 0xa405011a, 16, 2) {
1088 PTR7_FN, PTR7_OUT, PTR7_IN_PU, PTR7_IN,
1089 PTR6_FN, PTR6_OUT, PTR6_IN_PU, PTR6_IN,
1090 PTR5_FN, PTR5_OUT, PTR5_IN_PU, PTR5_IN,
1091 PTR4_FN, PTR4_OUT, PTR4_IN_PU, PTR4_IN,
1092 PTR3_FN, PTR3_OUT, PTR3_IN_PU, PTR3_IN,
1093 PTR2_FN, PTR2_OUT, PTR2_IN_PU, PTR2_IN,
1094 PTR1_FN, PTR1_OUT, PTR1_IN_PU, PTR1_IN,
1095 PTR0_FN, PTR0_OUT, PTR0_IN_PU, PTR0_IN }
1097 { PINMUX_CFG_REG("PSCR", 0xa405011c, 16, 2) {
1098 0, 0, 0, 0,
1099 0, 0, 0, 0,
1100 0, 0, 0, 0,
1101 PTS4_FN, PTS4_OUT, PTS4_IN_PU, PTS4_IN,
1102 PTS3_FN, PTS3_OUT, PTS3_IN_PU, PTS3_IN,
1103 PTS2_FN, PTS2_OUT, PTS2_IN_PU, PTS2_IN,
1104 PTS1_FN, PTS1_OUT, PTS1_IN_PU, PTS1_IN,
1105 PTS0_FN, PTS0_OUT, PTS0_IN_PU, PTS0_IN }
1107 { PINMUX_CFG_REG("PTCR", 0xa405011e, 16, 2) {
1108 0, 0, 0, 0,
1109 0, 0, 0, 0,
1110 0, 0, 0, 0,
1111 PTT4_FN, PTT4_OUT, PTT4_IN_PU, PTT4_IN,
1112 PTT3_FN, PTT3_OUT, PTT3_IN_PU, PTT3_IN,
1113 PTT2_FN, PTT2_OUT, PTT2_IN_PU, PTT2_IN,
1114 PTT1_FN, PTT1_OUT, PTT1_IN_PU, PTT1_IN,
1115 PTT0_FN, PTT0_OUT, PTT0_IN_PU, PTT0_IN }
1117 { PINMUX_CFG_REG("PUCR", 0xa4050120, 16, 2) {
1118 0, 0, 0, 0,
1119 0, 0, 0, 0,
1120 0, 0, 0, 0,
1121 PTU4_FN, PTU4_OUT, PTU4_IN_PU, PTU4_IN,
1122 PTU3_FN, PTU3_OUT, PTU3_IN_PU, PTU3_IN,
1123 PTU2_FN, PTU2_OUT, PTU2_IN_PU, PTU2_IN,
1124 PTU1_FN, PTU1_OUT, PTU1_IN_PU, PTU1_IN,
1125 PTU0_FN, PTU0_OUT, PTU0_IN_PU, PTU0_IN }
1127 { PINMUX_CFG_REG("PVCR", 0xa4050122, 16, 2) {
1128 0, 0, 0, 0,
1129 0, 0, 0, 0,
1130 0, 0, 0, 0,
1131 PTV4_FN, PTV4_OUT, PTV4_IN_PU, PTV4_IN,
1132 PTV3_FN, PTV3_OUT, PTV3_IN_PU, PTV3_IN,
1133 PTV2_FN, PTV2_OUT, PTV2_IN_PU, PTV2_IN,
1134 PTV1_FN, PTV1_OUT, PTV1_IN_PU, PTV1_IN,
1135 PTV0_FN, PTV0_OUT, PTV0_IN_PU, PTV0_IN }
1140 static struct pinmux_data_reg pinmux_data_regs[] = {
1141 { PINMUX_DATA_REG("PADR", 0xa4050140, 8) {
1142 PTA7_DATA, PTA6_DATA, PTA5_DATA, PTA4_DATA,
1143 PTA3_DATA, PTA2_DATA, PTA1_DATA, PTA0_DATA }
1145 { PINMUX_DATA_REG("PBDR", 0xa4050142, 8) {
1146 PTB7_DATA, PTB6_DATA, PTB5_DATA, PTB4_DATA,
1147 PTB3_DATA, PTB2_DATA, PTB1_DATA, PTB0_DATA }
1149 { PINMUX_DATA_REG("PCDR", 0xa4050144, 8) {
1150 PTC7_DATA, PTC6_DATA, PTC5_DATA, PTC4_DATA,
1151 PTC3_DATA, PTC2_DATA, PTC1_DATA, PTC0_DATA }
1153 { PINMUX_DATA_REG("PDDR", 0xa4050126, 8) {
1154 PTD7_DATA, PTD6_DATA, PTD5_DATA, PTD4_DATA,
1155 PTD3_DATA, PTD2_DATA, PTD1_DATA, PTD0_DATA }
1157 { PINMUX_DATA_REG("PEDR", 0xa4050148, 8) {
1158 0, PTE6_DATA, PTE5_DATA, PTE4_DATA,
1159 PTE3_DATA, PTE2_DATA, PTE1_DATA, PTE0_DATA }
1161 { PINMUX_DATA_REG("PFDR", 0xa405014a, 8) {
1162 0, PTF6_DATA, PTF5_DATA, PTF4_DATA,
1163 PTF3_DATA, PTF2_DATA, PTF1_DATA, PTF0_DATA }
1165 { PINMUX_DATA_REG("PGDR", 0xa405014c, 8) {
1166 0, PTG6_DATA, PTG5_DATA, PTG4_DATA,
1167 PTG3_DATA, PTG2_DATA, PTG1_DATA, PTG0_DATA }
1169 { PINMUX_DATA_REG("PHDR", 0xa405014e, 8) {
1170 0, PTH6_DATA, PTH5_DATA, PTH4_DATA,
1171 PTH3_DATA, PTH2_DATA, PTH1_DATA, PTH0_DATA }
1173 { PINMUX_DATA_REG("PJDR", 0xa4050150, 8) {
1174 0, PTJ6_DATA, PTJ5_DATA, PTJ4_DATA,
1175 PTJ3_DATA, PTJ2_DATA, PTJ1_DATA, PTJ0_DATA }
1177 { PINMUX_DATA_REG("PKDR", 0xa4050152, 8) {
1178 0, 0, 0, 0,
1179 PTK3_DATA, PTK2_DATA, PTK1_DATA, PTK0_DATA }
1181 { PINMUX_DATA_REG("PLDR", 0xa4050154, 8) {
1182 PTL7_DATA, PTL6_DATA, PTL5_DATA, PTL4_DATA,
1183 PTL3_DATA, 0, 0, 0 }
1185 { PINMUX_DATA_REG("PMDR", 0xa4050156, 8) {
1186 PTM7_DATA, PTM6_DATA, PTM5_DATA, PTM4_DATA,
1187 PTM3_DATA, PTM2_DATA, PTM1_DATA, PTM0_DATA }
1189 { PINMUX_DATA_REG("PPDR", 0xa4050158, 8) {
1190 0, 0, 0, PTP4_DATA,
1191 PTP3_DATA, PTP2_DATA, PTP1_DATA, PTP0_DATA }
1193 { PINMUX_DATA_REG("PRDR", 0xa405015a, 8) {
1194 PTR7_DATA, PTR6_DATA, PTR5_DATA, PTR4_DATA,
1195 PTR3_DATA, PTR2_DATA, PTR1_DATA, PTR0_DATA }
1197 { PINMUX_DATA_REG("PSDR", 0xa405015c, 8) {
1198 0, 0, 0, PTS4_DATA,
1199 PTS3_DATA, PTS2_DATA, PTS1_DATA, PTS0_DATA }
1201 { PINMUX_DATA_REG("PTDR", 0xa405015e, 8) {
1202 0, 0, 0, PTT4_DATA,
1203 PTT3_DATA, PTT2_DATA, PTT1_DATA, PTT0_DATA }
1205 { PINMUX_DATA_REG("PUDR", 0xa4050160, 8) {
1206 0, 0, 0, PTU4_DATA,
1207 PTU3_DATA, PTU2_DATA, PTU1_DATA, PTU0_DATA }
1209 { PINMUX_DATA_REG("PVDR", 0xa4050162, 8) {
1210 0, 0, 0, PTV4_DATA,
1211 PTV3_DATA, PTV2_DATA, PTV1_DATA, PTV0_DATA }
1213 { },
1216 static struct pinmux_info sh7720_pinmux_info = {
1217 .name = "sh7720_pfc",
1218 .reserved_id = PINMUX_RESERVED,
1219 .data = { PINMUX_DATA_BEGIN, PINMUX_DATA_END },
1220 .input = { PINMUX_INPUT_BEGIN, PINMUX_INPUT_END },
1221 .input_pu = { PINMUX_INPUT_PULLUP_BEGIN, PINMUX_INPUT_PULLUP_END },
1222 .output = { PINMUX_OUTPUT_BEGIN, PINMUX_OUTPUT_END },
1223 .mark = { PINMUX_MARK_BEGIN, PINMUX_MARK_END },
1224 .function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END },
1226 .first_gpio = GPIO_PTA7,
1227 .last_gpio = GPIO_FN_STATUS1,
1229 .gpios = pinmux_gpios,
1230 .cfg_regs = pinmux_config_regs,
1231 .data_regs = pinmux_data_regs,
1233 .gpio_data = pinmux_data,
1234 .gpio_data_size = ARRAY_SIZE(pinmux_data),
1237 static int __init plat_pinmux_setup(void)
1239 return register_pinmux(&sh7720_pinmux_info);
1242 arch_initcall(plat_pinmux_setup);