spi-topcliff-pch: supports a spi mode setup and bit order setup by IO control
[zen-stable.git] / arch / sh / mm / uncached.c
bloba7767da815e91453c5b5526a05f4c72405e4afba
1 #include <linux/init.h>
2 #include <linux/module.h>
3 #include <asm/sizes.h>
4 #include <asm/page.h>
5 #include <asm/addrspace.h>
7 /*
8 * This is the offset of the uncached section from its cached alias.
10 * Legacy platforms handle trivial transitions between cached and
11 * uncached segments by making use of the 1:1 mapping relationship in
12 * 512MB lowmem, others via a special uncached mapping.
14 * Default value only valid in 29 bit mode, in 32bit mode this will be
15 * updated by the early PMB initialization code.
17 unsigned long cached_to_uncached = SZ_512M;
18 unsigned long uncached_size = SZ_512M;
19 unsigned long uncached_start, uncached_end;
20 EXPORT_SYMBOL(uncached_start);
21 EXPORT_SYMBOL(uncached_end);
23 int virt_addr_uncached(unsigned long kaddr)
25 return (kaddr >= uncached_start) && (kaddr < uncached_end);
27 EXPORT_SYMBOL(virt_addr_uncached);
29 void __init uncached_init(void)
31 #if defined(CONFIG_29BIT) || !defined(CONFIG_MMU)
32 uncached_start = P2SEG;
33 #else
34 uncached_start = memory_end;
35 #endif
36 uncached_end = uncached_start + uncached_size;
39 void __init uncached_resize(unsigned long size)
41 uncached_size = size;
42 uncached_end = uncached_start + uncached_size;