?  search:
summary | log | graphiclog1 | graphiclog2 | commit | commitdiff | tree | refs | edit | fork
blame | history | raw | HEAD
spi-topcliff-pch: supports a spi mode setup and bit order setup by IO control
[zen-stable.git] / drivers / hwmon / w83627hf.c
blob374118f2b9f94b73fc47bf0ec5d2f83e86bbc697
1 /*
2 w83627hf.c - Part of lm_sensors, Linux kernel modules for hardware
3 monitoring
4 Copyright (c) 1998 - 2003 Frodo Looijaard <frodol@dds.nl>,
5 Philip Edelbrock <phil@netroedge.com>,
6 and Mark Studebaker <mdsxyz123@yahoo.com>
7 Ported to 2.6 by Bernhard C. Schrenk <clemy@clemy.org>
8 Copyright (c) 2007 Jean Delvare <khali@linux-fr.org>
9
10 This program is free software; you can redistribute it and/or modify
11 it under the terms of the GNU General Public License as published by
12 the Free Software Foundation; either version 2 of the License, or
13 (at your option) any later version.
14
15 This program is distributed in the hope that it will be useful,
16 but WITHOUT ANY WARRANTY; without even the implied warranty of
17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 GNU General Public License for more details.
19
20 You should have received a copy of the GNU General Public License
21 along with this program; if not, write to the Free Software
22 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
23 */
24
25 /*
26 Supports following chips:
27
28 Chip #vin #fanin #pwm #temp wchipid vendid i2c ISA
29 w83627hf 9 3 2 3 0x20 0x5ca3 no yes(LPC)
30 w83627thf 7 3 3 3 0x90 0x5ca3 no yes(LPC)
31 w83637hf 7 3 3 3 0x80 0x5ca3 no yes(LPC)
32 w83687thf 7 3 3 3 0x90 0x5ca3 no yes(LPC)
33 w83697hf 8 2 2 2 0x60 0x5ca3 no yes(LPC)
34
35 For other winbond chips, and for i2c support in the above chips,
36 use w83781d.c.
37
38 Note: automatic ("cruise") fan control for 697, 637 & 627thf not
39 supported yet.
40 */
41
42 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
43
44 #include <linux/module.h>
45 #include <linux/init.h>
46 #include <linux/slab.h>
47 #include <linux/jiffies.h>
48 #include <linux/platform_device.h>
49 #include <linux/hwmon.h>
50 #include <linux/hwmon-sysfs.h>
51 #include <linux/hwmon-vid.h>
52 #include <linux/err.h>
53 #include <linux/mutex.h>
54 #include <linux/ioport.h>
55 #include <linux/acpi.h>
56 #include <linux/io.h>
57 #include "lm75.h"
58
59 static struct platform_device *pdev;
60
61 #define DRVNAME "w83627hf"
62 enum chips { w83627hf, w83627thf, w83697hf, w83637hf, w83687thf };
63
64 struct w83627hf_sio_data {
65 enum chips type;
66 int sioaddr;
67 };
68
69 static u8 force_i2c = 0x1f;
70 module_param(force_i2c, byte, 0);
71 MODULE_PARM_DESC(force_i2c,
72 "Initialize the i2c address of the sensors");
73
74 static bool init = 1;
75 module_param(init, bool, 0);
76 MODULE_PARM_DESC(init, "Set to zero to bypass chip initialization");
77
78 static unsigned short force_id;
79 module_param(force_id, ushort, 0);
80 MODULE_PARM_DESC(force_id, "Override the detected device ID");
81
82 /* modified from kernel/include/traps.c */
83 #define DEV 0x07 /* Register: Logical device select */
84
85 /* logical device numbers for superio_select (below) */
86 #define W83627HF_LD_FDC 0x00
87 #define W83627HF_LD_PRT 0x01
88 #define W83627HF_LD_UART1 0x02
89 #define W83627HF_LD_UART2 0x03
90 #define W83627HF_LD_KBC 0x05
91 #define W83627HF_LD_CIR 0x06 /* w83627hf only */
92 #define W83627HF_LD_GAME 0x07
93 #define W83627HF_LD_MIDI 0x07
94 #define W83627HF_LD_GPIO1 0x07
95 #define W83627HF_LD_GPIO5 0x07 /* w83627thf only */
96 #define W83627HF_LD_GPIO2 0x08
97 #define W83627HF_LD_GPIO3 0x09
98 #define W83627HF_LD_GPIO4 0x09 /* w83627thf only */
99 #define W83627HF_LD_ACPI 0x0a
100 #define W83627HF_LD_HWM 0x0b
101
102 #define DEVID 0x20 /* Register: Device ID */
103
104 #define W83627THF_GPIO5_EN 0x30 /* w83627thf only */
105 #define W83627THF_GPIO5_IOSR 0xf3 /* w83627thf only */
106 #define W83627THF_GPIO5_DR 0xf4 /* w83627thf only */
107
108 #define W83687THF_VID_EN 0x29 /* w83687thf only */
109 #define W83687THF_VID_CFG 0xF0 /* w83687thf only */
110 #define W83687THF_VID_DATA 0xF1 /* w83687thf only */
111
112 static inline void
113 superio_outb(struct w83627hf_sio_data *sio, int reg, int val)
114 {
115 outb(reg, sio->sioaddr);
116 outb(val, sio->sioaddr + 1);
117 }
118
119 static inline int
120 superio_inb(struct w83627hf_sio_data *sio, int reg)
121 {
122 outb(reg, sio->sioaddr);
123 return inb(sio->sioaddr + 1);
124 }
125
126 static inline void
127 superio_select(struct w83627hf_sio_data *sio, int ld)
128 {
129 outb(DEV, sio->sioaddr);
130 outb(ld, sio->sioaddr + 1);
131 }
132
133 static inline void
134 superio_enter(struct w83627hf_sio_data *sio)
135 {
136 outb(0x87, sio->sioaddr);
137 outb(0x87, sio->sioaddr);
138 }
139
140 static inline void
141 superio_exit(struct w83627hf_sio_data *sio)
142 {
143 outb(0xAA, sio->sioaddr);
144 }
145
146 #define W627_DEVID 0x52
147 #define W627THF_DEVID 0x82
148 #define W697_DEVID 0x60
149 #define W637_DEVID 0x70
150 #define W687THF_DEVID 0x85
151 #define WINB_ACT_REG 0x30
152 #define WINB_BASE_REG 0x60
153 /* Constants specified below */
154
155 /* Alignment of the base address */
156 #define WINB_ALIGNMENT ~7
157
158 /* Offset & size of I/O region we are interested in */
159 #define WINB_REGION_OFFSET 5
160 #define WINB_REGION_SIZE 2
161
162 /* Where are the sensors address/data registers relative to the region offset */
163 #define W83781D_ADDR_REG_OFFSET 0
164 #define W83781D_DATA_REG_OFFSET 1
165
166 /* The W83781D registers */
167 /* The W83782D registers for nr=7,8 are in bank 5 */
168 #define W83781D_REG_IN_MAX(nr) ((nr < 7) ? (0x2b + (nr) * 2) : \
169 (0x554 + (((nr) - 7) * 2)))
170 #define W83781D_REG_IN_MIN(nr) ((nr < 7) ? (0x2c + (nr) * 2) : \
171 (0x555 + (((nr) - 7) * 2)))
172 #define W83781D_REG_IN(nr) ((nr < 7) ? (0x20 + (nr)) : \
173 (0x550 + (nr) - 7))
174
175 /* nr:0-2 for fans:1-3 */
176 #define W83627HF_REG_FAN_MIN(nr) (0x3b + (nr))
177 #define W83627HF_REG_FAN(nr) (0x28 + (nr))
178
179 #define W83627HF_REG_TEMP2_CONFIG 0x152
180 #define W83627HF_REG_TEMP3_CONFIG 0x252
181 /* these are zero-based, unlike config constants above */
182 static const u16 w83627hf_reg_temp[] = { 0x27, 0x150, 0x250 };
183 static const u16 w83627hf_reg_temp_hyst[] = { 0x3A, 0x153, 0x253 };
184 static const u16 w83627hf_reg_temp_over[] = { 0x39, 0x155, 0x255 };
185
186 #define W83781D_REG_BANK 0x4E
187
188 #define W83781D_REG_CONFIG 0x40
189 #define W83781D_REG_ALARM1 0x459
190 #define W83781D_REG_ALARM2 0x45A
191 #define W83781D_REG_ALARM3 0x45B
192
193 #define W83781D_REG_BEEP_CONFIG 0x4D
194 #define W83781D_REG_BEEP_INTS1 0x56
195 #define W83781D_REG_BEEP_INTS2 0x57
196 #define W83781D_REG_BEEP_INTS3 0x453
197
198 #define W83781D_REG_VID_FANDIV 0x47
199
200 #define W83781D_REG_CHIPID 0x49
201 #define W83781D_REG_WCHIPID 0x58
202 #define W83781D_REG_CHIPMAN 0x4F
203 #define W83781D_REG_PIN 0x4B
204
205 #define W83781D_REG_VBAT 0x5D
206
207 #define W83627HF_REG_PWM1 0x5A
208 #define W83627HF_REG_PWM2 0x5B
209
210 static const u8 W83627THF_REG_PWM_ENABLE[] = {
211 0x04, /* FAN 1 mode */
212 0x04, /* FAN 2 mode */
213 0x12, /* FAN AUX mode */
214 };
215 static const u8 W83627THF_PWM_ENABLE_SHIFT[] = { 2, 4, 1 };
216
217 #define W83627THF_REG_PWM1 0x01 /* 697HF/637HF/687THF too */
218 #define W83627THF_REG_PWM2 0x03 /* 697HF/637HF/687THF too */
219 #define W83627THF_REG_PWM3 0x11 /* 637HF/687THF too */
220
221 #define W83627THF_REG_VRM_OVT_CFG 0x18 /* 637HF/687THF too */
222
223 static const u8 regpwm_627hf[] = { W83627HF_REG_PWM1, W83627HF_REG_PWM2 };
224 static const u8 regpwm[] = { W83627THF_REG_PWM1, W83627THF_REG_PWM2,
225 W83627THF_REG_PWM3 };
226 #define W836X7HF_REG_PWM(type, nr) (((type) == w83627hf) ? \
227 regpwm_627hf[nr] : regpwm[nr])
228
229 #define W83627HF_REG_PWM_FREQ 0x5C /* Only for the 627HF */
230
231 #define W83637HF_REG_PWM_FREQ1 0x00 /* 697HF/687THF too */
232 #define W83637HF_REG_PWM_FREQ2 0x02 /* 697HF/687THF too */
233 #define W83637HF_REG_PWM_FREQ3 0x10 /* 687THF too */
234
235 static const u8 W83637HF_REG_PWM_FREQ[] = { W83637HF_REG_PWM_FREQ1,
236 W83637HF_REG_PWM_FREQ2,
237 W83637HF_REG_PWM_FREQ3 };
238
239 #define W83627HF_BASE_PWM_FREQ 46870
240
241 #define W83781D_REG_I2C_ADDR 0x48
242 #define W83781D_REG_I2C_SUBADDR 0x4A
243
244 /* Sensor selection */
245 #define W83781D_REG_SCFG1 0x5D
246 static const u8 BIT_SCFG1[] = { 0x02, 0x04, 0x08 };
247 #define W83781D_REG_SCFG2 0x59
248 static const u8 BIT_SCFG2[] = { 0x10, 0x20, 0x40 };
249 #define W83781D_DEFAULT_BETA 3435
250
251 /* Conversions. Limit checking is only done on the TO_REG
252 variants. Note that you should be a bit careful with which arguments
253 these macros are called: arguments may be evaluated more than once.
254 Fixing this is just not worth it. */
255 #define IN_TO_REG(val) (SENSORS_LIMIT((((val) + 8)/16),0,255))
256 #define IN_FROM_REG(val) ((val) * 16)
257
258 static inline u8 FAN_TO_REG(long rpm, int div)
259 {
260 if (rpm == 0)
261 return 255;
262 rpm = SENSORS_LIMIT(rpm, 1, 1000000);
263 return SENSORS_LIMIT((1350000 + rpm * div / 2) / (rpm * div), 1,
264 254);
265 }
266
267 #define TEMP_MIN (-128000)
268 #define TEMP_MAX ( 127000)
269
270 /* TEMP: 0.001C/bit (-128C to +127C)
271 REG: 1C/bit, two's complement */
272 static u8 TEMP_TO_REG(long temp)
273 {
274 int ntemp = SENSORS_LIMIT(temp, TEMP_MIN, TEMP_MAX);
275 ntemp += (ntemp<0 ? -500 : 500);
276 return (u8)(ntemp / 1000);
277 }
278
279 static int TEMP_FROM_REG(u8 reg)
280 {
281 return (s8)reg * 1000;
282 }
283
284 #define FAN_FROM_REG(val,div) ((val)==0?-1:(val)==255?0:1350000/((val)*(div)))
285
286 #define PWM_TO_REG(val) (SENSORS_LIMIT((val),0,255))
287
288 static inline unsigned long pwm_freq_from_reg_627hf(u8 reg)
289 {
290 unsigned long freq;
291 freq = W83627HF_BASE_PWM_FREQ >> reg;
292 return freq;
293 }
294 static inline u8 pwm_freq_to_reg_627hf(unsigned long val)
295 {
296 u8 i;
297 /* Only 5 dividers (1 2 4 8 16)
298 Search for the nearest available frequency */
299 for (i = 0; i < 4; i++) {
300 if (val > (((W83627HF_BASE_PWM_FREQ >> i) +
301 (W83627HF_BASE_PWM_FREQ >> (i+1))) / 2))
302 break;
303 }
304 return i;
305 }
306
307 static inline unsigned long pwm_freq_from_reg(u8 reg)
308 {
309 /* Clock bit 8 -> 180 kHz or 24 MHz */
310 unsigned long clock = (reg & 0x80) ? 180000UL : 24000000UL;
311
312 reg &= 0x7f;
313 /* This should not happen but anyway... */
314 if (reg == 0)
315 reg++;
316 return (clock / (reg << 8));
317 }
318 static inline u8 pwm_freq_to_reg(unsigned long val)
319 {
320 /* Minimum divider value is 0x01 and maximum is 0x7F */
321 if (val >= 93750) /* The highest we can do */
322 return 0x01;
323 if (val >= 720) /* Use 24 MHz clock */
324 return (24000000UL / (val << 8));
325 if (val < 6) /* The lowest we can do */
326 return 0xFF;
327 else /* Use 180 kHz clock */
328 return (0x80 | (180000UL / (val << 8)));
329 }
330
331 #define BEEP_MASK_FROM_REG(val) ((val) & 0xff7fff)
332 #define BEEP_MASK_TO_REG(val) ((val) & 0xff7fff)
333
334 #define DIV_FROM_REG(val) (1 << (val))
335
336 static inline u8 DIV_TO_REG(long val)
337 {
338 int i;
339 val = SENSORS_LIMIT(val, 1, 128) >> 1;
340 for (i = 0; i < 7; i++) {
341 if (val == 0)
342 break;
343 val >>= 1;
344 }
345 return ((u8) i);
346 }
347
348 /* For each registered chip, we need to keep some data in memory.
349 The structure is dynamically allocated. */
350 struct w83627hf_data {
351 unsigned short addr;
352 const char *name;
353 struct device *hwmon_dev;
354 struct mutex lock;
355 enum chips type;
356
357 struct mutex update_lock;
358 char valid; /* !=0 if following fields are valid */
359 unsigned long last_updated; /* In jiffies */
360
361 u8 in[9]; /* Register value */
362 u8 in_max[9]; /* Register value */
363 u8 in_min[9]; /* Register value */
364 u8 fan[3]; /* Register value */
365 u8 fan_min[3]; /* Register value */
366 u16 temp[3]; /* Register value */
367 u16 temp_max[3]; /* Register value */
368 u16 temp_max_hyst[3]; /* Register value */
369 u8 fan_div[3]; /* Register encoding, shifted right */
370 u8 vid; /* Register encoding, combined */
371 u32 alarms; /* Register encoding, combined */
372 u32 beep_mask; /* Register encoding, combined */
373 u8 pwm[3]; /* Register value */
374 u8 pwm_enable[3]; /* 1 = manual
375 2 = thermal cruise (also called SmartFan I)
376 3 = fan speed cruise */
377 u8 pwm_freq[3]; /* Register value */
378 u16 sens[3]; /* 1 = pentium diode; 2 = 3904 diode;
379 4 = thermistor */
380 u8 vrm;
381 u8 vrm_ovt; /* Register value, 627THF/637HF/687THF only */
382 };
383
384
385 static int w83627hf_probe(struct platform_device *pdev);
386 static int __devexit w83627hf_remove(struct platform_device *pdev);
387
388 static int w83627hf_read_value(struct w83627hf_data *data, u16 reg);
389 static int w83627hf_write_value(struct w83627hf_data *data, u16 reg, u16 value);
390 static void w83627hf_update_fan_div(struct w83627hf_data *data);
391 static struct w83627hf_data *w83627hf_update_device(struct device *dev);
392 static void w83627hf_init_device(struct platform_device *pdev);
393
394 static struct platform_driver w83627hf_driver = {
395 .driver = {
396 .owner = THIS_MODULE,
397 .name = DRVNAME,
398 },
399 .probe = w83627hf_probe,
400 .remove = __devexit_p(w83627hf_remove),
401 };
402
403 static ssize_t
404 show_in_input(struct device *dev, struct device_attribute *devattr, char *buf)
405 {
406 int nr = to_sensor_dev_attr(devattr)->index;
407 struct w83627hf_data *data = w83627hf_update_device(dev);
408 return sprintf(buf, "%ld\n", (long)IN_FROM_REG(data->in[nr]));
409 }
410 static ssize_t
411 show_in_min(struct device *dev, struct device_attribute *devattr, char *buf)
412 {
413 int nr = to_sensor_dev_attr(devattr)->index;
414 struct w83627hf_data *data = w83627hf_update_device(dev);
415 return sprintf(buf, "%ld\n", (long)IN_FROM_REG(data->in_min[nr]));
416 }
417 static ssize_t
418 show_in_max(struct device *dev, struct device_attribute *devattr, char *buf)
419 {
420 int nr = to_sensor_dev_attr(devattr)->index;
421 struct w83627hf_data *data = w83627hf_update_device(dev);
422 return sprintf(buf, "%ld\n", (long)IN_FROM_REG(data->in_max[nr]));
423 }
424 static ssize_t
425 store_in_min(struct device *dev, struct device_attribute *devattr,
426 const char *buf, size_t count)
427 {
428 int nr = to_sensor_dev_attr(devattr)->index;
429 struct w83627hf_data *data = dev_get_drvdata(dev);
430 long val = simple_strtol(buf, NULL, 10);
431
432 mutex_lock(&data->update_lock);
433 data->in_min[nr] = IN_TO_REG(val);
434 w83627hf_write_value(data, W83781D_REG_IN_MIN(nr), data->in_min[nr]);
435 mutex_unlock(&data->update_lock);
436 return count;
437 }
438 static ssize_t
439 store_in_max(struct device *dev, struct device_attribute *devattr,
440 const char *buf, size_t count)
441 {
442 int nr = to_sensor_dev_attr(devattr)->index;
443 struct w83627hf_data *data = dev_get_drvdata(dev);
444 long val = simple_strtol(buf, NULL, 10);
445
446 mutex_lock(&data->update_lock);
447 data->in_max[nr] = IN_TO_REG(val);
448 w83627hf_write_value(data, W83781D_REG_IN_MAX(nr), data->in_max[nr]);
449 mutex_unlock(&data->update_lock);
450 return count;
451 }
452 #define sysfs_vin_decl(offset) \
453 static SENSOR_DEVICE_ATTR(in##offset##_input, S_IRUGO, \
454 show_in_input, NULL, offset); \
455 static SENSOR_DEVICE_ATTR(in##offset##_min, S_IRUGO|S_IWUSR, \
456 show_in_min, store_in_min, offset); \
457 static SENSOR_DEVICE_ATTR(in##offset##_max, S_IRUGO|S_IWUSR, \
458 show_in_max, store_in_max, offset);
459
460 sysfs_vin_decl(1);
461 sysfs_vin_decl(2);
462 sysfs_vin_decl(3);
463 sysfs_vin_decl(4);
464 sysfs_vin_decl(5);
465 sysfs_vin_decl(6);
466 sysfs_vin_decl(7);
467 sysfs_vin_decl(8);
468
469 /* use a different set of functions for in0 */
470 static ssize_t show_in_0(struct w83627hf_data *data, char *buf, u8 reg)
471 {
472 long in0;
473
474 if ((data->vrm_ovt & 0x01) &&
475 (w83627thf == data->type || w83637hf == data->type
476 || w83687thf == data->type))
477
478 /* use VRM9 calculation */
479 in0 = (long)((reg * 488 + 70000 + 50) / 100);
480 else
481 /* use VRM8 (standard) calculation */
482 in0 = (long)IN_FROM_REG(reg);
483
484 return sprintf(buf,"%ld\n", in0);
485 }
486
487 static ssize_t show_regs_in_0(struct device *dev, struct device_attribute *attr, char *buf)
488 {
489 struct w83627hf_data *data = w83627hf_update_device(dev);
490 return show_in_0(data, buf, data->in[0]);
491 }
492
493 static ssize_t show_regs_in_min0(struct device *dev, struct device_attribute *attr, char *buf)
494 {
495 struct w83627hf_data *data = w83627hf_update_device(dev);
496 return show_in_0(data, buf, data->in_min[0]);
497 }
498
499 static ssize_t show_regs_in_max0(struct device *dev, struct device_attribute *attr, char *buf)
500 {
501 struct w83627hf_data *data = w83627hf_update_device(dev);
502 return show_in_0(data, buf, data->in_max[0]);
503 }
504
505 static ssize_t store_regs_in_min0(struct device *dev, struct device_attribute *attr,
506 const char *buf, size_t count)
507 {
508 struct w83627hf_data *data = dev_get_drvdata(dev);
509 u32 val;
510
511 val = simple_strtoul(buf, NULL, 10);
512
513 mutex_lock(&data->update_lock);
514
515 if ((data->vrm_ovt & 0x01) &&
516 (w83627thf == data->type || w83637hf == data->type
517 || w83687thf == data->type))
518
519 /* use VRM9 calculation */
520 data->in_min[0] =
521 SENSORS_LIMIT(((val * 100) - 70000 + 244) / 488, 0,
522 255);
523 else
524 /* use VRM8 (standard) calculation */
525 data->in_min[0] = IN_TO_REG(val);
526
527 w83627hf_write_value(data, W83781D_REG_IN_MIN(0), data->in_min[0]);
528 mutex_unlock(&data->update_lock);
529 return count;
530 }
531
532 static ssize_t store_regs_in_max0(struct device *dev, struct device_attribute *attr,
533 const char *buf, size_t count)
534 {
535 struct w83627hf_data *data = dev_get_drvdata(dev);
536 u32 val;
537
538 val = simple_strtoul(buf, NULL, 10);
539
540 mutex_lock(&data->update_lock);
541
542 if ((data->vrm_ovt & 0x01) &&
543 (w83627thf == data->type || w83637hf == data->type
544 || w83687thf == data->type))
545
546 /* use VRM9 calculation */
547 data->in_max[0] =
548 SENSORS_LIMIT(((val * 100) - 70000 + 244) / 488, 0,
549 255);
550 else
551 /* use VRM8 (standard) calculation */
552 data->in_max[0] = IN_TO_REG(val);
553
554 w83627hf_write_value(data, W83781D_REG_IN_MAX(0), data->in_max[0]);
555 mutex_unlock(&data->update_lock);
556 return count;
557 }
558
559 static DEVICE_ATTR(in0_input, S_IRUGO, show_regs_in_0, NULL);
560 static DEVICE_ATTR(in0_min, S_IRUGO | S_IWUSR,
561 show_regs_in_min0, store_regs_in_min0);
562 static DEVICE_ATTR(in0_max, S_IRUGO | S_IWUSR,
563 show_regs_in_max0, store_regs_in_max0);
564
565 static ssize_t
566 show_fan_input(struct device *dev, struct device_attribute *devattr, char *buf)
567 {
568 int nr = to_sensor_dev_attr(devattr)->index;
569 struct w83627hf_data *data = w83627hf_update_device(dev);
570 return sprintf(buf, "%ld\n", FAN_FROM_REG(data->fan[nr],
571 (long)DIV_FROM_REG(data->fan_div[nr])));
572 }
573 static ssize_t
574 show_fan_min(struct device *dev, struct device_attribute *devattr, char *buf)
575 {
576 int nr = to_sensor_dev_attr(devattr)->index;
577 struct w83627hf_data *data = w83627hf_update_device(dev);
578 return sprintf(buf, "%ld\n", FAN_FROM_REG(data->fan_min[nr],
579 (long)DIV_FROM_REG(data->fan_div[nr])));
580 }
581 static ssize_t
582 store_fan_min(struct device *dev, struct device_attribute *devattr,
583 const char *buf, size_t count)
584 {
585 int nr = to_sensor_dev_attr(devattr)->index;
586 struct w83627hf_data *data = dev_get_drvdata(dev);
587 u32 val = simple_strtoul(buf, NULL, 10);
588
589 mutex_lock(&data->update_lock);
590 data->fan_min[nr] = FAN_TO_REG(val, DIV_FROM_REG(data->fan_div[nr]));
591 w83627hf_write_value(data, W83627HF_REG_FAN_MIN(nr),
592 data->fan_min[nr]);
593
594 mutex_unlock(&data->update_lock);
595 return count;
596 }
597 #define sysfs_fan_decl(offset) \
598 static SENSOR_DEVICE_ATTR(fan##offset##_input, S_IRUGO, \
599 show_fan_input, NULL, offset - 1); \
600 static SENSOR_DEVICE_ATTR(fan##offset##_min, S_IRUGO | S_IWUSR, \
601 show_fan_min, store_fan_min, offset - 1);
602
603 sysfs_fan_decl(1);
604 sysfs_fan_decl(2);
605 sysfs_fan_decl(3);
606
607 static ssize_t
608 show_temp(struct device *dev, struct device_attribute *devattr, char *buf)
609 {
610 int nr = to_sensor_dev_attr(devattr)->index;
611 struct w83627hf_data *data = w83627hf_update_device(dev);
612
613 u16 tmp = data->temp[nr];
614 return sprintf(buf, "%ld\n", (nr) ? (long) LM75_TEMP_FROM_REG(tmp)
615 : (long) TEMP_FROM_REG(tmp));
616 }
617
618 static ssize_t
619 show_temp_max(struct device *dev, struct device_attribute *devattr,
620 char *buf)
621 {
622 int nr = to_sensor_dev_attr(devattr)->index;
623 struct w83627hf_data *data = w83627hf_update_device(dev);
624
625 u16 tmp = data->temp_max[nr];
626 return sprintf(buf, "%ld\n", (nr) ? (long) LM75_TEMP_FROM_REG(tmp)
627 : (long) TEMP_FROM_REG(tmp));
628 }
629
630 static ssize_t
631 show_temp_max_hyst(struct device *dev, struct device_attribute *devattr,
632 char *buf)
633 {
634 int nr = to_sensor_dev_attr(devattr)->index;
635 struct w83627hf_data *data = w83627hf_update_device(dev);
636
637 u16 tmp = data->temp_max_hyst[nr];
638 return sprintf(buf, "%ld\n", (nr) ? (long) LM75_TEMP_FROM_REG(tmp)
639 : (long) TEMP_FROM_REG(tmp));
640 }
641
642 static ssize_t
643 store_temp_max(struct device *dev, struct device_attribute *devattr,
644 const char *buf, size_t count)
645 {
646 int nr = to_sensor_dev_attr(devattr)->index;
647 struct w83627hf_data *data = dev_get_drvdata(dev);
648 long val = simple_strtol(buf, NULL, 10);
649 u16 tmp = (nr) ? LM75_TEMP_TO_REG(val) : TEMP_TO_REG(val);
650
651 mutex_lock(&data->update_lock);
652 data->temp_max[nr] = tmp;
653 w83627hf_write_value(data, w83627hf_reg_temp_over[nr], tmp);
654 mutex_unlock(&data->update_lock);
655 return count;
656 }
657
658 static ssize_t
659 store_temp_max_hyst(struct device *dev, struct device_attribute *devattr,
660 const char *buf, size_t count)
661 {
662 int nr = to_sensor_dev_attr(devattr)->index;
663 struct w83627hf_data *data = dev_get_drvdata(dev);
664 long val = simple_strtol(buf, NULL, 10);
665 u16 tmp = (nr) ? LM75_TEMP_TO_REG(val) : TEMP_TO_REG(val);
666
667 mutex_lock(&data->update_lock);
668 data->temp_max_hyst[nr] = tmp;
669 w83627hf_write_value(data, w83627hf_reg_temp_hyst[nr], tmp);
670 mutex_unlock(&data->update_lock);
671 return count;
672 }
673
674 #define sysfs_temp_decl(offset) \
675 static SENSOR_DEVICE_ATTR(temp##offset##_input, S_IRUGO, \
676 show_temp, NULL, offset - 1); \
677 static SENSOR_DEVICE_ATTR(temp##offset##_max, S_IRUGO|S_IWUSR, \
678 show_temp_max, store_temp_max, offset - 1); \
679 static SENSOR_DEVICE_ATTR(temp##offset##_max_hyst, S_IRUGO|S_IWUSR, \
680 show_temp_max_hyst, store_temp_max_hyst, offset - 1);
681
682 sysfs_temp_decl(1);
683 sysfs_temp_decl(2);
684 sysfs_temp_decl(3);
685
686 static ssize_t
687 show_vid_reg(struct device *dev, struct device_attribute *attr, char *buf)
688 {
689 struct w83627hf_data *data = w83627hf_update_device(dev);
690 return sprintf(buf, "%ld\n", (long) vid_from_reg(data->vid, data->vrm));
691 }
692 static DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid_reg, NULL);
693
694 static ssize_t
695 show_vrm_reg(struct device *dev, struct device_attribute *attr, char *buf)
696 {
697 struct w83627hf_data *data = dev_get_drvdata(dev);
698 return sprintf(buf, "%ld\n", (long) data->vrm);
699 }
700 static ssize_t
701 store_vrm_reg(struct device *dev, struct device_attribute *attr, const char *buf, size_t count)
702 {
703 struct w83627hf_data *data = dev_get_drvdata(dev);
704 u32 val;
705
706 val = simple_strtoul(buf, NULL, 10);
707 data->vrm = val;
708
709 return count;
710 }
711 static DEVICE_ATTR(vrm, S_IRUGO | S_IWUSR, show_vrm_reg, store_vrm_reg);
712
713 static ssize_t
714 show_alarms_reg(struct device *dev, struct device_attribute *attr, char *buf)
715 {
716 struct w83627hf_data *data = w83627hf_update_device(dev);
717 return sprintf(buf, "%ld\n", (long) data->alarms);
718 }
719 static DEVICE_ATTR(alarms, S_IRUGO, show_alarms_reg, NULL);
720
721 static ssize_t
722 show_alarm(struct device *dev, struct device_attribute *attr, char *buf)
723 {
724 struct w83627hf_data *data = w83627hf_update_device(dev);
725 int bitnr = to_sensor_dev_attr(attr)->index;
726 return sprintf(buf, "%u\n", (data->alarms >> bitnr) & 1);
727 }
728 static SENSOR_DEVICE_ATTR(in0_alarm, S_IRUGO, show_alarm, NULL, 0);
729 static SENSOR_DEVICE_ATTR(in1_alarm, S_IRUGO, show_alarm, NULL, 1);
730 static SENSOR_DEVICE_ATTR(in2_alarm, S_IRUGO, show_alarm, NULL, 2);
731 static SENSOR_DEVICE_ATTR(in3_alarm, S_IRUGO, show_alarm, NULL, 3);
732 static SENSOR_DEVICE_ATTR(in4_alarm, S_IRUGO, show_alarm, NULL, 8);
733 static SENSOR_DEVICE_ATTR(in5_alarm, S_IRUGO, show_alarm, NULL, 9);
734 static SENSOR_DEVICE_ATTR(in6_alarm, S_IRUGO, show_alarm, NULL, 10);
735 static SENSOR_DEVICE_ATTR(in7_alarm, S_IRUGO, show_alarm, NULL, 16);
736 static SENSOR_DEVICE_ATTR(in8_alarm, S_IRUGO, show_alarm, NULL, 17);
737 static SENSOR_DEVICE_ATTR(fan1_alarm, S_IRUGO, show_alarm, NULL, 6);
738 static SENSOR_DEVICE_ATTR(fan2_alarm, S_IRUGO, show_alarm, NULL, 7);
739 static SENSOR_DEVICE_ATTR(fan3_alarm, S_IRUGO, show_alarm, NULL, 11);
740 static SENSOR_DEVICE_ATTR(temp1_alarm, S_IRUGO, show_alarm, NULL, 4);
741 static SENSOR_DEVICE_ATTR(temp2_alarm, S_IRUGO, show_alarm, NULL, 5);
742 static SENSOR_DEVICE_ATTR(temp3_alarm, S_IRUGO, show_alarm, NULL, 13);
743
744 static ssize_t
745 show_beep_mask(struct device *dev, struct device_attribute *attr, char *buf)
746 {
747 struct w83627hf_data *data = w83627hf_update_device(dev);
748 return sprintf(buf, "%ld\n",
749 (long)BEEP_MASK_FROM_REG(data->beep_mask));
750 }
751
752 static ssize_t
753 store_beep_mask(struct device *dev, struct device_attribute *attr,
754 const char *buf, size_t count)
755 {
756 struct w83627hf_data *data = dev_get_drvdata(dev);
757 unsigned long val;
758
759 val = simple_strtoul(buf, NULL, 10);
760
761 mutex_lock(&data->update_lock);
762
763 /* preserve beep enable */
764 data->beep_mask = (data->beep_mask & 0x8000)
765 | BEEP_MASK_TO_REG(val);
766 w83627hf_write_value(data, W83781D_REG_BEEP_INTS1,
767 data->beep_mask & 0xff);
768 w83627hf_write_value(data, W83781D_REG_BEEP_INTS3,
769 ((data->beep_mask) >> 16) & 0xff);
770 w83627hf_write_value(data, W83781D_REG_BEEP_INTS2,
771 (data->beep_mask >> 8) & 0xff);
772
773 mutex_unlock(&data->update_lock);
774 return count;
775 }
776
777 static DEVICE_ATTR(beep_mask, S_IRUGO | S_IWUSR,
778 show_beep_mask, store_beep_mask);
779
780 static ssize_t
781 show_beep(struct device *dev, struct device_attribute *attr, char *buf)
782 {
783 struct w83627hf_data *data = w83627hf_update_device(dev);
784 int bitnr = to_sensor_dev_attr(attr)->index;
785 return sprintf(buf, "%u\n", (data->beep_mask >> bitnr) & 1);
786 }
787
788 static ssize_t
789 store_beep(struct device *dev, struct device_attribute *attr,
790 const char *buf, size_t count)
791 {
792 struct w83627hf_data *data = dev_get_drvdata(dev);
793 int bitnr = to_sensor_dev_attr(attr)->index;
794 unsigned long bit;
795 u8 reg;
796
797 bit = simple_strtoul(buf, NULL, 10);
798 if (bit & ~1)
799 return -EINVAL;
800
801 mutex_lock(&data->update_lock);
802 if (bit)
803 data->beep_mask |= (1 << bitnr);
804 else
805 data->beep_mask &= ~(1 << bitnr);
806
807 if (bitnr < 8) {
808 reg = w83627hf_read_value(data, W83781D_REG_BEEP_INTS1);
809 if (bit)
810 reg |= (1 << bitnr);
811 else
812 reg &= ~(1 << bitnr);
813 w83627hf_write_value(data, W83781D_REG_BEEP_INTS1, reg);
814 } else if (bitnr < 16) {
815 reg = w83627hf_read_value(data, W83781D_REG_BEEP_INTS2);
816 if (bit)
817 reg |= (1 << (bitnr - 8));
818 else
819 reg &= ~(1 << (bitnr - 8));
820 w83627hf_write_value(data, W83781D_REG_BEEP_INTS2, reg);
821 } else {
822 reg = w83627hf_read_value(data, W83781D_REG_BEEP_INTS3);
823 if (bit)
824 reg |= (1 << (bitnr - 16));
825 else
826 reg &= ~(1 << (bitnr - 16));
827 w83627hf_write_value(data, W83781D_REG_BEEP_INTS3, reg);
828 }
829 mutex_unlock(&data->update_lock);
830
831 return count;
832 }
833
834 static SENSOR_DEVICE_ATTR(in0_beep, S_IRUGO | S_IWUSR,
835 show_beep, store_beep, 0);
836 static SENSOR_DEVICE_ATTR(in1_beep, S_IRUGO | S_IWUSR,
837 show_beep, store_beep, 1);
838 static SENSOR_DEVICE_ATTR(in2_beep, S_IRUGO | S_IWUSR,
839 show_beep, store_beep, 2);
840 static SENSOR_DEVICE_ATTR(in3_beep, S_IRUGO | S_IWUSR,
841 show_beep, store_beep, 3);
842 static SENSOR_DEVICE_ATTR(in4_beep, S_IRUGO | S_IWUSR,
843 show_beep, store_beep, 8);
844 static SENSOR_DEVICE_ATTR(in5_beep, S_IRUGO | S_IWUSR,
845 show_beep, store_beep, 9);
846 static SENSOR_DEVICE_ATTR(in6_beep, S_IRUGO | S_IWUSR,
847 show_beep, store_beep, 10);
848 static SENSOR_DEVICE_ATTR(in7_beep, S_IRUGO | S_IWUSR,
849 show_beep, store_beep, 16);
850 static SENSOR_DEVICE_ATTR(in8_beep, S_IRUGO | S_IWUSR,
851 show_beep, store_beep, 17);
852 static SENSOR_DEVICE_ATTR(fan1_beep, S_IRUGO | S_IWUSR,
853 show_beep, store_beep, 6);
854 static SENSOR_DEVICE_ATTR(fan2_beep, S_IRUGO | S_IWUSR,
855 show_beep, store_beep, 7);
856 static SENSOR_DEVICE_ATTR(fan3_beep, S_IRUGO | S_IWUSR,
857 show_beep, store_beep, 11);
858 static SENSOR_DEVICE_ATTR(temp1_beep, S_IRUGO | S_IWUSR,
859 show_beep, store_beep, 4);
860 static SENSOR_DEVICE_ATTR(temp2_beep, S_IRUGO | S_IWUSR,
861 show_beep, store_beep, 5);
862 static SENSOR_DEVICE_ATTR(temp3_beep, S_IRUGO | S_IWUSR,
863 show_beep, store_beep, 13);
864 static SENSOR_DEVICE_ATTR(beep_enable, S_IRUGO | S_IWUSR,
865 show_beep, store_beep, 15);
866
867 static ssize_t
868 show_fan_div(struct device *dev, struct device_attribute *devattr, char *buf)
869 {
870 int nr = to_sensor_dev_attr(devattr)->index;
871 struct w83627hf_data *data = w83627hf_update_device(dev);
872 return sprintf(buf, "%ld\n",
873 (long) DIV_FROM_REG(data->fan_div[nr]));
874 }
875 /* Note: we save and restore the fan minimum here, because its value is
876 determined in part by the fan divisor. This follows the principle of
877 least surprise; the user doesn't expect the fan minimum to change just
878 because the divisor changed. */
879 static ssize_t
880 store_fan_div(struct device *dev, struct device_attribute *devattr,
881 const char *buf, size_t count)
882 {
883 int nr = to_sensor_dev_attr(devattr)->index;
884 struct w83627hf_data *data = dev_get_drvdata(dev);
885 unsigned long min;
886 u8 reg;
887 unsigned long val = simple_strtoul(buf, NULL, 10);
888
889 mutex_lock(&data->update_lock);
890
891 /* Save fan_min */
892 min = FAN_FROM_REG(data->fan_min[nr],
893 DIV_FROM_REG(data->fan_div[nr]));
894
895 data->fan_div[nr] = DIV_TO_REG(val);
896
897 reg = (w83627hf_read_value(data, nr==2 ? W83781D_REG_PIN : W83781D_REG_VID_FANDIV)
898 & (nr==0 ? 0xcf : 0x3f))
899 | ((data->fan_div[nr] & 0x03) << (nr==0 ? 4 : 6));
900 w83627hf_write_value(data, nr==2 ? W83781D_REG_PIN : W83781D_REG_VID_FANDIV, reg);
901
902 reg = (w83627hf_read_value(data, W83781D_REG_VBAT)
903 & ~(1 << (5 + nr)))
904 | ((data->fan_div[nr] & 0x04) << (3 + nr));
905 w83627hf_write_value(data, W83781D_REG_VBAT, reg);
906
907 /* Restore fan_min */
908 data->fan_min[nr] = FAN_TO_REG(min, DIV_FROM_REG(data->fan_div[nr]));
909 w83627hf_write_value(data, W83627HF_REG_FAN_MIN(nr), data->fan_min[nr]);
910
911 mutex_unlock(&data->update_lock);
912 return count;
913 }
914
915 static SENSOR_DEVICE_ATTR(fan1_div, S_IRUGO|S_IWUSR,
916 show_fan_div, store_fan_div, 0);
917 static SENSOR_DEVICE_ATTR(fan2_div, S_IRUGO|S_IWUSR,
918 show_fan_div, store_fan_div, 1);
919 static SENSOR_DEVICE_ATTR(fan3_div, S_IRUGO|S_IWUSR,
920 show_fan_div, store_fan_div, 2);
921
922 static ssize_t
923 show_pwm(struct device *dev, struct device_attribute *devattr, char *buf)
924 {
925 int nr = to_sensor_dev_attr(devattr)->index;
926 struct w83627hf_data *data = w83627hf_update_device(dev);
927 return sprintf(buf, "%ld\n", (long) data->pwm[nr]);
928 }
929
930 static ssize_t
931 store_pwm(struct device *dev, struct device_attribute *devattr,
932 const char *buf, size_t count)
933 {
934 int nr = to_sensor_dev_attr(devattr)->index;
935 struct w83627hf_data *data = dev_get_drvdata(dev);
936 u32 val = simple_strtoul(buf, NULL, 10);
937
938 mutex_lock(&data->update_lock);
939
940 if (data->type == w83627thf) {
941 /* bits 0-3 are reserved in 627THF */
942 data->pwm[nr] = PWM_TO_REG(val) & 0xf0;
943 w83627hf_write_value(data,
944 W836X7HF_REG_PWM(data->type, nr),
945 data->pwm[nr] |
946 (w83627hf_read_value(data,
947 W836X7HF_REG_PWM(data->type, nr)) & 0x0f));
948 } else {
949 data->pwm[nr] = PWM_TO_REG(val);
950 w83627hf_write_value(data,
951 W836X7HF_REG_PWM(data->type, nr),
952 data->pwm[nr]);
953 }
954
955 mutex_unlock(&data->update_lock);
956 return count;
957 }
958
959 static SENSOR_DEVICE_ATTR(pwm1, S_IRUGO|S_IWUSR, show_pwm, store_pwm, 0);
960 static SENSOR_DEVICE_ATTR(pwm2, S_IRUGO|S_IWUSR, show_pwm, store_pwm, 1);
961 static SENSOR_DEVICE_ATTR(pwm3, S_IRUGO|S_IWUSR, show_pwm, store_pwm, 2);
962
963 static ssize_t
964 show_pwm_enable(struct device *dev, struct device_attribute *devattr, char *buf)
965 {
966 int nr = to_sensor_dev_attr(devattr)->index;
967 struct w83627hf_data *data = w83627hf_update_device(dev);
968 return sprintf(buf, "%d\n", data->pwm_enable[nr]);
969 }
970
971 static ssize_t
972 store_pwm_enable(struct device *dev, struct device_attribute *devattr,
973 const char *buf, size_t count)
974 {
975 int nr = to_sensor_dev_attr(devattr)->index;
976 struct w83627hf_data *data = dev_get_drvdata(dev);
977 unsigned long val = simple_strtoul(buf, NULL, 10);
978 u8 reg;
979
980 if (!val || (val > 3)) /* modes 1, 2 and 3 are supported */
981 return -EINVAL;
982 mutex_lock(&data->update_lock);
983 data->pwm_enable[nr] = val;
984 reg = w83627hf_read_value(data, W83627THF_REG_PWM_ENABLE[nr]);
985 reg &= ~(0x03 << W83627THF_PWM_ENABLE_SHIFT[nr]);
986 reg |= (val - 1) << W83627THF_PWM_ENABLE_SHIFT[nr];
987 w83627hf_write_value(data, W83627THF_REG_PWM_ENABLE[nr], reg);
988 mutex_unlock(&data->update_lock);
989 return count;
990 }
991
992 static SENSOR_DEVICE_ATTR(pwm1_enable, S_IRUGO|S_IWUSR, show_pwm_enable,
993 store_pwm_enable, 0);
994 static SENSOR_DEVICE_ATTR(pwm2_enable, S_IRUGO|S_IWUSR, show_pwm_enable,
995 store_pwm_enable, 1);
996 static SENSOR_DEVICE_ATTR(pwm3_enable, S_IRUGO|S_IWUSR, show_pwm_enable,
997 store_pwm_enable, 2);
998
999 static ssize_t
1000 show_pwm_freq(struct device *dev, struct device_attribute *devattr, char *buf)
1001 {
1002 int nr = to_sensor_dev_attr(devattr)->index;
1003 struct w83627hf_data *data = w83627hf_update_device(dev);
1004 if (data->type == w83627hf)
1005 return sprintf(buf, "%ld\n",
1006 pwm_freq_from_reg_627hf(data->pwm_freq[nr]));
1007 else
1008 return sprintf(buf, "%ld\n",
1009 pwm_freq_from_reg(data->pwm_freq[nr]));
1010 }
1011
1012 static ssize_t
1013 store_pwm_freq(struct device *dev, struct device_attribute *devattr,
1014 const char *buf, size_t count)
1015 {
1016 int nr = to_sensor_dev_attr(devattr)->index;
1017 struct w83627hf_data *data = dev_get_drvdata(dev);
1018 static const u8 mask[]={0xF8, 0x8F};
1019 u32 val;
1020
1021 val = simple_strtoul(buf, NULL, 10);
1022
1023 mutex_lock(&data->update_lock);
1024
1025 if (data->type == w83627hf) {
1026 data->pwm_freq[nr] = pwm_freq_to_reg_627hf(val);
1027 w83627hf_write_value(data, W83627HF_REG_PWM_FREQ,
1028 (data->pwm_freq[nr] << (nr*4)) |
1029 (w83627hf_read_value(data,
1030 W83627HF_REG_PWM_FREQ) & mask[nr]));
1031 } else {
1032 data->pwm_freq[nr] = pwm_freq_to_reg(val);
1033 w83627hf_write_value(data, W83637HF_REG_PWM_FREQ[nr],
1034 data->pwm_freq[nr]);
1035 }
1036
1037 mutex_unlock(&data->update_lock);
1038 return count;
1039 }
1040
1041 static SENSOR_DEVICE_ATTR(pwm1_freq, S_IRUGO|S_IWUSR,
1042 show_pwm_freq, store_pwm_freq, 0);
1043 static SENSOR_DEVICE_ATTR(pwm2_freq, S_IRUGO|S_IWUSR,
1044 show_pwm_freq, store_pwm_freq, 1);
1045 static SENSOR_DEVICE_ATTR(pwm3_freq, S_IRUGO|S_IWUSR,
1046 show_pwm_freq, store_pwm_freq, 2);
1047
1048 static ssize_t
1049 show_temp_type(struct device *dev, struct device_attribute *devattr,
1050 char *buf)
1051 {
1052 int nr = to_sensor_dev_attr(devattr)->index;
1053 struct w83627hf_data *data = w83627hf_update_device(dev);
1054 return sprintf(buf, "%ld\n", (long) data->sens[nr]);
1055 }
1056
1057 static ssize_t
1058 store_temp_type(struct device *dev, struct device_attribute *devattr,
1059 const char *buf, size_t count)
1060 {
1061 int nr = to_sensor_dev_attr(devattr)->index;
1062 struct w83627hf_data *data = dev_get_drvdata(dev);
1063 u32 val, tmp;
1064
1065 val = simple_strtoul(buf, NULL, 10);
1066
1067 mutex_lock(&data->update_lock);
1068
1069 switch (val) {
1070 case 1: /* PII/Celeron diode */
1071 tmp = w83627hf_read_value(data, W83781D_REG_SCFG1);
1072 w83627hf_write_value(data, W83781D_REG_SCFG1,
1073 tmp | BIT_SCFG1[nr]);
1074 tmp = w83627hf_read_value(data, W83781D_REG_SCFG2);
1075 w83627hf_write_value(data, W83781D_REG_SCFG2,
1076 tmp | BIT_SCFG2[nr]);
1077 data->sens[nr] = val;
1078 break;
1079 case 2: /* 3904 */
1080 tmp = w83627hf_read_value(data, W83781D_REG_SCFG1);
1081 w83627hf_write_value(data, W83781D_REG_SCFG1,
1082 tmp | BIT_SCFG1[nr]);
1083 tmp = w83627hf_read_value(data, W83781D_REG_SCFG2);
1084 w83627hf_write_value(data, W83781D_REG_SCFG2,
1085 tmp & ~BIT_SCFG2[nr]);
1086 data->sens[nr] = val;
1087 break;
1088 case W83781D_DEFAULT_BETA:
1089 dev_warn(dev, "Sensor type %d is deprecated, please use 4 "
1090 "instead\n", W83781D_DEFAULT_BETA);
1091 /* fall through */
1092 case 4: /* thermistor */
1093 tmp = w83627hf_read_value(data, W83781D_REG_SCFG1);
1094 w83627hf_write_value(data, W83781D_REG_SCFG1,
1095 tmp & ~BIT_SCFG1[nr]);
1096 data->sens[nr] = val;
1097 break;
1098 default:
1099 dev_err(dev,
1100 "Invalid sensor type %ld; must be 1, 2, or 4\n",
1101 (long) val);
1102 break;
1103 }
1104
1105 mutex_unlock(&data->update_lock);
1106 return count;
1107 }
1108
1109 #define sysfs_temp_type(offset) \
1110 static SENSOR_DEVICE_ATTR(temp##offset##_type, S_IRUGO | S_IWUSR, \
1111 show_temp_type, store_temp_type, offset - 1);
1112
1113 sysfs_temp_type(1);
1114 sysfs_temp_type(2);
1115 sysfs_temp_type(3);
1116
1117 static ssize_t
1118 show_name(struct device *dev, struct device_attribute *devattr, char *buf)
1119 {
1120 struct w83627hf_data *data = dev_get_drvdata(dev);
1121
1122 return sprintf(buf, "%s\n", data->name);
1123 }
1124 static DEVICE_ATTR(name, S_IRUGO, show_name, NULL);
1125
1126 static int __init w83627hf_find(int sioaddr, unsigned short *addr,
1127 struct w83627hf_sio_data *sio_data)
1128 {
1129 int err = -ENODEV;
1130 u16 val;
1131
1132 static const __initdata char *names[] = {
1133 "W83627HF",
1134 "W83627THF",
1135 "W83697HF",
1136 "W83637HF",
1137 "W83687THF",
1138 };
1139
1140 sio_data->sioaddr = sioaddr;
1141 superio_enter(sio_data);
1142 val = force_id ? force_id : superio_inb(sio_data, DEVID);
1143 switch (val) {
1144 case W627_DEVID:
1145 sio_data->type = w83627hf;
1146 break;
1147 case W627THF_DEVID:
1148 sio_data->type = w83627thf;
1149 break;
1150 case W697_DEVID:
1151 sio_data->type = w83697hf;
1152 break;
1153 case W637_DEVID:
1154 sio_data->type = w83637hf;
1155 break;
1156 case W687THF_DEVID:
1157 sio_data->type = w83687thf;
1158 break;
1159 case 0xff: /* No device at all */
1160 goto exit;
1161 default:
1162 pr_debug(DRVNAME ": Unsupported chip (DEVID=0x%02x)\n", val);
1163 goto exit;
1164 }
1165
1166 superio_select(sio_data, W83627HF_LD_HWM);
1167 val = (superio_inb(sio_data, WINB_BASE_REG) << 8) |
1168 superio_inb(sio_data, WINB_BASE_REG + 1);
1169 *addr = val & WINB_ALIGNMENT;
1170 if (*addr == 0) {
1171 pr_warn("Base address not set, skipping\n");
1172 goto exit;
1173 }
1174
1175 val = superio_inb(sio_data, WINB_ACT_REG);
1176 if (!(val & 0x01)) {
1177 pr_warn("Enabling HWM logical device\n");
1178 superio_outb(sio_data, WINB_ACT_REG, val | 0x01);
1179 }
1180
1181 err = 0;
1182 pr_info(DRVNAME ": Found %s chip at %#x\n",
1183 names[sio_data->type], *addr);
1184
1185 exit:
1186 superio_exit(sio_data);
1187 return err;
1188 }
1189
1190 #define VIN_UNIT_ATTRS(_X_) \
1191 &sensor_dev_attr_in##_X_##_input.dev_attr.attr, \
1192 &sensor_dev_attr_in##_X_##_min.dev_attr.attr, \
1193 &sensor_dev_attr_in##_X_##_max.dev_attr.attr, \
1194 &sensor_dev_attr_in##_X_##_alarm.dev_attr.attr, \
1195 &sensor_dev_attr_in##_X_##_beep.dev_attr.attr
1196
1197 #define FAN_UNIT_ATTRS(_X_) \
1198 &sensor_dev_attr_fan##_X_##_input.dev_attr.attr, \
1199 &sensor_dev_attr_fan##_X_##_min.dev_attr.attr, \
1200 &sensor_dev_attr_fan##_X_##_div.dev_attr.attr, \
1201 &sensor_dev_attr_fan##_X_##_alarm.dev_attr.attr, \
1202 &sensor_dev_attr_fan##_X_##_beep.dev_attr.attr
1203
1204 #define TEMP_UNIT_ATTRS(_X_) \
1205 &sensor_dev_attr_temp##_X_##_input.dev_attr.attr, \
1206 &sensor_dev_attr_temp##_X_##_max.dev_attr.attr, \
1207 &sensor_dev_attr_temp##_X_##_max_hyst.dev_attr.attr, \
1208 &sensor_dev_attr_temp##_X_##_type.dev_attr.attr, \
1209 &sensor_dev_attr_temp##_X_##_alarm.dev_attr.attr, \
1210 &sensor_dev_attr_temp##_X_##_beep.dev_attr.attr
1211
1212 static struct attribute *w83627hf_attributes[] = {
1213 &dev_attr_in0_input.attr,
1214 &dev_attr_in0_min.attr,
1215 &dev_attr_in0_max.attr,
1216 &sensor_dev_attr_in0_alarm.dev_attr.attr,
1217 &sensor_dev_attr_in0_beep.dev_attr.attr,
1218 VIN_UNIT_ATTRS(2),
1219 VIN_UNIT_ATTRS(3),
1220 VIN_UNIT_ATTRS(4),
1221 VIN_UNIT_ATTRS(7),
1222 VIN_UNIT_ATTRS(8),
1223
1224 FAN_UNIT_ATTRS(1),
1225 FAN_UNIT_ATTRS(2),
1226
1227 TEMP_UNIT_ATTRS(1),
1228 TEMP_UNIT_ATTRS(2),
1229
1230 &dev_attr_alarms.attr,
1231 &sensor_dev_attr_beep_enable.dev_attr.attr,
1232 &dev_attr_beep_mask.attr,
1233
1234 &sensor_dev_attr_pwm1.dev_attr.attr,
1235 &sensor_dev_attr_pwm2.dev_attr.attr,
1236 &dev_attr_name.attr,
1237 NULL
1238 };
1239
1240 static const struct attribute_group w83627hf_group = {
1241 .attrs = w83627hf_attributes,
1242 };
1243
1244 static struct attribute *w83627hf_attributes_opt[] = {
1245 VIN_UNIT_ATTRS(1),
1246 VIN_UNIT_ATTRS(5),
1247 VIN_UNIT_ATTRS(6),
1248
1249 FAN_UNIT_ATTRS(3),
1250 TEMP_UNIT_ATTRS(3),
1251 &sensor_dev_attr_pwm3.dev_attr.attr,
1252
1253 &sensor_dev_attr_pwm1_freq.dev_attr.attr,
1254 &sensor_dev_attr_pwm2_freq.dev_attr.attr,
1255 &sensor_dev_attr_pwm3_freq.dev_attr.attr,
1256
1257 &sensor_dev_attr_pwm1_enable.dev_attr.attr,
1258 &sensor_dev_attr_pwm2_enable.dev_attr.attr,
1259 &sensor_dev_attr_pwm3_enable.dev_attr.attr,
1260
1261 NULL
1262 };
1263
1264 static const struct attribute_group w83627hf_group_opt = {
1265 .attrs = w83627hf_attributes_opt,
1266 };
1267
1268 static int __devinit w83627hf_probe(struct platform_device *pdev)
1269 {
1270 struct device *dev = &pdev->dev;
1271 struct w83627hf_sio_data *sio_data = dev->platform_data;
1272 struct w83627hf_data *data;
1273 struct resource *res;
1274 int err, i;
1275
1276 static const char *names[] = {
1277 "w83627hf",
1278 "w83627thf",
1279 "w83697hf",
1280 "w83637hf",
1281 "w83687thf",
1282 };
1283
1284 res = platform_get_resource(pdev, IORESOURCE_IO, 0);
1285 if (!request_region(res->start, WINB_REGION_SIZE, DRVNAME)) {
1286 dev_err(dev, "Failed to request region 0x%lx-0x%lx\n",
1287 (unsigned long)res->start,
1288 (unsigned long)(res->start + WINB_REGION_SIZE - 1));
1289 err = -EBUSY;
1290 goto ERROR0;
1291 }
1292
1293 if (!(data = kzalloc(sizeof(struct w83627hf_data), GFP_KERNEL))) {
1294 err = -ENOMEM;
1295 goto ERROR1;
1296 }
1297 data->addr = res->start;
1298 data->type = sio_data->type;
1299 data->name = names[sio_data->type];
1300 mutex_init(&data->lock);
1301 mutex_init(&data->update_lock);
1302 platform_set_drvdata(pdev, data);
1303
1304 /* Initialize the chip */
1305 w83627hf_init_device(pdev);
1306
1307 /* A few vars need to be filled upon startup */
1308 for (i = 0; i <= 2; i++)
1309 data->fan_min[i] = w83627hf_read_value(
1310 data, W83627HF_REG_FAN_MIN(i));
1311 w83627hf_update_fan_div(data);
1312
1313 /* Register common device attributes */
1314 if ((err = sysfs_create_group(&dev->kobj, &w83627hf_group)))
1315 goto ERROR3;
1316
1317 /* Register chip-specific device attributes */
1318 if (data->type == w83627hf || data->type == w83697hf)
1319 if ((err = device_create_file(dev,
1320 &sensor_dev_attr_in5_input.dev_attr))
1321 || (err = device_create_file(dev,
1322 &sensor_dev_attr_in5_min.dev_attr))
1323 || (err = device_create_file(dev,
1324 &sensor_dev_attr_in5_max.dev_attr))
1325 || (err = device_create_file(dev,
1326 &sensor_dev_attr_in5_alarm.dev_attr))
1327 || (err = device_create_file(dev,
1328 &sensor_dev_attr_in5_beep.dev_attr))
1329 || (err = device_create_file(dev,
1330 &sensor_dev_attr_in6_input.dev_attr))
1331 || (err = device_create_file(dev,
1332 &sensor_dev_attr_in6_min.dev_attr))
1333 || (err = device_create_file(dev,
1334 &sensor_dev_attr_in6_max.dev_attr))
1335 || (err = device_create_file(dev,
1336 &sensor_dev_attr_in6_alarm.dev_attr))
1337 || (err = device_create_file(dev,
1338 &sensor_dev_attr_in6_beep.dev_attr))
1339 || (err = device_create_file(dev,
1340 &sensor_dev_attr_pwm1_freq.dev_attr))
1341 || (err = device_create_file(dev,
1342 &sensor_dev_attr_pwm2_freq.dev_attr)))
1343 goto ERROR4;
1344
1345 if (data->type != w83697hf)
1346 if ((err = device_create_file(dev,
1347 &sensor_dev_attr_in1_input.dev_attr))
1348 || (err = device_create_file(dev,
1349 &sensor_dev_attr_in1_min.dev_attr))
1350 || (err = device_create_file(dev,
1351 &sensor_dev_attr_in1_max.dev_attr))
1352 || (err = device_create_file(dev,
1353 &sensor_dev_attr_in1_alarm.dev_attr))
1354 || (err = device_create_file(dev,
1355 &sensor_dev_attr_in1_beep.dev_attr))
1356 || (err = device_create_file(dev,
1357 &sensor_dev_attr_fan3_input.dev_attr))
1358 || (err = device_create_file(dev,
1359 &sensor_dev_attr_fan3_min.dev_attr))
1360 || (err = device_create_file(dev,
1361 &sensor_dev_attr_fan3_div.dev_attr))
1362 || (err = device_create_file(dev,
1363 &sensor_dev_attr_fan3_alarm.dev_attr))
1364 || (err = device_create_file(dev,
1365 &sensor_dev_attr_fan3_beep.dev_attr))
1366 || (err = device_create_file(dev,
1367 &sensor_dev_attr_temp3_input.dev_attr))
1368 || (err = device_create_file(dev,
1369 &sensor_dev_attr_temp3_max.dev_attr))
1370 || (err = device_create_file(dev,
1371 &sensor_dev_attr_temp3_max_hyst.dev_attr))
1372 || (err = device_create_file(dev,
1373 &sensor_dev_attr_temp3_alarm.dev_attr))
1374 || (err = device_create_file(dev,
1375 &sensor_dev_attr_temp3_beep.dev_attr))
1376 || (err = device_create_file(dev,
1377 &sensor_dev_attr_temp3_type.dev_attr)))
1378 goto ERROR4;
1379
1380 if (data->type != w83697hf && data->vid != 0xff) {
1381 /* Convert VID to voltage based on VRM */
1382 data->vrm = vid_which_vrm();
1383
1384 if ((err = device_create_file(dev, &dev_attr_cpu0_vid))
1385 || (err = device_create_file(dev, &dev_attr_vrm)))
1386 goto ERROR4;
1387 }
1388
1389 if (data->type == w83627thf || data->type == w83637hf
1390 || data->type == w83687thf)
1391 if ((err = device_create_file(dev,
1392 &sensor_dev_attr_pwm3.dev_attr)))
1393 goto ERROR4;
1394
1395 if (data->type == w83637hf || data->type == w83687thf)
1396 if ((err = device_create_file(dev,
1397 &sensor_dev_attr_pwm1_freq.dev_attr))
1398 || (err = device_create_file(dev,
1399 &sensor_dev_attr_pwm2_freq.dev_attr))
1400 || (err = device_create_file(dev,
1401 &sensor_dev_attr_pwm3_freq.dev_attr)))
1402 goto ERROR4;
1403
1404 if (data->type != w83627hf)
1405 if ((err = device_create_file(dev,
1406 &sensor_dev_attr_pwm1_enable.dev_attr))
1407 || (err = device_create_file(dev,
1408 &sensor_dev_attr_pwm2_enable.dev_attr)))
1409 goto ERROR4;
1410
1411 if (data->type == w83627thf || data->type == w83637hf
1412 || data->type == w83687thf)
1413 if ((err = device_create_file(dev,
1414 &sensor_dev_attr_pwm3_enable.dev_attr)))
1415 goto ERROR4;
1416
1417 data->hwmon_dev = hwmon_device_register(dev);
1418 if (IS_ERR(data->hwmon_dev)) {
1419 err = PTR_ERR(data->hwmon_dev);
1420 goto ERROR4;
1421 }
1422
1423 return 0;
1424
1425 ERROR4:
1426 sysfs_remove_group(&dev->kobj, &w83627hf_group);
1427 sysfs_remove_group(&dev->kobj, &w83627hf_group_opt);
1428 ERROR3:
1429 platform_set_drvdata(pdev, NULL);
1430 kfree(data);
1431 ERROR1:
1432 release_region(res->start, WINB_REGION_SIZE);
1433 ERROR0:
1434 return err;
1435 }
1436
1437 static int __devexit w83627hf_remove(struct platform_device *pdev)
1438 {
1439 struct w83627hf_data *data = platform_get_drvdata(pdev);
1440 struct resource *res;
1441
1442 hwmon_device_unregister(data->hwmon_dev);
1443
1444 sysfs_remove_group(&pdev->dev.kobj, &w83627hf_group);
1445 sysfs_remove_group(&pdev->dev.kobj, &w83627hf_group_opt);
1446 platform_set_drvdata(pdev, NULL);
1447 kfree(data);
1448
1449 res = platform_get_resource(pdev, IORESOURCE_IO, 0);
1450 release_region(res->start, WINB_REGION_SIZE);
1451
1452 return 0;
1453 }
1454
1455
1456 /* Registers 0x50-0x5f are banked */
1457 static inline void w83627hf_set_bank(struct w83627hf_data *data, u16 reg)
1458 {
1459 if ((reg & 0x00f0) == 0x50) {
1460 outb_p(W83781D_REG_BANK, data->addr + W83781D_ADDR_REG_OFFSET);
1461 outb_p(reg >> 8, data->addr + W83781D_DATA_REG_OFFSET);
1462 }
1463 }
1464
1465 /* Not strictly necessary, but play it safe for now */
1466 static inline void w83627hf_reset_bank(struct w83627hf_data *data, u16 reg)
1467 {
1468 if (reg & 0xff00) {
1469 outb_p(W83781D_REG_BANK, data->addr + W83781D_ADDR_REG_OFFSET);
1470 outb_p(0, data->addr + W83781D_DATA_REG_OFFSET);
1471 }
1472 }
1473
1474 static int w83627hf_read_value(struct w83627hf_data *data, u16 reg)
1475 {
1476 int res, word_sized;
1477
1478 mutex_lock(&data->lock);
1479 word_sized = (((reg & 0xff00) == 0x100)
1480 || ((reg & 0xff00) == 0x200))
1481 && (((reg & 0x00ff) == 0x50)
1482 || ((reg & 0x00ff) == 0x53)
1483 || ((reg & 0x00ff) == 0x55));
1484 w83627hf_set_bank(data, reg);
1485 outb_p(reg & 0xff, data->addr + W83781D_ADDR_REG_OFFSET);
1486 res = inb_p(data->addr + W83781D_DATA_REG_OFFSET);
1487 if (word_sized) {
1488 outb_p((reg & 0xff) + 1,
1489 data->addr + W83781D_ADDR_REG_OFFSET);
1490 res =
1491 (res << 8) + inb_p(data->addr +
1492 W83781D_DATA_REG_OFFSET);
1493 }
1494 w83627hf_reset_bank(data, reg);
1495 mutex_unlock(&data->lock);
1496 return res;
1497 }
1498
1499 static int __devinit w83627thf_read_gpio5(struct platform_device *pdev)
1500 {
1501 struct w83627hf_sio_data *sio_data = pdev->dev.platform_data;
1502 int res = 0xff, sel;
1503
1504 superio_enter(sio_data);
1505 superio_select(sio_data, W83627HF_LD_GPIO5);
1506
1507 /* Make sure these GPIO pins are enabled */
1508 if (!(superio_inb(sio_data, W83627THF_GPIO5_EN) & (1<<3))) {
1509 dev_dbg(&pdev->dev, "GPIO5 disabled, no VID function\n");
1510 goto exit;
1511 }
1512
1513 /* Make sure the pins are configured for input
1514 There must be at least five (VRM 9), and possibly 6 (VRM 10) */
1515 sel = superio_inb(sio_data, W83627THF_GPIO5_IOSR) & 0x3f;
1516 if ((sel & 0x1f) != 0x1f) {
1517 dev_dbg(&pdev->dev, "GPIO5 not configured for VID "
1518 "function\n");
1519 goto exit;
1520 }
1521
1522 dev_info(&pdev->dev, "Reading VID from GPIO5\n");
1523 res = superio_inb(sio_data, W83627THF_GPIO5_DR) & sel;
1524
1525 exit:
1526 superio_exit(sio_data);
1527 return res;
1528 }
1529
1530 static int __devinit w83687thf_read_vid(struct platform_device *pdev)
1531 {
1532 struct w83627hf_sio_data *sio_data = pdev->dev.platform_data;
1533 int res = 0xff;
1534
1535 superio_enter(sio_data);
1536 superio_select(sio_data, W83627HF_LD_HWM);
1537
1538 /* Make sure these GPIO pins are enabled */
1539 if (!(superio_inb(sio_data, W83687THF_VID_EN) & (1 << 2))) {
1540 dev_dbg(&pdev->dev, "VID disabled, no VID function\n");
1541 goto exit;
1542 }
1543
1544 /* Make sure the pins are configured for input */
1545 if (!(superio_inb(sio_data, W83687THF_VID_CFG) & (1 << 4))) {
1546 dev_dbg(&pdev->dev, "VID configured as output, "
1547 "no VID function\n");
1548 goto exit;
1549 }
1550
1551 res = superio_inb(sio_data, W83687THF_VID_DATA) & 0x3f;
1552
1553 exit:
1554 superio_exit(sio_data);
1555 return res;
1556 }
1557
1558 static int w83627hf_write_value(struct w83627hf_data *data, u16 reg, u16 value)
1559 {
1560 int word_sized;
1561
1562 mutex_lock(&data->lock);
1563 word_sized = (((reg & 0xff00) == 0x100)
1564 || ((reg & 0xff00) == 0x200))
1565 && (((reg & 0x00ff) == 0x53)
1566 || ((reg & 0x00ff) == 0x55));
1567 w83627hf_set_bank(data, reg);
1568 outb_p(reg & 0xff, data->addr + W83781D_ADDR_REG_OFFSET);
1569 if (word_sized) {
1570 outb_p(value >> 8,
1571 data->addr + W83781D_DATA_REG_OFFSET);
1572 outb_p((reg & 0xff) + 1,
1573 data->addr + W83781D_ADDR_REG_OFFSET);
1574 }
1575 outb_p(value & 0xff,
1576 data->addr + W83781D_DATA_REG_OFFSET);
1577 w83627hf_reset_bank(data, reg);
1578 mutex_unlock(&data->lock);
1579 return 0;
1580 }
1581
1582 static void __devinit w83627hf_init_device(struct platform_device *pdev)
1583 {
1584 struct w83627hf_data *data = platform_get_drvdata(pdev);
1585 int i;
1586 enum chips type = data->type;
1587 u8 tmp;
1588
1589 /* Minimize conflicts with other winbond i2c-only clients... */
1590 /* disable i2c subclients... how to disable main i2c client?? */
1591 /* force i2c address to relatively uncommon address */
1592 w83627hf_write_value(data, W83781D_REG_I2C_SUBADDR, 0x89);
1593 w83627hf_write_value(data, W83781D_REG_I2C_ADDR, force_i2c);
1594
1595 /* Read VID only once */
1596 if (type == w83627hf || type == w83637hf) {
1597 int lo = w83627hf_read_value(data, W83781D_REG_VID_FANDIV);
1598 int hi = w83627hf_read_value(data, W83781D_REG_CHIPID);
1599 data->vid = (lo & 0x0f) | ((hi & 0x01) << 4);
1600 } else if (type == w83627thf) {
1601 data->vid = w83627thf_read_gpio5(pdev);
1602 } else if (type == w83687thf) {
1603 data->vid = w83687thf_read_vid(pdev);
1604 }
1605
1606 /* Read VRM & OVT Config only once */
1607 if (type == w83627thf || type == w83637hf || type == w83687thf) {
1608 data->vrm_ovt =
1609 w83627hf_read_value(data, W83627THF_REG_VRM_OVT_CFG);
1610 }
1611
1612 tmp = w83627hf_read_value(data, W83781D_REG_SCFG1);
1613 for (i = 1; i <= 3; i++) {
1614 if (!(tmp & BIT_SCFG1[i - 1])) {
1615 data->sens[i - 1] = 4;
1616 } else {
1617 if (w83627hf_read_value
1618 (data,
1619 W83781D_REG_SCFG2) & BIT_SCFG2[i - 1])
1620 data->sens[i - 1] = 1;
1621 else
1622 data->sens[i - 1] = 2;
1623 }
1624 if ((type == w83697hf) && (i == 2))
1625 break;
1626 }
1627
1628 if(init) {
1629 /* Enable temp2 */
1630 tmp = w83627hf_read_value(data, W83627HF_REG_TEMP2_CONFIG);
1631 if (tmp & 0x01) {
1632 dev_warn(&pdev->dev, "Enabling temp2, readings "
1633 "might not make sense\n");
1634 w83627hf_write_value(data, W83627HF_REG_TEMP2_CONFIG,
1635 tmp & 0xfe);
1636 }
1637
1638 /* Enable temp3 */
1639 if (type != w83697hf) {
1640 tmp = w83627hf_read_value(data,
1641 W83627HF_REG_TEMP3_CONFIG);
1642 if (tmp & 0x01) {
1643 dev_warn(&pdev->dev, "Enabling temp3, "
1644 "readings might not make sense\n");
1645 w83627hf_write_value(data,
1646 W83627HF_REG_TEMP3_CONFIG, tmp & 0xfe);
1647 }
1648 }
1649 }
1650
1651 /* Start monitoring */
1652 w83627hf_write_value(data, W83781D_REG_CONFIG,
1653 (w83627hf_read_value(data,
1654 W83781D_REG_CONFIG) & 0xf7)
1655 | 0x01);
1656
1657 /* Enable VBAT monitoring if needed */
1658 tmp = w83627hf_read_value(data, W83781D_REG_VBAT);
1659 if (!(tmp & 0x01))
1660 w83627hf_write_value(data, W83781D_REG_VBAT, tmp | 0x01);
1661 }
1662
1663 static void w83627hf_update_fan_div(struct w83627hf_data *data)
1664 {
1665 int reg;
1666
1667 reg = w83627hf_read_value(data, W83781D_REG_VID_FANDIV);
1668 data->fan_div[0] = (reg >> 4) & 0x03;
1669 data->fan_div[1] = (reg >> 6) & 0x03;
1670 if (data->type != w83697hf) {
1671 data->fan_div[2] = (w83627hf_read_value(data,
1672 W83781D_REG_PIN) >> 6) & 0x03;
1673 }
1674 reg = w83627hf_read_value(data, W83781D_REG_VBAT);
1675 data->fan_div[0] |= (reg >> 3) & 0x04;
1676 data->fan_div[1] |= (reg >> 4) & 0x04;
1677 if (data->type != w83697hf)
1678 data->fan_div[2] |= (reg >> 5) & 0x04;
1679 }
1680
1681 static struct w83627hf_data *w83627hf_update_device(struct device *dev)
1682 {
1683 struct w83627hf_data *data = dev_get_drvdata(dev);
1684 int i, num_temps = (data->type == w83697hf) ? 2 : 3;
1685 int num_pwms = (data->type == w83697hf) ? 2 : 3;
1686
1687 mutex_lock(&data->update_lock);
1688
1689 if (time_after(jiffies, data->last_updated + HZ + HZ / 2)
1690 || !data->valid) {
1691 for (i = 0; i <= 8; i++) {
1692 /* skip missing sensors */
1693 if (((data->type == w83697hf) && (i == 1)) ||
1694 ((data->type != w83627hf && data->type != w83697hf)
1695 && (i == 5 || i == 6)))
1696 continue;
1697 data->in[i] =
1698 w83627hf_read_value(data, W83781D_REG_IN(i));
1699 data->in_min[i] =
1700 w83627hf_read_value(data,
1701 W83781D_REG_IN_MIN(i));
1702 data->in_max[i] =
1703 w83627hf_read_value(data,
1704 W83781D_REG_IN_MAX(i));
1705 }
1706 for (i = 0; i <= 2; i++) {
1707 data->fan[i] =
1708 w83627hf_read_value(data, W83627HF_REG_FAN(i));
1709 data->fan_min[i] =
1710 w83627hf_read_value(data,
1711 W83627HF_REG_FAN_MIN(i));
1712 }
1713 for (i = 0; i <= 2; i++) {
1714 u8 tmp = w83627hf_read_value(data,
1715 W836X7HF_REG_PWM(data->type, i));
1716 /* bits 0-3 are reserved in 627THF */
1717 if (data->type == w83627thf)
1718 tmp &= 0xf0;
1719 data->pwm[i] = tmp;
1720 if (i == 1 &&
1721 (data->type == w83627hf || data->type == w83697hf))
1722 break;
1723 }
1724 if (data->type == w83627hf) {
1725 u8 tmp = w83627hf_read_value(data,
1726 W83627HF_REG_PWM_FREQ);
1727 data->pwm_freq[0] = tmp & 0x07;
1728 data->pwm_freq[1] = (tmp >> 4) & 0x07;
1729 } else if (data->type != w83627thf) {
1730 for (i = 1; i <= 3; i++) {
1731 data->pwm_freq[i - 1] =
1732 w83627hf_read_value(data,
1733 W83637HF_REG_PWM_FREQ[i - 1]);
1734 if (i == 2 && (data->type == w83697hf))
1735 break;
1736 }
1737 }
1738 if (data->type != w83627hf) {
1739 for (i = 0; i < num_pwms; i++) {
1740 u8 tmp = w83627hf_read_value(data,
1741 W83627THF_REG_PWM_ENABLE[i]);
1742 data->pwm_enable[i] =
1743 ((tmp >> W83627THF_PWM_ENABLE_SHIFT[i])
1744 & 0x03) + 1;
1745 }
1746 }
1747 for (i = 0; i < num_temps; i++) {
1748 data->temp[i] = w83627hf_read_value(
1749 data, w83627hf_reg_temp[i]);
1750 data->temp_max[i] = w83627hf_read_value(
1751 data, w83627hf_reg_temp_over[i]);
1752 data->temp_max_hyst[i] = w83627hf_read_value(
1753 data, w83627hf_reg_temp_hyst[i]);
1754 }
1755
1756 w83627hf_update_fan_div(data);
1757
1758 data->alarms =
1759 w83627hf_read_value(data, W83781D_REG_ALARM1) |
1760 (w83627hf_read_value(data, W83781D_REG_ALARM2) << 8) |
1761 (w83627hf_read_value(data, W83781D_REG_ALARM3) << 16);
1762 i = w83627hf_read_value(data, W83781D_REG_BEEP_INTS2);
1763 data->beep_mask = (i << 8) |
1764 w83627hf_read_value(data, W83781D_REG_BEEP_INTS1) |
1765 w83627hf_read_value(data, W83781D_REG_BEEP_INTS3) << 16;
1766 data->last_updated = jiffies;
1767 data->valid = 1;
1768 }
1769
1770 mutex_unlock(&data->update_lock);
1771
1772 return data;
1773 }
1774
1775 static int __init w83627hf_device_add(unsigned short address,
1776 const struct w83627hf_sio_data *sio_data)
1777 {
1778 struct resource res = {
1779 .start = address + WINB_REGION_OFFSET,
1780 .end = address + WINB_REGION_OFFSET + WINB_REGION_SIZE - 1,
1781 .name = DRVNAME,
1782 .flags = IORESOURCE_IO,
1783 };
1784 int err;
1785
1786 err = acpi_check_resource_conflict(&res);
1787 if (err)
1788 goto exit;
1789
1790 pdev = platform_device_alloc(DRVNAME, address);
1791 if (!pdev) {
1792 err = -ENOMEM;
1793 pr_err("Device allocation failed\n");
1794 goto exit;
1795 }
1796
1797 err = platform_device_add_resources(pdev, &res, 1);
1798 if (err) {
1799 pr_err("Device resource addition failed (%d)\n", err);
1800 goto exit_device_put;
1801 }
1802
1803 err = platform_device_add_data(pdev, sio_data,
1804 sizeof(struct w83627hf_sio_data));
1805 if (err) {
1806 pr_err("Platform data allocation failed\n");
1807 goto exit_device_put;
1808 }
1809
1810 err = platform_device_add(pdev);
1811 if (err) {
1812 pr_err("Device addition failed (%d)\n", err);
1813 goto exit_device_put;
1814 }
1815
1816 return 0;
1817
1818 exit_device_put:
1819 platform_device_put(pdev);
1820 exit:
1821 return err;
1822 }
1823
1824 static int __init sensors_w83627hf_init(void)
1825 {
1826 int err;
1827 unsigned short address;
1828 struct w83627hf_sio_data sio_data;
1829
1830 if (w83627hf_find(0x2e, &address, &sio_data)
1831 && w83627hf_find(0x4e, &address, &sio_data))
1832 return -ENODEV;
1833
1834 err = platform_driver_register(&w83627hf_driver);
1835 if (err)
1836 goto exit;
1837
1838 /* Sets global pdev as a side effect */
1839 err = w83627hf_device_add(address, &sio_data);
1840 if (err)
1841 goto exit_driver;
1842
1843 return 0;
1844
1845 exit_driver:
1846 platform_driver_unregister(&w83627hf_driver);
1847 exit:
1848 return err;
1849 }
1850
1851 static void __exit sensors_w83627hf_exit(void)
1852 {
1853 platform_device_unregister(pdev);
1854 platform_driver_unregister(&w83627hf_driver);
1855 }
1856
1857 MODULE_AUTHOR("Frodo Looijaard <frodol@dds.nl>, "
1858 "Philip Edelbrock <phil@netroedge.com>, "
1859 "and Mark Studebaker <mdsxyz123@yahoo.com>");
1860 MODULE_DESCRIPTION("W83627HF driver");
1861 MODULE_LICENSE("GPL");
1862
1863 module_init(sensors_w83627hf_init);
1864 module_exit(sensors_w83627hf_exit);