spi-topcliff-pch: supports a spi mode setup and bit order setup by IO control
[zen-stable.git] / drivers / i2c / busses / i2c-ali15x3.c
blob087ea9caa74d3ac34b4ced643c0b8303aba6474e
1 /*
2 Copyright (c) 1999 Frodo Looijaard <frodol@dds.nl> and
3 Philip Edelbrock <phil@netroedge.com> and
4 Mark D. Studebaker <mdsxyz123@yahoo.com>
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2 of the License, or
9 (at your option) any later version.
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
22 This is the driver for the SMB Host controller on
23 Acer Labs Inc. (ALI) M1541 and M1543C South Bridges.
25 The M1543C is a South bridge for desktop systems.
26 The M1533 is a South bridge for portable systems.
27 They are part of the following ALI chipsets:
28 "Aladdin Pro 2": Includes the M1621 Slot 1 North bridge
29 with AGP and 100MHz CPU Front Side bus
30 "Aladdin V": Includes the M1541 Socket 7 North bridge
31 with AGP and 100MHz CPU Front Side bus
32 "Aladdin IV": Includes the M1541 Socket 7 North bridge
33 with host bus up to 83.3 MHz.
34 For an overview of these chips see http://www.acerlabs.com
36 The M1533/M1543C devices appear as FOUR separate devices
37 on the PCI bus. An output of lspci will show something similar
38 to the following:
40 00:02.0 USB Controller: Acer Laboratories Inc. M5237
41 00:03.0 Bridge: Acer Laboratories Inc. M7101
42 00:07.0 ISA bridge: Acer Laboratories Inc. M1533
43 00:0f.0 IDE interface: Acer Laboratories Inc. M5229
45 The SMB controller is part of the 7101 device, which is an
46 ACPI-compliant Power Management Unit (PMU).
48 The whole 7101 device has to be enabled for the SMB to work.
49 You can't just enable the SMB alone.
50 The SMB and the ACPI have separate I/O spaces.
51 We make sure that the SMB is enabled. We leave the ACPI alone.
53 This driver controls the SMB Host only.
54 The SMB Slave controller on the M15X3 is not enabled.
56 This driver does not use interrupts.
59 /* Note: we assume there can only be one ALI15X3, with one SMBus interface */
61 #include <linux/module.h>
62 #include <linux/pci.h>
63 #include <linux/kernel.h>
64 #include <linux/stddef.h>
65 #include <linux/ioport.h>
66 #include <linux/delay.h>
67 #include <linux/i2c.h>
68 #include <linux/init.h>
69 #include <linux/acpi.h>
70 #include <linux/io.h>
72 /* ALI15X3 SMBus address offsets */
73 #define SMBHSTSTS (0 + ali15x3_smba)
74 #define SMBHSTCNT (1 + ali15x3_smba)
75 #define SMBHSTSTART (2 + ali15x3_smba)
76 #define SMBHSTCMD (7 + ali15x3_smba)
77 #define SMBHSTADD (3 + ali15x3_smba)
78 #define SMBHSTDAT0 (4 + ali15x3_smba)
79 #define SMBHSTDAT1 (5 + ali15x3_smba)
80 #define SMBBLKDAT (6 + ali15x3_smba)
82 /* PCI Address Constants */
83 #define SMBCOM 0x004
84 #define SMBBA 0x014
85 #define SMBATPC 0x05B /* used to unlock xxxBA registers */
86 #define SMBHSTCFG 0x0E0
87 #define SMBSLVC 0x0E1
88 #define SMBCLK 0x0E2
89 #define SMBREV 0x008
91 /* Other settings */
92 #define MAX_TIMEOUT 200 /* times 1/100 sec */
93 #define ALI15X3_SMB_IOSIZE 32
95 /* this is what the Award 1004 BIOS sets them to on a ASUS P5A MB.
96 We don't use these here. If the bases aren't set to some value we
97 tell user to upgrade BIOS and we fail.
99 #define ALI15X3_SMB_DEFAULTBASE 0xE800
101 /* ALI15X3 address lock bits */
102 #define ALI15X3_LOCK 0x06
104 /* ALI15X3 command constants */
105 #define ALI15X3_ABORT 0x02
106 #define ALI15X3_T_OUT 0x04
107 #define ALI15X3_QUICK 0x00
108 #define ALI15X3_BYTE 0x10
109 #define ALI15X3_BYTE_DATA 0x20
110 #define ALI15X3_WORD_DATA 0x30
111 #define ALI15X3_BLOCK_DATA 0x40
112 #define ALI15X3_BLOCK_CLR 0x80
114 /* ALI15X3 status register bits */
115 #define ALI15X3_STS_IDLE 0x04
116 #define ALI15X3_STS_BUSY 0x08
117 #define ALI15X3_STS_DONE 0x10
118 #define ALI15X3_STS_DEV 0x20 /* device error */
119 #define ALI15X3_STS_COLL 0x40 /* collision or no response */
120 #define ALI15X3_STS_TERM 0x80 /* terminated by abort */
121 #define ALI15X3_STS_ERR 0xE0 /* all the bad error bits */
124 /* If force_addr is set to anything different from 0, we forcibly enable
125 the device at the given address. */
126 static u16 force_addr;
127 module_param(force_addr, ushort, 0);
128 MODULE_PARM_DESC(force_addr,
129 "Initialize the base address of the i2c controller");
131 static struct pci_driver ali15x3_driver;
132 static unsigned short ali15x3_smba;
134 static int __devinit ali15x3_setup(struct pci_dev *ALI15X3_dev)
136 u16 a;
137 unsigned char temp;
139 /* Check the following things:
140 - SMB I/O address is initialized
141 - Device is enabled
142 - We can use the addresses
145 /* Unlock the register.
146 The data sheet says that the address registers are read-only
147 if the lock bits are 1, but in fact the address registers
148 are zero unless you clear the lock bits.
150 pci_read_config_byte(ALI15X3_dev, SMBATPC, &temp);
151 if (temp & ALI15X3_LOCK) {
152 temp &= ~ALI15X3_LOCK;
153 pci_write_config_byte(ALI15X3_dev, SMBATPC, temp);
156 /* Determine the address of the SMBus area */
157 pci_read_config_word(ALI15X3_dev, SMBBA, &ali15x3_smba);
158 ali15x3_smba &= (0xffff & ~(ALI15X3_SMB_IOSIZE - 1));
159 if (ali15x3_smba == 0 && force_addr == 0) {
160 dev_err(&ALI15X3_dev->dev, "ALI15X3_smb region uninitialized "
161 "- upgrade BIOS or use force_addr=0xaddr\n");
162 return -ENODEV;
165 if(force_addr)
166 ali15x3_smba = force_addr & ~(ALI15X3_SMB_IOSIZE - 1);
168 if (acpi_check_region(ali15x3_smba, ALI15X3_SMB_IOSIZE,
169 ali15x3_driver.name))
170 return -EBUSY;
172 if (!request_region(ali15x3_smba, ALI15X3_SMB_IOSIZE,
173 ali15x3_driver.name)) {
174 dev_err(&ALI15X3_dev->dev,
175 "ALI15X3_smb region 0x%x already in use!\n",
176 ali15x3_smba);
177 return -ENODEV;
180 if(force_addr) {
181 dev_info(&ALI15X3_dev->dev, "forcing ISA address 0x%04X\n",
182 ali15x3_smba);
183 if (PCIBIOS_SUCCESSFUL != pci_write_config_word(ALI15X3_dev,
184 SMBBA,
185 ali15x3_smba))
186 goto error;
187 if (PCIBIOS_SUCCESSFUL != pci_read_config_word(ALI15X3_dev,
188 SMBBA, &a))
189 goto error;
190 if ((a & ~(ALI15X3_SMB_IOSIZE - 1)) != ali15x3_smba) {
191 /* make sure it works */
192 dev_err(&ALI15X3_dev->dev,
193 "force address failed - not supported?\n");
194 goto error;
197 /* check if whole device is enabled */
198 pci_read_config_byte(ALI15X3_dev, SMBCOM, &temp);
199 if ((temp & 1) == 0) {
200 dev_info(&ALI15X3_dev->dev, "enabling SMBus device\n");
201 pci_write_config_byte(ALI15X3_dev, SMBCOM, temp | 0x01);
204 /* Is SMB Host controller enabled? */
205 pci_read_config_byte(ALI15X3_dev, SMBHSTCFG, &temp);
206 if ((temp & 1) == 0) {
207 dev_info(&ALI15X3_dev->dev, "enabling SMBus controller\n");
208 pci_write_config_byte(ALI15X3_dev, SMBHSTCFG, temp | 0x01);
211 /* set SMB clock to 74KHz as recommended in data sheet */
212 pci_write_config_byte(ALI15X3_dev, SMBCLK, 0x20);
215 The interrupt routing for SMB is set up in register 0x77 in the
216 1533 ISA Bridge device, NOT in the 7101 device.
217 Don't bother with finding the 1533 device and reading the register.
218 if ((....... & 0x0F) == 1)
219 dev_dbg(&ALI15X3_dev->dev, "ALI15X3 using Interrupt 9 for SMBus.\n");
221 pci_read_config_byte(ALI15X3_dev, SMBREV, &temp);
222 dev_dbg(&ALI15X3_dev->dev, "SMBREV = 0x%X\n", temp);
223 dev_dbg(&ALI15X3_dev->dev, "iALI15X3_smba = 0x%X\n", ali15x3_smba);
225 return 0;
226 error:
227 release_region(ali15x3_smba, ALI15X3_SMB_IOSIZE);
228 return -ENODEV;
231 /* Another internally used function */
232 static int ali15x3_transaction(struct i2c_adapter *adap)
234 int temp;
235 int result = 0;
236 int timeout = 0;
238 dev_dbg(&adap->dev, "Transaction (pre): STS=%02x, CNT=%02x, CMD=%02x, "
239 "ADD=%02x, DAT0=%02x, DAT1=%02x\n", inb_p(SMBHSTSTS),
240 inb_p(SMBHSTCNT), inb_p(SMBHSTCMD), inb_p(SMBHSTADD),
241 inb_p(SMBHSTDAT0), inb_p(SMBHSTDAT1));
243 /* get status */
244 temp = inb_p(SMBHSTSTS);
246 /* Make sure the SMBus host is ready to start transmitting */
247 /* Check the busy bit first */
248 if (temp & ALI15X3_STS_BUSY) {
250 If the host controller is still busy, it may have timed out in the
251 previous transaction, resulting in a "SMBus Timeout" Dev.
252 I've tried the following to reset a stuck busy bit.
253 1. Reset the controller with an ABORT command.
254 (this doesn't seem to clear the controller if an external
255 device is hung)
256 2. Reset the controller and the other SMBus devices with a
257 T_OUT command. (this clears the host busy bit if an
258 external device is hung, but it comes back upon a new access
259 to a device)
260 3. Disable and reenable the controller in SMBHSTCFG
261 Worst case, nothing seems to work except power reset.
263 /* Abort - reset the host controller */
265 Try resetting entire SMB bus, including other devices -
266 This may not work either - it clears the BUSY bit but
267 then the BUSY bit may come back on when you try and use the chip again.
268 If that's the case you are stuck.
270 dev_info(&adap->dev, "Resetting entire SMB Bus to "
271 "clear busy condition (%02x)\n", temp);
272 outb_p(ALI15X3_T_OUT, SMBHSTCNT);
273 temp = inb_p(SMBHSTSTS);
276 /* now check the error bits and the busy bit */
277 if (temp & (ALI15X3_STS_ERR | ALI15X3_STS_BUSY)) {
278 /* do a clear-on-write */
279 outb_p(0xFF, SMBHSTSTS);
280 if ((temp = inb_p(SMBHSTSTS)) &
281 (ALI15X3_STS_ERR | ALI15X3_STS_BUSY)) {
282 /* this is probably going to be correctable only by a power reset
283 as one of the bits now appears to be stuck */
284 /* This may be a bus or device with electrical problems. */
285 dev_err(&adap->dev, "SMBus reset failed! (0x%02x) - "
286 "controller or device on bus is probably hung\n",
287 temp);
288 return -EBUSY;
290 } else {
291 /* check and clear done bit */
292 if (temp & ALI15X3_STS_DONE) {
293 outb_p(temp, SMBHSTSTS);
297 /* start the transaction by writing anything to the start register */
298 outb_p(0xFF, SMBHSTSTART);
300 /* We will always wait for a fraction of a second! */
301 timeout = 0;
302 do {
303 msleep(1);
304 temp = inb_p(SMBHSTSTS);
305 } while ((!(temp & (ALI15X3_STS_ERR | ALI15X3_STS_DONE)))
306 && (timeout++ < MAX_TIMEOUT));
308 /* If the SMBus is still busy, we give up */
309 if (timeout > MAX_TIMEOUT) {
310 result = -ETIMEDOUT;
311 dev_err(&adap->dev, "SMBus Timeout!\n");
314 if (temp & ALI15X3_STS_TERM) {
315 result = -EIO;
316 dev_dbg(&adap->dev, "Error: Failed bus transaction\n");
320 Unfortunately the ALI SMB controller maps "no response" and "bus
321 collision" into a single bit. No response is the usual case so don't
322 do a printk.
323 This means that bus collisions go unreported.
325 if (temp & ALI15X3_STS_COLL) {
326 result = -ENXIO;
327 dev_dbg(&adap->dev,
328 "Error: no response or bus collision ADD=%02x\n",
329 inb_p(SMBHSTADD));
332 /* haven't ever seen this */
333 if (temp & ALI15X3_STS_DEV) {
334 result = -EIO;
335 dev_err(&adap->dev, "Error: device error\n");
337 dev_dbg(&adap->dev, "Transaction (post): STS=%02x, CNT=%02x, CMD=%02x, "
338 "ADD=%02x, DAT0=%02x, DAT1=%02x\n", inb_p(SMBHSTSTS),
339 inb_p(SMBHSTCNT), inb_p(SMBHSTCMD), inb_p(SMBHSTADD),
340 inb_p(SMBHSTDAT0), inb_p(SMBHSTDAT1));
341 return result;
344 /* Return negative errno on error. */
345 static s32 ali15x3_access(struct i2c_adapter * adap, u16 addr,
346 unsigned short flags, char read_write, u8 command,
347 int size, union i2c_smbus_data * data)
349 int i, len;
350 int temp;
351 int timeout;
353 /* clear all the bits (clear-on-write) */
354 outb_p(0xFF, SMBHSTSTS);
355 /* make sure SMBus is idle */
356 temp = inb_p(SMBHSTSTS);
357 for (timeout = 0;
358 (timeout < MAX_TIMEOUT) && !(temp & ALI15X3_STS_IDLE);
359 timeout++) {
360 msleep(1);
361 temp = inb_p(SMBHSTSTS);
363 if (timeout >= MAX_TIMEOUT) {
364 dev_err(&adap->dev, "Idle wait Timeout! STS=0x%02x\n", temp);
367 switch (size) {
368 case I2C_SMBUS_QUICK:
369 outb_p(((addr & 0x7f) << 1) | (read_write & 0x01),
370 SMBHSTADD);
371 size = ALI15X3_QUICK;
372 break;
373 case I2C_SMBUS_BYTE:
374 outb_p(((addr & 0x7f) << 1) | (read_write & 0x01),
375 SMBHSTADD);
376 if (read_write == I2C_SMBUS_WRITE)
377 outb_p(command, SMBHSTCMD);
378 size = ALI15X3_BYTE;
379 break;
380 case I2C_SMBUS_BYTE_DATA:
381 outb_p(((addr & 0x7f) << 1) | (read_write & 0x01),
382 SMBHSTADD);
383 outb_p(command, SMBHSTCMD);
384 if (read_write == I2C_SMBUS_WRITE)
385 outb_p(data->byte, SMBHSTDAT0);
386 size = ALI15X3_BYTE_DATA;
387 break;
388 case I2C_SMBUS_WORD_DATA:
389 outb_p(((addr & 0x7f) << 1) | (read_write & 0x01),
390 SMBHSTADD);
391 outb_p(command, SMBHSTCMD);
392 if (read_write == I2C_SMBUS_WRITE) {
393 outb_p(data->word & 0xff, SMBHSTDAT0);
394 outb_p((data->word & 0xff00) >> 8, SMBHSTDAT1);
396 size = ALI15X3_WORD_DATA;
397 break;
398 case I2C_SMBUS_BLOCK_DATA:
399 outb_p(((addr & 0x7f) << 1) | (read_write & 0x01),
400 SMBHSTADD);
401 outb_p(command, SMBHSTCMD);
402 if (read_write == I2C_SMBUS_WRITE) {
403 len = data->block[0];
404 if (len < 0) {
405 len = 0;
406 data->block[0] = len;
408 if (len > 32) {
409 len = 32;
410 data->block[0] = len;
412 outb_p(len, SMBHSTDAT0);
413 /* Reset SMBBLKDAT */
414 outb_p(inb_p(SMBHSTCNT) | ALI15X3_BLOCK_CLR, SMBHSTCNT);
415 for (i = 1; i <= len; i++)
416 outb_p(data->block[i], SMBBLKDAT);
418 size = ALI15X3_BLOCK_DATA;
419 break;
420 default:
421 dev_warn(&adap->dev, "Unsupported transaction %d\n", size);
422 return -EOPNOTSUPP;
425 outb_p(size, SMBHSTCNT); /* output command */
427 temp = ali15x3_transaction(adap);
428 if (temp)
429 return temp;
431 if ((read_write == I2C_SMBUS_WRITE) || (size == ALI15X3_QUICK))
432 return 0;
435 switch (size) {
436 case ALI15X3_BYTE: /* Result put in SMBHSTDAT0 */
437 data->byte = inb_p(SMBHSTDAT0);
438 break;
439 case ALI15X3_BYTE_DATA:
440 data->byte = inb_p(SMBHSTDAT0);
441 break;
442 case ALI15X3_WORD_DATA:
443 data->word = inb_p(SMBHSTDAT0) + (inb_p(SMBHSTDAT1) << 8);
444 break;
445 case ALI15X3_BLOCK_DATA:
446 len = inb_p(SMBHSTDAT0);
447 if (len > 32)
448 len = 32;
449 data->block[0] = len;
450 /* Reset SMBBLKDAT */
451 outb_p(inb_p(SMBHSTCNT) | ALI15X3_BLOCK_CLR, SMBHSTCNT);
452 for (i = 1; i <= data->block[0]; i++) {
453 data->block[i] = inb_p(SMBBLKDAT);
454 dev_dbg(&adap->dev, "Blk: len=%d, i=%d, data=%02x\n",
455 len, i, data->block[i]);
457 break;
459 return 0;
462 static u32 ali15x3_func(struct i2c_adapter *adapter)
464 return I2C_FUNC_SMBUS_QUICK | I2C_FUNC_SMBUS_BYTE |
465 I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA |
466 I2C_FUNC_SMBUS_BLOCK_DATA;
469 static const struct i2c_algorithm smbus_algorithm = {
470 .smbus_xfer = ali15x3_access,
471 .functionality = ali15x3_func,
474 static struct i2c_adapter ali15x3_adapter = {
475 .owner = THIS_MODULE,
476 .class = I2C_CLASS_HWMON | I2C_CLASS_SPD,
477 .algo = &smbus_algorithm,
480 static DEFINE_PCI_DEVICE_TABLE(ali15x3_ids) = {
481 { PCI_DEVICE(PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M7101) },
482 { 0, }
485 MODULE_DEVICE_TABLE (pci, ali15x3_ids);
487 static int __devinit ali15x3_probe(struct pci_dev *dev, const struct pci_device_id *id)
489 if (ali15x3_setup(dev)) {
490 dev_err(&dev->dev,
491 "ALI15X3 not detected, module not inserted.\n");
492 return -ENODEV;
495 /* set up the sysfs linkage to our parent device */
496 ali15x3_adapter.dev.parent = &dev->dev;
498 snprintf(ali15x3_adapter.name, sizeof(ali15x3_adapter.name),
499 "SMBus ALI15X3 adapter at %04x", ali15x3_smba);
500 return i2c_add_adapter(&ali15x3_adapter);
503 static void __devexit ali15x3_remove(struct pci_dev *dev)
505 i2c_del_adapter(&ali15x3_adapter);
506 release_region(ali15x3_smba, ALI15X3_SMB_IOSIZE);
509 static struct pci_driver ali15x3_driver = {
510 .name = "ali15x3_smbus",
511 .id_table = ali15x3_ids,
512 .probe = ali15x3_probe,
513 .remove = __devexit_p(ali15x3_remove),
516 static int __init i2c_ali15x3_init(void)
518 return pci_register_driver(&ali15x3_driver);
521 static void __exit i2c_ali15x3_exit(void)
523 pci_unregister_driver(&ali15x3_driver);
526 MODULE_AUTHOR ("Frodo Looijaard <frodol@dds.nl>, "
527 "Philip Edelbrock <phil@netroedge.com>, "
528 "and Mark D. Studebaker <mdsxyz123@yahoo.com>");
529 MODULE_DESCRIPTION("ALI15X3 SMBus driver");
530 MODULE_LICENSE("GPL");
532 module_init(i2c_ali15x3_init);
533 module_exit(i2c_ali15x3_exit);