spi-topcliff-pch: supports a spi mode setup and bit order setup by IO control
[zen-stable.git] / drivers / net / ethernet / cisco / enic / vnic_cq.h
blob579315cbe803c91130c978b5e21538240aff3018
1 /*
2 * Copyright 2008-2010 Cisco Systems, Inc. All rights reserved.
3 * Copyright 2007 Nuova Systems, Inc. All rights reserved.
5 * This program is free software; you may redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; version 2 of the License.
9 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
10 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
11 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
12 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
13 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
14 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
15 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
16 * SOFTWARE.
20 #ifndef _VNIC_CQ_H_
21 #define _VNIC_CQ_H_
23 #include "cq_desc.h"
24 #include "vnic_dev.h"
26 /* Completion queue control */
27 struct vnic_cq_ctrl {
28 u64 ring_base; /* 0x00 */
29 u32 ring_size; /* 0x08 */
30 u32 pad0;
31 u32 flow_control_enable; /* 0x10 */
32 u32 pad1;
33 u32 color_enable; /* 0x18 */
34 u32 pad2;
35 u32 cq_head; /* 0x20 */
36 u32 pad3;
37 u32 cq_tail; /* 0x28 */
38 u32 pad4;
39 u32 cq_tail_color; /* 0x30 */
40 u32 pad5;
41 u32 interrupt_enable; /* 0x38 */
42 u32 pad6;
43 u32 cq_entry_enable; /* 0x40 */
44 u32 pad7;
45 u32 cq_message_enable; /* 0x48 */
46 u32 pad8;
47 u32 interrupt_offset; /* 0x50 */
48 u32 pad9;
49 u64 cq_message_addr; /* 0x58 */
50 u32 pad10;
53 struct vnic_cq {
54 unsigned int index;
55 struct vnic_dev *vdev;
56 struct vnic_cq_ctrl __iomem *ctrl; /* memory-mapped */
57 struct vnic_dev_ring ring;
58 unsigned int to_clean;
59 unsigned int last_color;
60 unsigned int interrupt_offset;
63 static inline unsigned int vnic_cq_service(struct vnic_cq *cq,
64 unsigned int work_to_do,
65 int (*q_service)(struct vnic_dev *vdev, struct cq_desc *cq_desc,
66 u8 type, u16 q_number, u16 completed_index, void *opaque),
67 void *opaque)
69 struct cq_desc *cq_desc;
70 unsigned int work_done = 0;
71 u16 q_number, completed_index;
72 u8 type, color;
74 cq_desc = (struct cq_desc *)((u8 *)cq->ring.descs +
75 cq->ring.desc_size * cq->to_clean);
76 cq_desc_dec(cq_desc, &type, &color,
77 &q_number, &completed_index);
79 while (color != cq->last_color) {
81 if ((*q_service)(cq->vdev, cq_desc, type,
82 q_number, completed_index, opaque))
83 break;
85 cq->to_clean++;
86 if (cq->to_clean == cq->ring.desc_count) {
87 cq->to_clean = 0;
88 cq->last_color = cq->last_color ? 0 : 1;
91 cq_desc = (struct cq_desc *)((u8 *)cq->ring.descs +
92 cq->ring.desc_size * cq->to_clean);
93 cq_desc_dec(cq_desc, &type, &color,
94 &q_number, &completed_index);
96 work_done++;
97 if (work_done >= work_to_do)
98 break;
101 return work_done;
104 void vnic_cq_free(struct vnic_cq *cq);
105 int vnic_cq_alloc(struct vnic_dev *vdev, struct vnic_cq *cq, unsigned int index,
106 unsigned int desc_count, unsigned int desc_size);
107 void vnic_cq_init(struct vnic_cq *cq, unsigned int flow_control_enable,
108 unsigned int color_enable, unsigned int cq_head, unsigned int cq_tail,
109 unsigned int cq_tail_color, unsigned int interrupt_enable,
110 unsigned int cq_entry_enable, unsigned int message_enable,
111 unsigned int interrupt_offset, u64 message_addr);
112 void vnic_cq_clean(struct vnic_cq *cq);
114 #endif /* _VNIC_CQ_H_ */