spi-topcliff-pch: supports a spi mode setup and bit order setup by IO control
[zen-stable.git] / drivers / net / ethernet / intel / igb / e1000_mbx.h
blobdbcfa3d5caeca753cf22a4f37e9cb313d9c30fa7
1 /*******************************************************************************
3 Intel(R) Gigabit Ethernet Linux driver
4 Copyright(c) 2007-2012 Intel Corporation.
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 more details.
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
22 Contact Information:
23 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
24 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26 *******************************************************************************/
28 #ifndef _E1000_MBX_H_
29 #define _E1000_MBX_H_
31 #include "e1000_hw.h"
33 #define E1000_P2VMAILBOX_STS 0x00000001 /* Initiate message send to VF */
34 #define E1000_P2VMAILBOX_ACK 0x00000002 /* Ack message recv'd from VF */
35 #define E1000_P2VMAILBOX_VFU 0x00000004 /* VF owns the mailbox buffer */
36 #define E1000_P2VMAILBOX_PFU 0x00000008 /* PF owns the mailbox buffer */
37 #define E1000_P2VMAILBOX_RVFU 0x00000010 /* Reset VFU - used when VF stuck */
39 #define E1000_MBVFICR_VFREQ_MASK 0x000000FF /* bits for VF messages */
40 #define E1000_MBVFICR_VFREQ_VF1 0x00000001 /* bit for VF 1 message */
41 #define E1000_MBVFICR_VFACK_MASK 0x00FF0000 /* bits for VF acks */
42 #define E1000_MBVFICR_VFACK_VF1 0x00010000 /* bit for VF 1 ack */
44 #define E1000_VFMAILBOX_SIZE 16 /* 16 32 bit words - 64 bytes */
46 /* If it's a E1000_VF_* msg then it originates in the VF and is sent to the
47 * PF. The reverse is true if it is E1000_PF_*.
48 * Message ACK's are the value or'd with 0xF0000000
50 #define E1000_VT_MSGTYPE_ACK 0x80000000 /* Messages below or'd with
51 * this are the ACK */
52 #define E1000_VT_MSGTYPE_NACK 0x40000000 /* Messages below or'd with
53 * this are the NACK */
54 #define E1000_VT_MSGTYPE_CTS 0x20000000 /* Indicates that VF is still
55 clear to send requests */
56 #define E1000_VT_MSGINFO_SHIFT 16
57 /* bits 23:16 are used for exra info for certain messages */
58 #define E1000_VT_MSGINFO_MASK (0xFF << E1000_VT_MSGINFO_SHIFT)
60 #define E1000_VF_RESET 0x01 /* VF requests reset */
61 #define E1000_VF_SET_MAC_ADDR 0x02 /* VF requests to set MAC addr */
62 #define E1000_VF_SET_MULTICAST 0x03 /* VF requests to set MC addr */
63 #define E1000_VF_SET_VLAN 0x04 /* VF requests to set VLAN */
64 #define E1000_VF_SET_LPE 0x05 /* VF requests to set VMOLR.LPE */
65 #define E1000_VF_SET_PROMISC 0x06 /*VF requests to clear VMOLR.ROPE/MPME*/
66 #define E1000_VF_SET_PROMISC_MULTICAST (0x02 << E1000_VT_MSGINFO_SHIFT)
68 #define E1000_PF_CONTROL_MSG 0x0100 /* PF control message */
70 s32 igb_read_mbx(struct e1000_hw *, u32 *, u16, u16);
71 s32 igb_write_mbx(struct e1000_hw *, u32 *, u16, u16);
72 s32 igb_check_for_msg(struct e1000_hw *, u16);
73 s32 igb_check_for_ack(struct e1000_hw *, u16);
74 s32 igb_check_for_rst(struct e1000_hw *, u16);
75 s32 igb_init_mbx_params_pf(struct e1000_hw *);
77 #endif /* _E1000_MBX_H_ */