spi-topcliff-pch: supports a spi mode setup and bit order setup by IO control
[zen-stable.git] / drivers / net / ethernet / mellanox / mlx4 / catas.c
blob915e947b422d63888dfd65522b7d14a3fa4162ff
1 /*
2 * Copyright (c) 2007 Cisco Systems, Inc. All rights reserved.
3 * Copyright (c) 2007, 2008 Mellanox Technologies. All rights reserved.
5 * This software is available to you under a choice of one of two
6 * licenses. You may choose to be licensed under the terms of the GNU
7 * General Public License (GPL) Version 2, available from the file
8 * COPYING in the main directory of this source tree, or the
9 * OpenIB.org BSD license below:
11 * Redistribution and use in source and binary forms, with or
12 * without modification, are permitted provided that the following
13 * conditions are met:
15 * - Redistributions of source code must retain the above
16 * copyright notice, this list of conditions and the following
17 * disclaimer.
19 * - Redistributions in binary form must reproduce the above
20 * copyright notice, this list of conditions and the following
21 * disclaimer in the documentation and/or other materials
22 * provided with the distribution.
24 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
25 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
26 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
27 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
28 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
29 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
30 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
31 * SOFTWARE.
34 #include <linux/workqueue.h>
35 #include <linux/module.h>
37 #include "mlx4.h"
39 enum {
40 MLX4_CATAS_POLL_INTERVAL = 5 * HZ,
43 static DEFINE_SPINLOCK(catas_lock);
45 static LIST_HEAD(catas_list);
46 static struct work_struct catas_work;
48 static int internal_err_reset = 1;
49 module_param(internal_err_reset, int, 0644);
50 MODULE_PARM_DESC(internal_err_reset,
51 "Reset device on internal errors if non-zero"
52 " (default 1, in SRIOV mode default is 0)");
54 static void dump_err_buf(struct mlx4_dev *dev)
56 struct mlx4_priv *priv = mlx4_priv(dev);
58 int i;
60 mlx4_err(dev, "Internal error detected:\n");
61 for (i = 0; i < priv->fw.catas_size; ++i)
62 mlx4_err(dev, " buf[%02x]: %08x\n",
63 i, swab32(readl(priv->catas_err.map + i)));
66 static void poll_catas(unsigned long dev_ptr)
68 struct mlx4_dev *dev = (struct mlx4_dev *) dev_ptr;
69 struct mlx4_priv *priv = mlx4_priv(dev);
71 if (readl(priv->catas_err.map)) {
72 dump_err_buf(dev);
74 mlx4_dispatch_event(dev, MLX4_DEV_EVENT_CATASTROPHIC_ERROR, 0);
76 if (internal_err_reset) {
77 spin_lock(&catas_lock);
78 list_add(&priv->catas_err.list, &catas_list);
79 spin_unlock(&catas_lock);
81 queue_work(mlx4_wq, &catas_work);
83 } else
84 mod_timer(&priv->catas_err.timer,
85 round_jiffies(jiffies + MLX4_CATAS_POLL_INTERVAL));
88 static void catas_reset(struct work_struct *work)
90 struct mlx4_priv *priv, *tmppriv;
91 struct mlx4_dev *dev;
93 LIST_HEAD(tlist);
94 int ret;
96 spin_lock_irq(&catas_lock);
97 list_splice_init(&catas_list, &tlist);
98 spin_unlock_irq(&catas_lock);
100 list_for_each_entry_safe(priv, tmppriv, &tlist, catas_err.list) {
101 struct pci_dev *pdev = priv->dev.pdev;
103 ret = mlx4_restart_one(priv->dev.pdev);
104 /* 'priv' now is not valid */
105 if (ret)
106 pr_err("mlx4 %s: Reset failed (%d)\n",
107 pci_name(pdev), ret);
108 else {
109 dev = pci_get_drvdata(pdev);
110 mlx4_dbg(dev, "Reset succeeded\n");
115 void mlx4_start_catas_poll(struct mlx4_dev *dev)
117 struct mlx4_priv *priv = mlx4_priv(dev);
118 phys_addr_t addr;
120 /*If we are in SRIOV the default of the module param must be 0*/
121 if (mlx4_is_mfunc(dev))
122 internal_err_reset = 0;
124 INIT_LIST_HEAD(&priv->catas_err.list);
125 init_timer(&priv->catas_err.timer);
126 priv->catas_err.map = NULL;
128 addr = pci_resource_start(dev->pdev, priv->fw.catas_bar) +
129 priv->fw.catas_offset;
131 priv->catas_err.map = ioremap(addr, priv->fw.catas_size * 4);
132 if (!priv->catas_err.map) {
133 mlx4_warn(dev, "Failed to map internal error buffer at 0x%llx\n",
134 (unsigned long long) addr);
135 return;
138 priv->catas_err.timer.data = (unsigned long) dev;
139 priv->catas_err.timer.function = poll_catas;
140 priv->catas_err.timer.expires =
141 round_jiffies(jiffies + MLX4_CATAS_POLL_INTERVAL);
142 add_timer(&priv->catas_err.timer);
145 void mlx4_stop_catas_poll(struct mlx4_dev *dev)
147 struct mlx4_priv *priv = mlx4_priv(dev);
149 del_timer_sync(&priv->catas_err.timer);
151 if (priv->catas_err.map)
152 iounmap(priv->catas_err.map);
154 spin_lock_irq(&catas_lock);
155 list_del(&priv->catas_err.list);
156 spin_unlock_irq(&catas_lock);
159 void __init mlx4_catas_init(void)
161 INIT_WORK(&catas_work, catas_reset);