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spi-topcliff-pch: supports a spi mode setup and bit order setup by IO control
[zen-stable.git] / drivers / net / ethernet / tundra / tsi108_eth.c
blob164fb775d7b333387cedacb80752c1c0b29bd566
1 /*******************************************************************************
2
3 Copyright(c) 2006 Tundra Semiconductor Corporation.
4
5 This program is free software; you can redistribute it and/or modify it
6 under the terms of the GNU General Public License as published by the Free
7 Software Foundation; either version 2 of the License, or (at your option)
8 any later version.
9
10 This program is distributed in the hope that it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 more details.
14
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc., 59
17 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
18
19 *******************************************************************************/
20
21 /* This driver is based on the driver code originally developed
22 * for the Intel IOC80314 (ForestLake) Gigabit Ethernet by
23 * scott.wood@timesys.com * Copyright (C) 2003 TimeSys Corporation
24 *
25 * Currently changes from original version are:
26 * - porting to Tsi108-based platform and kernel 2.6 (kong.lai@tundra.com)
27 * - modifications to handle two ports independently and support for
28 * additional PHY devices (alexandre.bounine@tundra.com)
29 * - Get hardware information from platform device. (tie-fei.zang@freescale.com)
30 *
31 */
32
33 #include <linux/module.h>
34 #include <linux/types.h>
35 #include <linux/init.h>
36 #include <linux/interrupt.h>
37 #include <linux/net.h>
38 #include <linux/netdevice.h>
39 #include <linux/etherdevice.h>
40 #include <linux/ethtool.h>
41 #include <linux/skbuff.h>
42 #include <linux/spinlock.h>
43 #include <linux/delay.h>
44 #include <linux/crc32.h>
45 #include <linux/mii.h>
46 #include <linux/device.h>
47 #include <linux/pci.h>
48 #include <linux/rtnetlink.h>
49 #include <linux/timer.h>
50 #include <linux/platform_device.h>
51 #include <linux/gfp.h>
52
53 #include <asm/system.h>
54 #include <asm/io.h>
55 #include <asm/tsi108.h>
56
57 #include "tsi108_eth.h"
58
59 #define MII_READ_DELAY 10000 /* max link wait time in msec */
60
61 #define TSI108_RXRING_LEN 256
62
63 /* NOTE: The driver currently does not support receiving packets
64 * larger than the buffer size, so don't decrease this (unless you
65 * want to add such support).
66 */
67 #define TSI108_RXBUF_SIZE 1536
68
69 #define TSI108_TXRING_LEN 256
70
71 #define TSI108_TX_INT_FREQ 64
72
73 /* Check the phy status every half a second. */
74 #define CHECK_PHY_INTERVAL (HZ/2)
75
76 static int tsi108_init_one(struct platform_device *pdev);
77 static int tsi108_ether_remove(struct platform_device *pdev);
78
79 struct tsi108_prv_data {
80 void __iomem *regs; /* Base of normal regs */
81 void __iomem *phyregs; /* Base of register bank used for PHY access */
82
83 struct net_device *dev;
84 struct napi_struct napi;
85
86 unsigned int phy; /* Index of PHY for this interface */
87 unsigned int irq_num;
88 unsigned int id;
89 unsigned int phy_type;
90
91 struct timer_list timer;/* Timer that triggers the check phy function */
92 unsigned int rxtail; /* Next entry in rxring to read */
93 unsigned int rxhead; /* Next entry in rxring to give a new buffer */
94 unsigned int rxfree; /* Number of free, allocated RX buffers */
95
96 unsigned int rxpending; /* Non-zero if there are still descriptors
97 * to be processed from a previous descriptor
98 * interrupt condition that has been cleared */
99
100 unsigned int txtail; /* Next TX descriptor to check status on */
101 unsigned int txhead; /* Next TX descriptor to use */
102
103 /* Number of free TX descriptors. This could be calculated from
104 * rxhead and rxtail if one descriptor were left unused to disambiguate
105 * full and empty conditions, but it's simpler to just keep track
106 * explicitly. */
107
108 unsigned int txfree;
109
110 unsigned int phy_ok; /* The PHY is currently powered on. */
111
112 /* PHY status (duplex is 1 for half, 2 for full,
113 * so that the default 0 indicates that neither has
114 * yet been configured). */
115
116 unsigned int link_up;
117 unsigned int speed;
118 unsigned int duplex;
119
120 tx_desc *txring;
121 rx_desc *rxring;
122 struct sk_buff *txskbs[TSI108_TXRING_LEN];
123 struct sk_buff *rxskbs[TSI108_RXRING_LEN];
124
125 dma_addr_t txdma, rxdma;
126
127 /* txlock nests in misclock and phy_lock */
128
129 spinlock_t txlock, misclock;
130
131 /* stats is used to hold the upper bits of each hardware counter,
132 * and tmpstats is used to hold the full values for returning
133 * to the caller of get_stats(). They must be separate in case
134 * an overflow interrupt occurs before the stats are consumed.
135 */
136
137 struct net_device_stats stats;
138 struct net_device_stats tmpstats;
139
140 /* These stats are kept separate in hardware, thus require individual
141 * fields for handling carry. They are combined in get_stats.
142 */
143
144 unsigned long rx_fcs; /* Add to rx_frame_errors */
145 unsigned long rx_short_fcs; /* Add to rx_frame_errors */
146 unsigned long rx_long_fcs; /* Add to rx_frame_errors */
147 unsigned long rx_underruns; /* Add to rx_length_errors */
148 unsigned long rx_overruns; /* Add to rx_length_errors */
149
150 unsigned long tx_coll_abort; /* Add to tx_aborted_errors/collisions */
151 unsigned long tx_pause_drop; /* Add to tx_aborted_errors */
152
153 unsigned long mc_hash[16];
154 u32 msg_enable; /* debug message level */
155 struct mii_if_info mii_if;
156 unsigned int init_media;
157 };
158
159 /* Structure for a device driver */
160
161 static struct platform_driver tsi_eth_driver = {
162 .probe = tsi108_init_one,
163 .remove = tsi108_ether_remove,
164 .driver = {
165 .name = "tsi-ethernet",
166 .owner = THIS_MODULE,
167 },
168 };
169
170 static void tsi108_timed_checker(unsigned long dev_ptr);
171
172 static void dump_eth_one(struct net_device *dev)
173 {
174 struct tsi108_prv_data *data = netdev_priv(dev);
175
176 printk("Dumping %s...\n", dev->name);
177 printk("intstat %x intmask %x phy_ok %d"
178 " link %d speed %d duplex %d\n",
179 TSI_READ(TSI108_EC_INTSTAT),
180 TSI_READ(TSI108_EC_INTMASK), data->phy_ok,
181 data->link_up, data->speed, data->duplex);
182
183 printk("TX: head %d, tail %d, free %d, stat %x, estat %x, err %x\n",
184 data->txhead, data->txtail, data->txfree,
185 TSI_READ(TSI108_EC_TXSTAT),
186 TSI_READ(TSI108_EC_TXESTAT),
187 TSI_READ(TSI108_EC_TXERR));
188
189 printk("RX: head %d, tail %d, free %d, stat %x,"
190 " estat %x, err %x, pending %d\n\n",
191 data->rxhead, data->rxtail, data->rxfree,
192 TSI_READ(TSI108_EC_RXSTAT),
193 TSI_READ(TSI108_EC_RXESTAT),
194 TSI_READ(TSI108_EC_RXERR), data->rxpending);
195 }
196
197 /* Synchronization is needed between the thread and up/down events.
198 * Note that the PHY is accessed through the same registers for both
199 * interfaces, so this can't be made interface-specific.
200 */
201
202 static DEFINE_SPINLOCK(phy_lock);
203
204 static int tsi108_read_mii(struct tsi108_prv_data *data, int reg)
205 {
206 unsigned i;
207
208 TSI_WRITE_PHY(TSI108_MAC_MII_ADDR,
209 (data->phy << TSI108_MAC_MII_ADDR_PHY) |
210 (reg << TSI108_MAC_MII_ADDR_REG));
211 TSI_WRITE_PHY(TSI108_MAC_MII_CMD, 0);
212 TSI_WRITE_PHY(TSI108_MAC_MII_CMD, TSI108_MAC_MII_CMD_READ);
213 for (i = 0; i < 100; i++) {
214 if (!(TSI_READ_PHY(TSI108_MAC_MII_IND) &
215 (TSI108_MAC_MII_IND_NOTVALID | TSI108_MAC_MII_IND_BUSY)))
216 break;
217 udelay(10);
218 }
219
220 if (i == 100)
221 return 0xffff;
222 else
223 return TSI_READ_PHY(TSI108_MAC_MII_DATAIN);
224 }
225
226 static void tsi108_write_mii(struct tsi108_prv_data *data,
227 int reg, u16 val)
228 {
229 unsigned i = 100;
230 TSI_WRITE_PHY(TSI108_MAC_MII_ADDR,
231 (data->phy << TSI108_MAC_MII_ADDR_PHY) |
232 (reg << TSI108_MAC_MII_ADDR_REG));
233 TSI_WRITE_PHY(TSI108_MAC_MII_DATAOUT, val);
234 while (i--) {
235 if(!(TSI_READ_PHY(TSI108_MAC_MII_IND) &
236 TSI108_MAC_MII_IND_BUSY))
237 break;
238 udelay(10);
239 }
240 }
241
242 static int tsi108_mdio_read(struct net_device *dev, int addr, int reg)
243 {
244 struct tsi108_prv_data *data = netdev_priv(dev);
245 return tsi108_read_mii(data, reg);
246 }
247
248 static void tsi108_mdio_write(struct net_device *dev, int addr, int reg, int val)
249 {
250 struct tsi108_prv_data *data = netdev_priv(dev);
251 tsi108_write_mii(data, reg, val);
252 }
253
254 static inline void tsi108_write_tbi(struct tsi108_prv_data *data,
255 int reg, u16 val)
256 {
257 unsigned i = 1000;
258 TSI_WRITE(TSI108_MAC_MII_ADDR,
259 (0x1e << TSI108_MAC_MII_ADDR_PHY)
260 | (reg << TSI108_MAC_MII_ADDR_REG));
261 TSI_WRITE(TSI108_MAC_MII_DATAOUT, val);
262 while(i--) {
263 if(!(TSI_READ(TSI108_MAC_MII_IND) & TSI108_MAC_MII_IND_BUSY))
264 return;
265 udelay(10);
266 }
267 printk(KERN_ERR "%s function time out\n", __func__);
268 }
269
270 static int mii_speed(struct mii_if_info *mii)
271 {
272 int advert, lpa, val, media;
273 int lpa2 = 0;
274 int speed;
275
276 if (!mii_link_ok(mii))
277 return 0;
278
279 val = (*mii->mdio_read) (mii->dev, mii->phy_id, MII_BMSR);
280 if ((val & BMSR_ANEGCOMPLETE) == 0)
281 return 0;
282
283 advert = (*mii->mdio_read) (mii->dev, mii->phy_id, MII_ADVERTISE);
284 lpa = (*mii->mdio_read) (mii->dev, mii->phy_id, MII_LPA);
285 media = mii_nway_result(advert & lpa);
286
287 if (mii->supports_gmii)
288 lpa2 = mii->mdio_read(mii->dev, mii->phy_id, MII_STAT1000);
289
290 speed = lpa2 & (LPA_1000FULL | LPA_1000HALF) ? 1000 :
291 (media & (ADVERTISE_100FULL | ADVERTISE_100HALF) ? 100 : 10);
292 return speed;
293 }
294
295 static void tsi108_check_phy(struct net_device *dev)
296 {
297 struct tsi108_prv_data *data = netdev_priv(dev);
298 u32 mac_cfg2_reg, portctrl_reg;
299 u32 duplex;
300 u32 speed;
301 unsigned long flags;
302
303 spin_lock_irqsave(&phy_lock, flags);
304
305 if (!data->phy_ok)
306 goto out;
307
308 duplex = mii_check_media(&data->mii_if, netif_msg_link(data), data->init_media);
309 data->init_media = 0;
310
311 if (netif_carrier_ok(dev)) {
312
313 speed = mii_speed(&data->mii_if);
314
315 if ((speed != data->speed) || duplex) {
316
317 mac_cfg2_reg = TSI_READ(TSI108_MAC_CFG2);
318 portctrl_reg = TSI_READ(TSI108_EC_PORTCTRL);
319
320 mac_cfg2_reg &= ~TSI108_MAC_CFG2_IFACE_MASK;
321
322 if (speed == 1000) {
323 mac_cfg2_reg |= TSI108_MAC_CFG2_GIG;
324 portctrl_reg &= ~TSI108_EC_PORTCTRL_NOGIG;
325 } else {
326 mac_cfg2_reg |= TSI108_MAC_CFG2_NOGIG;
327 portctrl_reg |= TSI108_EC_PORTCTRL_NOGIG;
328 }
329
330 data->speed = speed;
331
332 if (data->mii_if.full_duplex) {
333 mac_cfg2_reg |= TSI108_MAC_CFG2_FULLDUPLEX;
334 portctrl_reg &= ~TSI108_EC_PORTCTRL_HALFDUPLEX;
335 data->duplex = 2;
336 } else {
337 mac_cfg2_reg &= ~TSI108_MAC_CFG2_FULLDUPLEX;
338 portctrl_reg |= TSI108_EC_PORTCTRL_HALFDUPLEX;
339 data->duplex = 1;
340 }
341
342 TSI_WRITE(TSI108_MAC_CFG2, mac_cfg2_reg);
343 TSI_WRITE(TSI108_EC_PORTCTRL, portctrl_reg);
344 }
345
346 if (data->link_up == 0) {
347 /* The manual says it can take 3-4 usecs for the speed change
348 * to take effect.
349 */
350 udelay(5);
351
352 spin_lock(&data->txlock);
353 if (is_valid_ether_addr(dev->dev_addr) && data->txfree)
354 netif_wake_queue(dev);
355
356 data->link_up = 1;
357 spin_unlock(&data->txlock);
358 }
359 } else {
360 if (data->link_up == 1) {
361 netif_stop_queue(dev);
362 data->link_up = 0;
363 printk(KERN_NOTICE "%s : link is down\n", dev->name);
364 }
365
366 goto out;
367 }
368
369
370 out:
371 spin_unlock_irqrestore(&phy_lock, flags);
372 }
373
374 static inline void
375 tsi108_stat_carry_one(int carry, int carry_bit, int carry_shift,
376 unsigned long *upper)
377 {
378 if (carry & carry_bit)
379 *upper += carry_shift;
380 }
381
382 static void tsi108_stat_carry(struct net_device *dev)
383 {
384 struct tsi108_prv_data *data = netdev_priv(dev);
385 u32 carry1, carry2;
386
387 spin_lock_irq(&data->misclock);
388
389 carry1 = TSI_READ(TSI108_STAT_CARRY1);
390 carry2 = TSI_READ(TSI108_STAT_CARRY2);
391
392 TSI_WRITE(TSI108_STAT_CARRY1, carry1);
393 TSI_WRITE(TSI108_STAT_CARRY2, carry2);
394
395 tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXBYTES,
396 TSI108_STAT_RXBYTES_CARRY, &data->stats.rx_bytes);
397
398 tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXPKTS,
399 TSI108_STAT_RXPKTS_CARRY,
400 &data->stats.rx_packets);
401
402 tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXFCS,
403 TSI108_STAT_RXFCS_CARRY, &data->rx_fcs);
404
405 tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXMCAST,
406 TSI108_STAT_RXMCAST_CARRY,
407 &data->stats.multicast);
408
409 tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXALIGN,
410 TSI108_STAT_RXALIGN_CARRY,
411 &data->stats.rx_frame_errors);
412
413 tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXLENGTH,
414 TSI108_STAT_RXLENGTH_CARRY,
415 &data->stats.rx_length_errors);
416
417 tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXRUNT,
418 TSI108_STAT_RXRUNT_CARRY, &data->rx_underruns);
419
420 tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXJUMBO,
421 TSI108_STAT_RXJUMBO_CARRY, &data->rx_overruns);
422
423 tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXFRAG,
424 TSI108_STAT_RXFRAG_CARRY, &data->rx_short_fcs);
425
426 tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXJABBER,
427 TSI108_STAT_RXJABBER_CARRY, &data->rx_long_fcs);
428
429 tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXDROP,
430 TSI108_STAT_RXDROP_CARRY,
431 &data->stats.rx_missed_errors);
432
433 tsi108_stat_carry_one(carry2, TSI108_STAT_CARRY2_TXBYTES,
434 TSI108_STAT_TXBYTES_CARRY, &data->stats.tx_bytes);
435
436 tsi108_stat_carry_one(carry2, TSI108_STAT_CARRY2_TXPKTS,
437 TSI108_STAT_TXPKTS_CARRY,
438 &data->stats.tx_packets);
439
440 tsi108_stat_carry_one(carry2, TSI108_STAT_CARRY2_TXEXDEF,
441 TSI108_STAT_TXEXDEF_CARRY,
442 &data->stats.tx_aborted_errors);
443
444 tsi108_stat_carry_one(carry2, TSI108_STAT_CARRY2_TXEXCOL,
445 TSI108_STAT_TXEXCOL_CARRY, &data->tx_coll_abort);
446
447 tsi108_stat_carry_one(carry2, TSI108_STAT_CARRY2_TXTCOL,
448 TSI108_STAT_TXTCOL_CARRY,
449 &data->stats.collisions);
450
451 tsi108_stat_carry_one(carry2, TSI108_STAT_CARRY2_TXPAUSE,
452 TSI108_STAT_TXPAUSEDROP_CARRY,
453 &data->tx_pause_drop);
454
455 spin_unlock_irq(&data->misclock);
456 }
457
458 /* Read a stat counter atomically with respect to carries.
459 * data->misclock must be held.
460 */
461 static inline unsigned long
462 tsi108_read_stat(struct tsi108_prv_data * data, int reg, int carry_bit,
463 int carry_shift, unsigned long *upper)
464 {
465 int carryreg;
466 unsigned long val;
467
468 if (reg < 0xb0)
469 carryreg = TSI108_STAT_CARRY1;
470 else
471 carryreg = TSI108_STAT_CARRY2;
472
473 again:
474 val = TSI_READ(reg) | *upper;
475
476 /* Check to see if it overflowed, but the interrupt hasn't
477 * been serviced yet. If so, handle the carry here, and
478 * try again.
479 */
480
481 if (unlikely(TSI_READ(carryreg) & carry_bit)) {
482 *upper += carry_shift;
483 TSI_WRITE(carryreg, carry_bit);
484 goto again;
485 }
486
487 return val;
488 }
489
490 static struct net_device_stats *tsi108_get_stats(struct net_device *dev)
491 {
492 unsigned long excol;
493
494 struct tsi108_prv_data *data = netdev_priv(dev);
495 spin_lock_irq(&data->misclock);
496
497 data->tmpstats.rx_packets =
498 tsi108_read_stat(data, TSI108_STAT_RXPKTS,
499 TSI108_STAT_CARRY1_RXPKTS,
500 TSI108_STAT_RXPKTS_CARRY, &data->stats.rx_packets);
501
502 data->tmpstats.tx_packets =
503 tsi108_read_stat(data, TSI108_STAT_TXPKTS,
504 TSI108_STAT_CARRY2_TXPKTS,
505 TSI108_STAT_TXPKTS_CARRY, &data->stats.tx_packets);
506
507 data->tmpstats.rx_bytes =
508 tsi108_read_stat(data, TSI108_STAT_RXBYTES,
509 TSI108_STAT_CARRY1_RXBYTES,
510 TSI108_STAT_RXBYTES_CARRY, &data->stats.rx_bytes);
511
512 data->tmpstats.tx_bytes =
513 tsi108_read_stat(data, TSI108_STAT_TXBYTES,
514 TSI108_STAT_CARRY2_TXBYTES,
515 TSI108_STAT_TXBYTES_CARRY, &data->stats.tx_bytes);
516
517 data->tmpstats.multicast =
518 tsi108_read_stat(data, TSI108_STAT_RXMCAST,
519 TSI108_STAT_CARRY1_RXMCAST,
520 TSI108_STAT_RXMCAST_CARRY, &data->stats.multicast);
521
522 excol = tsi108_read_stat(data, TSI108_STAT_TXEXCOL,
523 TSI108_STAT_CARRY2_TXEXCOL,
524 TSI108_STAT_TXEXCOL_CARRY,
525 &data->tx_coll_abort);
526
527 data->tmpstats.collisions =
528 tsi108_read_stat(data, TSI108_STAT_TXTCOL,
529 TSI108_STAT_CARRY2_TXTCOL,
530 TSI108_STAT_TXTCOL_CARRY, &data->stats.collisions);
531
532 data->tmpstats.collisions += excol;
533
534 data->tmpstats.rx_length_errors =
535 tsi108_read_stat(data, TSI108_STAT_RXLENGTH,
536 TSI108_STAT_CARRY1_RXLENGTH,
537 TSI108_STAT_RXLENGTH_CARRY,
538 &data->stats.rx_length_errors);
539
540 data->tmpstats.rx_length_errors +=
541 tsi108_read_stat(data, TSI108_STAT_RXRUNT,
542 TSI108_STAT_CARRY1_RXRUNT,
543 TSI108_STAT_RXRUNT_CARRY, &data->rx_underruns);
544
545 data->tmpstats.rx_length_errors +=
546 tsi108_read_stat(data, TSI108_STAT_RXJUMBO,
547 TSI108_STAT_CARRY1_RXJUMBO,
548 TSI108_STAT_RXJUMBO_CARRY, &data->rx_overruns);
549
550 data->tmpstats.rx_frame_errors =
551 tsi108_read_stat(data, TSI108_STAT_RXALIGN,
552 TSI108_STAT_CARRY1_RXALIGN,
553 TSI108_STAT_RXALIGN_CARRY,
554 &data->stats.rx_frame_errors);
555
556 data->tmpstats.rx_frame_errors +=
557 tsi108_read_stat(data, TSI108_STAT_RXFCS,
558 TSI108_STAT_CARRY1_RXFCS, TSI108_STAT_RXFCS_CARRY,
559 &data->rx_fcs);
560
561 data->tmpstats.rx_frame_errors +=
562 tsi108_read_stat(data, TSI108_STAT_RXFRAG,
563 TSI108_STAT_CARRY1_RXFRAG,
564 TSI108_STAT_RXFRAG_CARRY, &data->rx_short_fcs);
565
566 data->tmpstats.rx_missed_errors =
567 tsi108_read_stat(data, TSI108_STAT_RXDROP,
568 TSI108_STAT_CARRY1_RXDROP,
569 TSI108_STAT_RXDROP_CARRY,
570 &data->stats.rx_missed_errors);
571
572 /* These three are maintained by software. */
573 data->tmpstats.rx_fifo_errors = data->stats.rx_fifo_errors;
574 data->tmpstats.rx_crc_errors = data->stats.rx_crc_errors;
575
576 data->tmpstats.tx_aborted_errors =
577 tsi108_read_stat(data, TSI108_STAT_TXEXDEF,
578 TSI108_STAT_CARRY2_TXEXDEF,
579 TSI108_STAT_TXEXDEF_CARRY,
580 &data->stats.tx_aborted_errors);
581
582 data->tmpstats.tx_aborted_errors +=
583 tsi108_read_stat(data, TSI108_STAT_TXPAUSEDROP,
584 TSI108_STAT_CARRY2_TXPAUSE,
585 TSI108_STAT_TXPAUSEDROP_CARRY,
586 &data->tx_pause_drop);
587
588 data->tmpstats.tx_aborted_errors += excol;
589
590 data->tmpstats.tx_errors = data->tmpstats.tx_aborted_errors;
591 data->tmpstats.rx_errors = data->tmpstats.rx_length_errors +
592 data->tmpstats.rx_crc_errors +
593 data->tmpstats.rx_frame_errors +
594 data->tmpstats.rx_fifo_errors + data->tmpstats.rx_missed_errors;
595
596 spin_unlock_irq(&data->misclock);
597 return &data->tmpstats;
598 }
599
600 static void tsi108_restart_rx(struct tsi108_prv_data * data, struct net_device *dev)
601 {
602 TSI_WRITE(TSI108_EC_RXQ_PTRHIGH,
603 TSI108_EC_RXQ_PTRHIGH_VALID);
604
605 TSI_WRITE(TSI108_EC_RXCTRL, TSI108_EC_RXCTRL_GO
606 | TSI108_EC_RXCTRL_QUEUE0);
607 }
608
609 static void tsi108_restart_tx(struct tsi108_prv_data * data)
610 {
611 TSI_WRITE(TSI108_EC_TXQ_PTRHIGH,
612 TSI108_EC_TXQ_PTRHIGH_VALID);
613
614 TSI_WRITE(TSI108_EC_TXCTRL, TSI108_EC_TXCTRL_IDLEINT |
615 TSI108_EC_TXCTRL_GO | TSI108_EC_TXCTRL_QUEUE0);
616 }
617
618 /* txlock must be held by caller, with IRQs disabled, and
619 * with permission to re-enable them when the lock is dropped.
620 */
621 static void tsi108_complete_tx(struct net_device *dev)
622 {
623 struct tsi108_prv_data *data = netdev_priv(dev);
624 int tx;
625 struct sk_buff *skb;
626 int release = 0;
627
628 while (!data->txfree || data->txhead != data->txtail) {
629 tx = data->txtail;
630
631 if (data->txring[tx].misc & TSI108_TX_OWN)
632 break;
633
634 skb = data->txskbs[tx];
635
636 if (!(data->txring[tx].misc & TSI108_TX_OK))
637 printk("%s: bad tx packet, misc %x\n",
638 dev->name, data->txring[tx].misc);
639
640 data->txtail = (data->txtail + 1) % TSI108_TXRING_LEN;
641 data->txfree++;
642
643 if (data->txring[tx].misc & TSI108_TX_EOF) {
644 dev_kfree_skb_any(skb);
645 release++;
646 }
647 }
648
649 if (release) {
650 if (is_valid_ether_addr(dev->dev_addr) && data->link_up)
651 netif_wake_queue(dev);
652 }
653 }
654
655 static int tsi108_send_packet(struct sk_buff * skb, struct net_device *dev)
656 {
657 struct tsi108_prv_data *data = netdev_priv(dev);
658 int frags = skb_shinfo(skb)->nr_frags + 1;
659 int i;
660
661 if (!data->phy_ok && net_ratelimit())
662 printk(KERN_ERR "%s: Transmit while PHY is down!\n", dev->name);
663
664 if (!data->link_up) {
665 printk(KERN_ERR "%s: Transmit while link is down!\n",
666 dev->name);
667 netif_stop_queue(dev);
668 return NETDEV_TX_BUSY;
669 }
670
671 if (data->txfree < MAX_SKB_FRAGS + 1) {
672 netif_stop_queue(dev);
673
674 if (net_ratelimit())
675 printk(KERN_ERR "%s: Transmit with full tx ring!\n",
676 dev->name);
677 return NETDEV_TX_BUSY;
678 }
679
680 if (data->txfree - frags < MAX_SKB_FRAGS + 1) {
681 netif_stop_queue(dev);
682 }
683
684 spin_lock_irq(&data->txlock);
685
686 for (i = 0; i < frags; i++) {
687 int misc = 0;
688 int tx = data->txhead;
689
690 /* This is done to mark every TSI108_TX_INT_FREQ tx buffers with
691 * the interrupt bit. TX descriptor-complete interrupts are
692 * enabled when the queue fills up, and masked when there is
693 * still free space. This way, when saturating the outbound
694 * link, the tx interrupts are kept to a reasonable level.
695 * When the queue is not full, reclamation of skbs still occurs
696 * as new packets are transmitted, or on a queue-empty
697 * interrupt.
698 */
699
700 if ((tx % TSI108_TX_INT_FREQ == 0) &&
701 ((TSI108_TXRING_LEN - data->txfree) >= TSI108_TX_INT_FREQ))
702 misc = TSI108_TX_INT;
703
704 data->txskbs[tx] = skb;
705
706 if (i == 0) {
707 data->txring[tx].buf0 = dma_map_single(NULL, skb->data,
708 skb_headlen(skb), DMA_TO_DEVICE);
709 data->txring[tx].len = skb_headlen(skb);
710 misc |= TSI108_TX_SOF;
711 } else {
712 const skb_frag_t *frag = &skb_shinfo(skb)->frags[i - 1];
713
714 data->txring[tx].buf0 = skb_frag_dma_map(NULL, frag,
715 0,
716 skb_frag_size(frag),
717 DMA_TO_DEVICE);
718 data->txring[tx].len = skb_frag_size(frag);
719 }
720
721 if (i == frags - 1)
722 misc |= TSI108_TX_EOF;
723
724 if (netif_msg_pktdata(data)) {
725 int i;
726 printk("%s: Tx Frame contents (%d)\n", dev->name,
727 skb->len);
728 for (i = 0; i < skb->len; i++)
729 printk(" %2.2x", skb->data[i]);
730 printk(".\n");
731 }
732 data->txring[tx].misc = misc | TSI108_TX_OWN;
733
734 data->txhead = (data->txhead + 1) % TSI108_TXRING_LEN;
735 data->txfree--;
736 }
737
738 tsi108_complete_tx(dev);
739
740 /* This must be done after the check for completed tx descriptors,
741 * so that the tail pointer is correct.
742 */
743
744 if (!(TSI_READ(TSI108_EC_TXSTAT) & TSI108_EC_TXSTAT_QUEUE0))
745 tsi108_restart_tx(data);
746
747 spin_unlock_irq(&data->txlock);
748 return NETDEV_TX_OK;
749 }
750
751 static int tsi108_complete_rx(struct net_device *dev, int budget)
752 {
753 struct tsi108_prv_data *data = netdev_priv(dev);
754 int done = 0;
755
756 while (data->rxfree && done != budget) {
757 int rx = data->rxtail;
758 struct sk_buff *skb;
759
760 if (data->rxring[rx].misc & TSI108_RX_OWN)
761 break;
762
763 skb = data->rxskbs[rx];
764 data->rxtail = (data->rxtail + 1) % TSI108_RXRING_LEN;
765 data->rxfree--;
766 done++;
767
768 if (data->rxring[rx].misc & TSI108_RX_BAD) {
769 spin_lock_irq(&data->misclock);
770
771 if (data->rxring[rx].misc & TSI108_RX_CRC)
772 data->stats.rx_crc_errors++;
773 if (data->rxring[rx].misc & TSI108_RX_OVER)
774 data->stats.rx_fifo_errors++;
775
776 spin_unlock_irq(&data->misclock);
777
778 dev_kfree_skb_any(skb);
779 continue;
780 }
781 if (netif_msg_pktdata(data)) {
782 int i;
783 printk("%s: Rx Frame contents (%d)\n",
784 dev->name, data->rxring[rx].len);
785 for (i = 0; i < data->rxring[rx].len; i++)
786 printk(" %2.2x", skb->data[i]);
787 printk(".\n");
788 }
789
790 skb_put(skb, data->rxring[rx].len);
791 skb->protocol = eth_type_trans(skb, dev);
792 netif_receive_skb(skb);
793 }
794
795 return done;
796 }
797
798 static int tsi108_refill_rx(struct net_device *dev, int budget)
799 {
800 struct tsi108_prv_data *data = netdev_priv(dev);
801 int done = 0;
802
803 while (data->rxfree != TSI108_RXRING_LEN && done != budget) {
804 int rx = data->rxhead;
805 struct sk_buff *skb;
806
807 skb = netdev_alloc_skb_ip_align(dev, TSI108_RXBUF_SIZE);
808 data->rxskbs[rx] = skb;
809 if (!skb)
810 break;
811
812 data->rxring[rx].buf0 = dma_map_single(NULL, skb->data,
813 TSI108_RX_SKB_SIZE,
814 DMA_FROM_DEVICE);
815
816 /* Sometimes the hardware sets blen to zero after packet
817 * reception, even though the manual says that it's only ever
818 * modified by the driver.
819 */
820
821 data->rxring[rx].blen = TSI108_RX_SKB_SIZE;
822 data->rxring[rx].misc = TSI108_RX_OWN | TSI108_RX_INT;
823
824 data->rxhead = (data->rxhead + 1) % TSI108_RXRING_LEN;
825 data->rxfree++;
826 done++;
827 }
828
829 if (done != 0 && !(TSI_READ(TSI108_EC_RXSTAT) &
830 TSI108_EC_RXSTAT_QUEUE0))
831 tsi108_restart_rx(data, dev);
832
833 return done;
834 }
835
836 static int tsi108_poll(struct napi_struct *napi, int budget)
837 {
838 struct tsi108_prv_data *data = container_of(napi, struct tsi108_prv_data, napi);
839 struct net_device *dev = data->dev;
840 u32 estat = TSI_READ(TSI108_EC_RXESTAT);
841 u32 intstat = TSI_READ(TSI108_EC_INTSTAT);
842 int num_received = 0, num_filled = 0;
843
844 intstat &= TSI108_INT_RXQUEUE0 | TSI108_INT_RXTHRESH |
845 TSI108_INT_RXOVERRUN | TSI108_INT_RXERROR | TSI108_INT_RXWAIT;
846
847 TSI_WRITE(TSI108_EC_RXESTAT, estat);
848 TSI_WRITE(TSI108_EC_INTSTAT, intstat);
849
850 if (data->rxpending || (estat & TSI108_EC_RXESTAT_Q0_DESCINT))
851 num_received = tsi108_complete_rx(dev, budget);
852
853 /* This should normally fill no more slots than the number of
854 * packets received in tsi108_complete_rx(). The exception
855 * is when we previously ran out of memory for RX SKBs. In that
856 * case, it's helpful to obey the budget, not only so that the
857 * CPU isn't hogged, but so that memory (which may still be low)
858 * is not hogged by one device.
859 *
860 * A work unit is considered to be two SKBs to allow us to catch
861 * up when the ring has shrunk due to out-of-memory but we're
862 * still removing the full budget's worth of packets each time.
863 */
864
865 if (data->rxfree < TSI108_RXRING_LEN)
866 num_filled = tsi108_refill_rx(dev, budget * 2);
867
868 if (intstat & TSI108_INT_RXERROR) {
869 u32 err = TSI_READ(TSI108_EC_RXERR);
870 TSI_WRITE(TSI108_EC_RXERR, err);
871
872 if (err) {
873 if (net_ratelimit())
874 printk(KERN_DEBUG "%s: RX error %x\n",
875 dev->name, err);
876
877 if (!(TSI_READ(TSI108_EC_RXSTAT) &
878 TSI108_EC_RXSTAT_QUEUE0))
879 tsi108_restart_rx(data, dev);
880 }
881 }
882
883 if (intstat & TSI108_INT_RXOVERRUN) {
884 spin_lock_irq(&data->misclock);
885 data->stats.rx_fifo_errors++;
886 spin_unlock_irq(&data->misclock);
887 }
888
889 if (num_received < budget) {
890 data->rxpending = 0;
891 napi_complete(napi);
892
893 TSI_WRITE(TSI108_EC_INTMASK,
894 TSI_READ(TSI108_EC_INTMASK)
895 & ~(TSI108_INT_RXQUEUE0
896 | TSI108_INT_RXTHRESH |
897 TSI108_INT_RXOVERRUN |
898 TSI108_INT_RXERROR |
899 TSI108_INT_RXWAIT));
900 } else {
901 data->rxpending = 1;
902 }
903
904 return num_received;
905 }
906
907 static void tsi108_rx_int(struct net_device *dev)
908 {
909 struct tsi108_prv_data *data = netdev_priv(dev);
910
911 /* A race could cause dev to already be scheduled, so it's not an
912 * error if that happens (and interrupts shouldn't be re-masked,
913 * because that can cause harmful races, if poll has already
914 * unmasked them but not cleared LINK_STATE_SCHED).
915 *
916 * This can happen if this code races with tsi108_poll(), which masks
917 * the interrupts after tsi108_irq_one() read the mask, but before
918 * napi_schedule is called. It could also happen due to calls
919 * from tsi108_check_rxring().
920 */
921
922 if (napi_schedule_prep(&data->napi)) {
923 /* Mask, rather than ack, the receive interrupts. The ack
924 * will happen in tsi108_poll().
925 */
926
927 TSI_WRITE(TSI108_EC_INTMASK,
928 TSI_READ(TSI108_EC_INTMASK) |
929 TSI108_INT_RXQUEUE0
930 | TSI108_INT_RXTHRESH |
931 TSI108_INT_RXOVERRUN | TSI108_INT_RXERROR |
932 TSI108_INT_RXWAIT);
933 __napi_schedule(&data->napi);
934 } else {
935 if (!netif_running(dev)) {
936 /* This can happen if an interrupt occurs while the
937 * interface is being brought down, as the START
938 * bit is cleared before the stop function is called.
939 *
940 * In this case, the interrupts must be masked, or
941 * they will continue indefinitely.
942 *
943 * There's a race here if the interface is brought down
944 * and then up in rapid succession, as the device could
945 * be made running after the above check and before
946 * the masking below. This will only happen if the IRQ
947 * thread has a lower priority than the task brining
948 * up the interface. Fixing this race would likely
949 * require changes in generic code.
950 */
951
952 TSI_WRITE(TSI108_EC_INTMASK,
953 TSI_READ
954 (TSI108_EC_INTMASK) |
955 TSI108_INT_RXQUEUE0 |
956 TSI108_INT_RXTHRESH |
957 TSI108_INT_RXOVERRUN |
958 TSI108_INT_RXERROR |
959 TSI108_INT_RXWAIT);
960 }
961 }
962 }
963
964 /* If the RX ring has run out of memory, try periodically
965 * to allocate some more, as otherwise poll would never
966 * get called (apart from the initial end-of-queue condition).
967 *
968 * This is called once per second (by default) from the thread.
969 */
970
971 static void tsi108_check_rxring(struct net_device *dev)
972 {
973 struct tsi108_prv_data *data = netdev_priv(dev);
974
975 /* A poll is scheduled, as opposed to caling tsi108_refill_rx
976 * directly, so as to keep the receive path single-threaded
977 * (and thus not needing a lock).
978 */
979
980 if (netif_running(dev) && data->rxfree < TSI108_RXRING_LEN / 4)
981 tsi108_rx_int(dev);
982 }
983
984 static void tsi108_tx_int(struct net_device *dev)
985 {
986 struct tsi108_prv_data *data = netdev_priv(dev);
987 u32 estat = TSI_READ(TSI108_EC_TXESTAT);
988
989 TSI_WRITE(TSI108_EC_TXESTAT, estat);
990 TSI_WRITE(TSI108_EC_INTSTAT, TSI108_INT_TXQUEUE0 |
991 TSI108_INT_TXIDLE | TSI108_INT_TXERROR);
992 if (estat & TSI108_EC_TXESTAT_Q0_ERR) {
993 u32 err = TSI_READ(TSI108_EC_TXERR);
994 TSI_WRITE(TSI108_EC_TXERR, err);
995
996 if (err && net_ratelimit())
997 printk(KERN_ERR "%s: TX error %x\n", dev->name, err);
998 }
999
1000 if (estat & (TSI108_EC_TXESTAT_Q0_DESCINT | TSI108_EC_TXESTAT_Q0_EOQ)) {
1001 spin_lock(&data->txlock);
1002 tsi108_complete_tx(dev);
1003 spin_unlock(&data->txlock);
1004 }
1005 }
1006
1007
1008 static irqreturn_t tsi108_irq(int irq, void *dev_id)
1009 {
1010 struct net_device *dev = dev_id;
1011 struct tsi108_prv_data *data = netdev_priv(dev);
1012 u32 stat = TSI_READ(TSI108_EC_INTSTAT);
1013
1014 if (!(stat & TSI108_INT_ANY))
1015 return IRQ_NONE; /* Not our interrupt */
1016
1017 stat &= ~TSI_READ(TSI108_EC_INTMASK);
1018
1019 if (stat & (TSI108_INT_TXQUEUE0 | TSI108_INT_TXIDLE |
1020 TSI108_INT_TXERROR))
1021 tsi108_tx_int(dev);
1022 if (stat & (TSI108_INT_RXQUEUE0 | TSI108_INT_RXTHRESH |
1023 TSI108_INT_RXWAIT | TSI108_INT_RXOVERRUN |
1024 TSI108_INT_RXERROR))
1025 tsi108_rx_int(dev);
1026
1027 if (stat & TSI108_INT_SFN) {
1028 if (net_ratelimit())
1029 printk(KERN_DEBUG "%s: SFN error\n", dev->name);
1030 TSI_WRITE(TSI108_EC_INTSTAT, TSI108_INT_SFN);
1031 }
1032
1033 if (stat & TSI108_INT_STATCARRY) {
1034 tsi108_stat_carry(dev);
1035 TSI_WRITE(TSI108_EC_INTSTAT, TSI108_INT_STATCARRY);
1036 }
1037
1038 return IRQ_HANDLED;
1039 }
1040
1041 static void tsi108_stop_ethernet(struct net_device *dev)
1042 {
1043 struct tsi108_prv_data *data = netdev_priv(dev);
1044 int i = 1000;
1045 /* Disable all TX and RX queues ... */
1046 TSI_WRITE(TSI108_EC_TXCTRL, 0);
1047 TSI_WRITE(TSI108_EC_RXCTRL, 0);
1048
1049 /* ...and wait for them to become idle */
1050 while(i--) {
1051 if(!(TSI_READ(TSI108_EC_TXSTAT) & TSI108_EC_TXSTAT_ACTIVE))
1052 break;
1053 udelay(10);
1054 }
1055 i = 1000;
1056 while(i--){
1057 if(!(TSI_READ(TSI108_EC_RXSTAT) & TSI108_EC_RXSTAT_ACTIVE))
1058 return;
1059 udelay(10);
1060 }
1061 printk(KERN_ERR "%s function time out\n", __func__);
1062 }
1063
1064 static void tsi108_reset_ether(struct tsi108_prv_data * data)
1065 {
1066 TSI_WRITE(TSI108_MAC_CFG1, TSI108_MAC_CFG1_SOFTRST);
1067 udelay(100);
1068 TSI_WRITE(TSI108_MAC_CFG1, 0);
1069
1070 TSI_WRITE(TSI108_EC_PORTCTRL, TSI108_EC_PORTCTRL_STATRST);
1071 udelay(100);
1072 TSI_WRITE(TSI108_EC_PORTCTRL,
1073 TSI_READ(TSI108_EC_PORTCTRL) &
1074 ~TSI108_EC_PORTCTRL_STATRST);
1075
1076 TSI_WRITE(TSI108_EC_TXCFG, TSI108_EC_TXCFG_RST);
1077 udelay(100);
1078 TSI_WRITE(TSI108_EC_TXCFG,
1079 TSI_READ(TSI108_EC_TXCFG) &
1080 ~TSI108_EC_TXCFG_RST);
1081
1082 TSI_WRITE(TSI108_EC_RXCFG, TSI108_EC_RXCFG_RST);
1083 udelay(100);
1084 TSI_WRITE(TSI108_EC_RXCFG,
1085 TSI_READ(TSI108_EC_RXCFG) &
1086 ~TSI108_EC_RXCFG_RST);
1087
1088 TSI_WRITE(TSI108_MAC_MII_MGMT_CFG,
1089 TSI_READ(TSI108_MAC_MII_MGMT_CFG) |
1090 TSI108_MAC_MII_MGMT_RST);
1091 udelay(100);
1092 TSI_WRITE(TSI108_MAC_MII_MGMT_CFG,
1093 (TSI_READ(TSI108_MAC_MII_MGMT_CFG) &
1094 ~(TSI108_MAC_MII_MGMT_RST |
1095 TSI108_MAC_MII_MGMT_CLK)) | 0x07);
1096 }
1097
1098 static int tsi108_get_mac(struct net_device *dev)
1099 {
1100 struct tsi108_prv_data *data = netdev_priv(dev);
1101 u32 word1 = TSI_READ(TSI108_MAC_ADDR1);
1102 u32 word2 = TSI_READ(TSI108_MAC_ADDR2);
1103
1104 /* Note that the octets are reversed from what the manual says,
1105 * producing an even weirder ordering...
1106 */
1107 if (word2 == 0 && word1 == 0) {
1108 dev->dev_addr[0] = 0x00;
1109 dev->dev_addr[1] = 0x06;
1110 dev->dev_addr[2] = 0xd2;
1111 dev->dev_addr[3] = 0x00;
1112 dev->dev_addr[4] = 0x00;
1113 if (0x8 == data->phy)
1114 dev->dev_addr[5] = 0x01;
1115 else
1116 dev->dev_addr[5] = 0x02;
1117
1118 word2 = (dev->dev_addr[0] << 16) | (dev->dev_addr[1] << 24);
1119
1120 word1 = (dev->dev_addr[2] << 0) | (dev->dev_addr[3] << 8) |
1121 (dev->dev_addr[4] << 16) | (dev->dev_addr[5] << 24);
1122
1123 TSI_WRITE(TSI108_MAC_ADDR1, word1);
1124 TSI_WRITE(TSI108_MAC_ADDR2, word2);
1125 } else {
1126 dev->dev_addr[0] = (word2 >> 16) & 0xff;
1127 dev->dev_addr[1] = (word2 >> 24) & 0xff;
1128 dev->dev_addr[2] = (word1 >> 0) & 0xff;
1129 dev->dev_addr[3] = (word1 >> 8) & 0xff;
1130 dev->dev_addr[4] = (word1 >> 16) & 0xff;
1131 dev->dev_addr[5] = (word1 >> 24) & 0xff;
1132 }
1133
1134 if (!is_valid_ether_addr(dev->dev_addr)) {
1135 printk(KERN_ERR
1136 "%s: Invalid MAC address. word1: %08x, word2: %08x\n",
1137 dev->name, word1, word2);
1138 return -EINVAL;
1139 }
1140
1141 return 0;
1142 }
1143
1144 static int tsi108_set_mac(struct net_device *dev, void *addr)
1145 {
1146 struct tsi108_prv_data *data = netdev_priv(dev);
1147 u32 word1, word2;
1148 int i;
1149
1150 if (!is_valid_ether_addr(addr))
1151 return -EINVAL;
1152
1153 for (i = 0; i < 6; i++)
1154 /* +2 is for the offset of the HW addr type */
1155 dev->dev_addr[i] = ((unsigned char *)addr)[i + 2];
1156
1157 word2 = (dev->dev_addr[0] << 16) | (dev->dev_addr[1] << 24);
1158
1159 word1 = (dev->dev_addr[2] << 0) | (dev->dev_addr[3] << 8) |
1160 (dev->dev_addr[4] << 16) | (dev->dev_addr[5] << 24);
1161
1162 spin_lock_irq(&data->misclock);
1163 TSI_WRITE(TSI108_MAC_ADDR1, word1);
1164 TSI_WRITE(TSI108_MAC_ADDR2, word2);
1165 spin_lock(&data->txlock);
1166
1167 if (data->txfree && data->link_up)
1168 netif_wake_queue(dev);
1169
1170 spin_unlock(&data->txlock);
1171 spin_unlock_irq(&data->misclock);
1172 return 0;
1173 }
1174
1175 /* Protected by dev->xmit_lock. */
1176 static void tsi108_set_rx_mode(struct net_device *dev)
1177 {
1178 struct tsi108_prv_data *data = netdev_priv(dev);
1179 u32 rxcfg = TSI_READ(TSI108_EC_RXCFG);
1180
1181 if (dev->flags & IFF_PROMISC) {
1182 rxcfg &= ~(TSI108_EC_RXCFG_UC_HASH | TSI108_EC_RXCFG_MC_HASH);
1183 rxcfg |= TSI108_EC_RXCFG_UFE | TSI108_EC_RXCFG_MFE;
1184 goto out;
1185 }
1186
1187 rxcfg &= ~(TSI108_EC_RXCFG_UFE | TSI108_EC_RXCFG_MFE);
1188
1189 if (dev->flags & IFF_ALLMULTI || !netdev_mc_empty(dev)) {
1190 int i;
1191 struct netdev_hw_addr *ha;
1192 rxcfg |= TSI108_EC_RXCFG_MFE | TSI108_EC_RXCFG_MC_HASH;
1193
1194 memset(data->mc_hash, 0, sizeof(data->mc_hash));
1195
1196 netdev_for_each_mc_addr(ha, dev) {
1197 u32 hash, crc;
1198
1199 crc = ether_crc(6, ha->addr);
1200 hash = crc >> 23;
1201 __set_bit(hash, &data->mc_hash[0]);
1202 }
1203
1204 TSI_WRITE(TSI108_EC_HASHADDR,
1205 TSI108_EC_HASHADDR_AUTOINC |
1206 TSI108_EC_HASHADDR_MCAST);
1207
1208 for (i = 0; i < 16; i++) {
1209 /* The manual says that the hardware may drop
1210 * back-to-back writes to the data register.
1211 */
1212 udelay(1);
1213 TSI_WRITE(TSI108_EC_HASHDATA,
1214 data->mc_hash[i]);
1215 }
1216 }
1217
1218 out:
1219 TSI_WRITE(TSI108_EC_RXCFG, rxcfg);
1220 }
1221
1222 static void tsi108_init_phy(struct net_device *dev)
1223 {
1224 struct tsi108_prv_data *data = netdev_priv(dev);
1225 u32 i = 0;
1226 u16 phyval = 0;
1227 unsigned long flags;
1228
1229 spin_lock_irqsave(&phy_lock, flags);
1230
1231 tsi108_write_mii(data, MII_BMCR, BMCR_RESET);
1232 while (--i) {
1233 if(!(tsi108_read_mii(data, MII_BMCR) & BMCR_RESET))
1234 break;
1235 udelay(10);
1236 }
1237 if (i == 0)
1238 printk(KERN_ERR "%s function time out\n", __func__);
1239
1240 if (data->phy_type == TSI108_PHY_BCM54XX) {
1241 tsi108_write_mii(data, 0x09, 0x0300);
1242 tsi108_write_mii(data, 0x10, 0x1020);
1243 tsi108_write_mii(data, 0x1c, 0x8c00);
1244 }
1245
1246 tsi108_write_mii(data,
1247 MII_BMCR,
1248 BMCR_ANENABLE | BMCR_ANRESTART);
1249 while (tsi108_read_mii(data, MII_BMCR) & BMCR_ANRESTART)
1250 cpu_relax();
1251
1252 /* Set G/MII mode and receive clock select in TBI control #2. The
1253 * second port won't work if this isn't done, even though we don't
1254 * use TBI mode.
1255 */
1256
1257 tsi108_write_tbi(data, 0x11, 0x30);
1258
1259 /* FIXME: It seems to take more than 2 back-to-back reads to the
1260 * PHY_STAT register before the link up status bit is set.
1261 */
1262
1263 data->link_up = 0;
1264
1265 while (!((phyval = tsi108_read_mii(data, MII_BMSR)) &
1266 BMSR_LSTATUS)) {
1267 if (i++ > (MII_READ_DELAY / 10)) {
1268 break;
1269 }
1270 spin_unlock_irqrestore(&phy_lock, flags);
1271 msleep(10);
1272 spin_lock_irqsave(&phy_lock, flags);
1273 }
1274
1275 data->mii_if.supports_gmii = mii_check_gmii_support(&data->mii_if);
1276 printk(KERN_DEBUG "PHY_STAT reg contains %08x\n", phyval);
1277 data->phy_ok = 1;
1278 data->init_media = 1;
1279 spin_unlock_irqrestore(&phy_lock, flags);
1280 }
1281
1282 static void tsi108_kill_phy(struct net_device *dev)
1283 {
1284 struct tsi108_prv_data *data = netdev_priv(dev);
1285 unsigned long flags;
1286
1287 spin_lock_irqsave(&phy_lock, flags);
1288 tsi108_write_mii(data, MII_BMCR, BMCR_PDOWN);
1289 data->phy_ok = 0;
1290 spin_unlock_irqrestore(&phy_lock, flags);
1291 }
1292
1293 static int tsi108_open(struct net_device *dev)
1294 {
1295 int i;
1296 struct tsi108_prv_data *data = netdev_priv(dev);
1297 unsigned int rxring_size = TSI108_RXRING_LEN * sizeof(rx_desc);
1298 unsigned int txring_size = TSI108_TXRING_LEN * sizeof(tx_desc);
1299
1300 i = request_irq(data->irq_num, tsi108_irq, 0, dev->name, dev);
1301 if (i != 0) {
1302 printk(KERN_ERR "tsi108_eth%d: Could not allocate IRQ%d.\n",
1303 data->id, data->irq_num);
1304 return i;
1305 } else {
1306 dev->irq = data->irq_num;
1307 printk(KERN_NOTICE
1308 "tsi108_open : Port %d Assigned IRQ %d to %s\n",
1309 data->id, dev->irq, dev->name);
1310 }
1311
1312 data->rxring = dma_alloc_coherent(NULL, rxring_size,
1313 &data->rxdma, GFP_KERNEL);
1314
1315 if (!data->rxring) {
1316 printk(KERN_DEBUG
1317 "TSI108_ETH: failed to allocate memory for rxring!\n");
1318 return -ENOMEM;
1319 } else {
1320 memset(data->rxring, 0, rxring_size);
1321 }
1322
1323 data->txring = dma_alloc_coherent(NULL, txring_size,
1324 &data->txdma, GFP_KERNEL);
1325
1326 if (!data->txring) {
1327 printk(KERN_DEBUG
1328 "TSI108_ETH: failed to allocate memory for txring!\n");
1329 pci_free_consistent(0, rxring_size, data->rxring, data->rxdma);
1330 return -ENOMEM;
1331 } else {
1332 memset(data->txring, 0, txring_size);
1333 }
1334
1335 for (i = 0; i < TSI108_RXRING_LEN; i++) {
1336 data->rxring[i].next0 = data->rxdma + (i + 1) * sizeof(rx_desc);
1337 data->rxring[i].blen = TSI108_RXBUF_SIZE;
1338 data->rxring[i].vlan = 0;
1339 }
1340
1341 data->rxring[TSI108_RXRING_LEN - 1].next0 = data->rxdma;
1342
1343 data->rxtail = 0;
1344 data->rxhead = 0;
1345
1346 for (i = 0; i < TSI108_RXRING_LEN; i++) {
1347 struct sk_buff *skb;
1348
1349 skb = netdev_alloc_skb_ip_align(dev, TSI108_RXBUF_SIZE);
1350 if (!skb) {
1351 /* Bah. No memory for now, but maybe we'll get
1352 * some more later.
1353 * For now, we'll live with the smaller ring.
1354 */
1355 printk(KERN_WARNING
1356 "%s: Could only allocate %d receive skb(s).\n",
1357 dev->name, i);
1358 data->rxhead = i;
1359 break;
1360 }
1361
1362 data->rxskbs[i] = skb;
1363 data->rxskbs[i] = skb;
1364 data->rxring[i].buf0 = virt_to_phys(data->rxskbs[i]->data);
1365 data->rxring[i].misc = TSI108_RX_OWN | TSI108_RX_INT;
1366 }
1367
1368 data->rxfree = i;
1369 TSI_WRITE(TSI108_EC_RXQ_PTRLOW, data->rxdma);
1370
1371 for (i = 0; i < TSI108_TXRING_LEN; i++) {
1372 data->txring[i].next0 = data->txdma + (i + 1) * sizeof(tx_desc);
1373 data->txring[i].misc = 0;
1374 }
1375
1376 data->txring[TSI108_TXRING_LEN - 1].next0 = data->txdma;
1377 data->txtail = 0;
1378 data->txhead = 0;
1379 data->txfree = TSI108_TXRING_LEN;
1380 TSI_WRITE(TSI108_EC_TXQ_PTRLOW, data->txdma);
1381 tsi108_init_phy(dev);
1382
1383 napi_enable(&data->napi);
1384
1385 setup_timer(&data->timer, tsi108_timed_checker, (unsigned long)dev);
1386 mod_timer(&data->timer, jiffies + 1);
1387
1388 tsi108_restart_rx(data, dev);
1389
1390 TSI_WRITE(TSI108_EC_INTSTAT, ~0);
1391
1392 TSI_WRITE(TSI108_EC_INTMASK,
1393 ~(TSI108_INT_TXQUEUE0 | TSI108_INT_RXERROR |
1394 TSI108_INT_RXTHRESH | TSI108_INT_RXQUEUE0 |
1395 TSI108_INT_RXOVERRUN | TSI108_INT_RXWAIT |
1396 TSI108_INT_SFN | TSI108_INT_STATCARRY));
1397
1398 TSI_WRITE(TSI108_MAC_CFG1,
1399 TSI108_MAC_CFG1_RXEN | TSI108_MAC_CFG1_TXEN);
1400 netif_start_queue(dev);
1401 return 0;
1402 }
1403
1404 static int tsi108_close(struct net_device *dev)
1405 {
1406 struct tsi108_prv_data *data = netdev_priv(dev);
1407
1408 netif_stop_queue(dev);
1409 napi_disable(&data->napi);
1410
1411 del_timer_sync(&data->timer);
1412
1413 tsi108_stop_ethernet(dev);
1414 tsi108_kill_phy(dev);
1415 TSI_WRITE(TSI108_EC_INTMASK, ~0);
1416 TSI_WRITE(TSI108_MAC_CFG1, 0);
1417
1418 /* Check for any pending TX packets, and drop them. */
1419
1420 while (!data->txfree || data->txhead != data->txtail) {
1421 int tx = data->txtail;
1422 struct sk_buff *skb;
1423 skb = data->txskbs[tx];
1424 data->txtail = (data->txtail + 1) % TSI108_TXRING_LEN;
1425 data->txfree++;
1426 dev_kfree_skb(skb);
1427 }
1428
1429 free_irq(data->irq_num, dev);
1430
1431 /* Discard the RX ring. */
1432
1433 while (data->rxfree) {
1434 int rx = data->rxtail;
1435 struct sk_buff *skb;
1436
1437 skb = data->rxskbs[rx];
1438 data->rxtail = (data->rxtail + 1) % TSI108_RXRING_LEN;
1439 data->rxfree--;
1440 dev_kfree_skb(skb);
1441 }
1442
1443 dma_free_coherent(0,
1444 TSI108_RXRING_LEN * sizeof(rx_desc),
1445 data->rxring, data->rxdma);
1446 dma_free_coherent(0,
1447 TSI108_TXRING_LEN * sizeof(tx_desc),
1448 data->txring, data->txdma);
1449
1450 return 0;
1451 }
1452
1453 static void tsi108_init_mac(struct net_device *dev)
1454 {
1455 struct tsi108_prv_data *data = netdev_priv(dev);
1456
1457 TSI_WRITE(TSI108_MAC_CFG2, TSI108_MAC_CFG2_DFLT_PREAMBLE |
1458 TSI108_MAC_CFG2_PADCRC);
1459
1460 TSI_WRITE(TSI108_EC_TXTHRESH,
1461 (192 << TSI108_EC_TXTHRESH_STARTFILL) |
1462 (192 << TSI108_EC_TXTHRESH_STOPFILL));
1463
1464 TSI_WRITE(TSI108_STAT_CARRYMASK1,
1465 ~(TSI108_STAT_CARRY1_RXBYTES |
1466 TSI108_STAT_CARRY1_RXPKTS |
1467 TSI108_STAT_CARRY1_RXFCS |
1468 TSI108_STAT_CARRY1_RXMCAST |
1469 TSI108_STAT_CARRY1_RXALIGN |
1470 TSI108_STAT_CARRY1_RXLENGTH |
1471 TSI108_STAT_CARRY1_RXRUNT |
1472 TSI108_STAT_CARRY1_RXJUMBO |
1473 TSI108_STAT_CARRY1_RXFRAG |
1474 TSI108_STAT_CARRY1_RXJABBER |
1475 TSI108_STAT_CARRY1_RXDROP));
1476
1477 TSI_WRITE(TSI108_STAT_CARRYMASK2,
1478 ~(TSI108_STAT_CARRY2_TXBYTES |
1479 TSI108_STAT_CARRY2_TXPKTS |
1480 TSI108_STAT_CARRY2_TXEXDEF |
1481 TSI108_STAT_CARRY2_TXEXCOL |
1482 TSI108_STAT_CARRY2_TXTCOL |
1483 TSI108_STAT_CARRY2_TXPAUSE));
1484
1485 TSI_WRITE(TSI108_EC_PORTCTRL, TSI108_EC_PORTCTRL_STATEN);
1486 TSI_WRITE(TSI108_MAC_CFG1, 0);
1487
1488 TSI_WRITE(TSI108_EC_RXCFG,
1489 TSI108_EC_RXCFG_SE | TSI108_EC_RXCFG_BFE);
1490
1491 TSI_WRITE(TSI108_EC_TXQ_CFG, TSI108_EC_TXQ_CFG_DESC_INT |
1492 TSI108_EC_TXQ_CFG_EOQ_OWN_INT |
1493 TSI108_EC_TXQ_CFG_WSWP | (TSI108_PBM_PORT <<
1494 TSI108_EC_TXQ_CFG_SFNPORT));
1495
1496 TSI_WRITE(TSI108_EC_RXQ_CFG, TSI108_EC_RXQ_CFG_DESC_INT |
1497 TSI108_EC_RXQ_CFG_EOQ_OWN_INT |
1498 TSI108_EC_RXQ_CFG_WSWP | (TSI108_PBM_PORT <<
1499 TSI108_EC_RXQ_CFG_SFNPORT));
1500
1501 TSI_WRITE(TSI108_EC_TXQ_BUFCFG,
1502 TSI108_EC_TXQ_BUFCFG_BURST256 |
1503 TSI108_EC_TXQ_BUFCFG_BSWP | (TSI108_PBM_PORT <<
1504 TSI108_EC_TXQ_BUFCFG_SFNPORT));
1505
1506 TSI_WRITE(TSI108_EC_RXQ_BUFCFG,
1507 TSI108_EC_RXQ_BUFCFG_BURST256 |
1508 TSI108_EC_RXQ_BUFCFG_BSWP | (TSI108_PBM_PORT <<
1509 TSI108_EC_RXQ_BUFCFG_SFNPORT));
1510
1511 TSI_WRITE(TSI108_EC_INTMASK, ~0);
1512 }
1513
1514 static int tsi108_get_settings(struct net_device *dev, struct ethtool_cmd *cmd)
1515 {
1516 struct tsi108_prv_data *data = netdev_priv(dev);
1517 unsigned long flags;
1518 int rc;
1519
1520 spin_lock_irqsave(&data->txlock, flags);
1521 rc = mii_ethtool_gset(&data->mii_if, cmd);
1522 spin_unlock_irqrestore(&data->txlock, flags);
1523
1524 return rc;
1525 }
1526
1527 static int tsi108_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
1528 {
1529 struct tsi108_prv_data *data = netdev_priv(dev);
1530 unsigned long flags;
1531 int rc;
1532
1533 spin_lock_irqsave(&data->txlock, flags);
1534 rc = mii_ethtool_sset(&data->mii_if, cmd);
1535 spin_unlock_irqrestore(&data->txlock, flags);
1536
1537 return rc;
1538 }
1539
1540 static int tsi108_do_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
1541 {
1542 struct tsi108_prv_data *data = netdev_priv(dev);
1543 if (!netif_running(dev))
1544 return -EINVAL;
1545 return generic_mii_ioctl(&data->mii_if, if_mii(rq), cmd, NULL);
1546 }
1547
1548 static const struct ethtool_ops tsi108_ethtool_ops = {
1549 .get_link = ethtool_op_get_link,
1550 .get_settings = tsi108_get_settings,
1551 .set_settings = tsi108_set_settings,
1552 };
1553
1554 static const struct net_device_ops tsi108_netdev_ops = {
1555 .ndo_open = tsi108_open,
1556 .ndo_stop = tsi108_close,
1557 .ndo_start_xmit = tsi108_send_packet,
1558 .ndo_set_rx_mode = tsi108_set_rx_mode,
1559 .ndo_get_stats = tsi108_get_stats,
1560 .ndo_do_ioctl = tsi108_do_ioctl,
1561 .ndo_set_mac_address = tsi108_set_mac,
1562 .ndo_validate_addr = eth_validate_addr,
1563 .ndo_change_mtu = eth_change_mtu,
1564 };
1565
1566 static int
1567 tsi108_init_one(struct platform_device *pdev)
1568 {
1569 struct net_device *dev = NULL;
1570 struct tsi108_prv_data *data = NULL;
1571 hw_info *einfo;
1572 int err = 0;
1573
1574 einfo = pdev->dev.platform_data;
1575
1576 if (NULL == einfo) {
1577 printk(KERN_ERR "tsi-eth %d: Missing additional data!\n",
1578 pdev->id);
1579 return -ENODEV;
1580 }
1581
1582 /* Create an ethernet device instance */
1583
1584 dev = alloc_etherdev(sizeof(struct tsi108_prv_data));
1585 if (!dev) {
1586 printk("tsi108_eth: Could not allocate a device structure\n");
1587 return -ENOMEM;
1588 }
1589
1590 printk("tsi108_eth%d: probe...\n", pdev->id);
1591 data = netdev_priv(dev);
1592 data->dev = dev;
1593
1594 pr_debug("tsi108_eth%d:regs:phyresgs:phy:irq_num=0x%x:0x%x:0x%x:0x%x\n",
1595 pdev->id, einfo->regs, einfo->phyregs,
1596 einfo->phy, einfo->irq_num);
1597
1598 data->regs = ioremap(einfo->regs, 0x400);
1599 if (NULL == data->regs) {
1600 err = -ENOMEM;
1601 goto regs_fail;
1602 }
1603
1604 data->phyregs = ioremap(einfo->phyregs, 0x400);
1605 if (NULL == data->phyregs) {
1606 err = -ENOMEM;
1607 goto phyregs_fail;
1608 }
1609 /* MII setup */
1610 data->mii_if.dev = dev;
1611 data->mii_if.mdio_read = tsi108_mdio_read;
1612 data->mii_if.mdio_write = tsi108_mdio_write;
1613 data->mii_if.phy_id = einfo->phy;
1614 data->mii_if.phy_id_mask = 0x1f;
1615 data->mii_if.reg_num_mask = 0x1f;
1616
1617 data->phy = einfo->phy;
1618 data->phy_type = einfo->phy_type;
1619 data->irq_num = einfo->irq_num;
1620 data->id = pdev->id;
1621 netif_napi_add(dev, &data->napi, tsi108_poll, 64);
1622 dev->netdev_ops = &tsi108_netdev_ops;
1623 dev->ethtool_ops = &tsi108_ethtool_ops;
1624
1625 /* Apparently, the Linux networking code won't use scatter-gather
1626 * if the hardware doesn't do checksums. However, it's faster
1627 * to checksum in place and use SG, as (among other reasons)
1628 * the cache won't be dirtied (which then has to be flushed
1629 * before DMA). The checksumming is done by the driver (via
1630 * a new function skb_csum_dev() in net/core/skbuff.c).
1631 */
1632
1633 dev->features = NETIF_F_HIGHDMA;
1634
1635 spin_lock_init(&data->txlock);
1636 spin_lock_init(&data->misclock);
1637
1638 tsi108_reset_ether(data);
1639 tsi108_kill_phy(dev);
1640
1641 if ((err = tsi108_get_mac(dev)) != 0) {
1642 printk(KERN_ERR "%s: Invalid MAC address. Please correct.\n",
1643 dev->name);
1644 goto register_fail;
1645 }
1646
1647 tsi108_init_mac(dev);
1648 err = register_netdev(dev);
1649 if (err) {
1650 printk(KERN_ERR "%s: Cannot register net device, aborting.\n",
1651 dev->name);
1652 goto register_fail;
1653 }
1654
1655 platform_set_drvdata(pdev, dev);
1656 printk(KERN_INFO "%s: Tsi108 Gigabit Ethernet, MAC: %pM\n",
1657 dev->name, dev->dev_addr);
1658 #ifdef DEBUG
1659 data->msg_enable = DEBUG;
1660 dump_eth_one(dev);
1661 #endif
1662
1663 return 0;
1664
1665 register_fail:
1666 iounmap(data->phyregs);
1667
1668 phyregs_fail:
1669 iounmap(data->regs);
1670
1671 regs_fail:
1672 free_netdev(dev);
1673 return err;
1674 }
1675
1676 /* There's no way to either get interrupts from the PHY when
1677 * something changes, or to have the Tsi108 automatically communicate
1678 * with the PHY to reconfigure itself.
1679 *
1680 * Thus, we have to do it using a timer.
1681 */
1682
1683 static void tsi108_timed_checker(unsigned long dev_ptr)
1684 {
1685 struct net_device *dev = (struct net_device *)dev_ptr;
1686 struct tsi108_prv_data *data = netdev_priv(dev);
1687
1688 tsi108_check_phy(dev);
1689 tsi108_check_rxring(dev);
1690 mod_timer(&data->timer, jiffies + CHECK_PHY_INTERVAL);
1691 }
1692
1693 static int tsi108_ether_remove(struct platform_device *pdev)
1694 {
1695 struct net_device *dev = platform_get_drvdata(pdev);
1696 struct tsi108_prv_data *priv = netdev_priv(dev);
1697
1698 unregister_netdev(dev);
1699 tsi108_stop_ethernet(dev);
1700 platform_set_drvdata(pdev, NULL);
1701 iounmap(priv->regs);
1702 iounmap(priv->phyregs);
1703 free_netdev(dev);
1704
1705 return 0;
1706 }
1707 module_platform_driver(tsi_eth_driver);
1708
1709 MODULE_AUTHOR("Tundra Semiconductor Corporation");
1710 MODULE_DESCRIPTION("Tsi108 Gigabit Ethernet driver");
1711 MODULE_LICENSE("GPL");
1712 MODULE_ALIAS("platform:tsi-ethernet");