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spi-topcliff-pch: supports a spi mode setup and bit order setup by IO control
[zen-stable.git] / drivers / net / wireless / brcm80211 / brcmsmac / rate.c
blob0a0c0ad4f96fb4a3d547b62b98ff0fa8c35c2b0c
1 /*
2 * Copyright (c) 2010 Broadcom Corporation
3 *
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
7 *
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
11 * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
13 * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
14 * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15 */
16
17 #include <brcmu_wifi.h>
18 #include <brcmu_utils.h>
19
20 #include "d11.h"
21 #include "pub.h"
22 #include "rate.h"
23
24 /*
25 * Rate info per rate: It tells whether a rate is ofdm or not and its phy_rate
26 * value
27 */
28 const u8 rate_info[BRCM_MAXRATE + 1] = {
29 /* 0 1 2 3 4 5 6 7 8 9 */
30 /* 0 */ 0x00, 0x00, 0x0a, 0x00, 0x14, 0x00, 0x00, 0x00, 0x00, 0x00,
31 /* 10 */ 0x00, 0x37, 0x8b, 0x00, 0x00, 0x00, 0x00, 0x00, 0x8f, 0x00,
32 /* 20 */ 0x00, 0x00, 0x6e, 0x00, 0x8a, 0x00, 0x00, 0x00, 0x00, 0x00,
33 /* 30 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x8e, 0x00, 0x00, 0x00,
34 /* 40 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x89, 0x00,
35 /* 50 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
36 /* 60 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
37 /* 70 */ 0x00, 0x00, 0x8d, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
38 /* 80 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
39 /* 90 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x88, 0x00, 0x00, 0x00,
40 /* 100 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x8c
41 };
42
43 /* rates are in units of Kbps */
44 const struct brcms_mcs_info mcs_table[MCS_TABLE_SIZE] = {
45 /* MCS 0: SS 1, MOD: BPSK, CR 1/2 */
46 {6500, 13500, CEIL(6500 * 10, 9), CEIL(13500 * 10, 9), 0x00,
47 BRCM_RATE_6M},
48 /* MCS 1: SS 1, MOD: QPSK, CR 1/2 */
49 {13000, 27000, CEIL(13000 * 10, 9), CEIL(27000 * 10, 9), 0x08,
50 BRCM_RATE_12M},
51 /* MCS 2: SS 1, MOD: QPSK, CR 3/4 */
52 {19500, 40500, CEIL(19500 * 10, 9), CEIL(40500 * 10, 9), 0x0A,
53 BRCM_RATE_18M},
54 /* MCS 3: SS 1, MOD: 16QAM, CR 1/2 */
55 {26000, 54000, CEIL(26000 * 10, 9), CEIL(54000 * 10, 9), 0x10,
56 BRCM_RATE_24M},
57 /* MCS 4: SS 1, MOD: 16QAM, CR 3/4 */
58 {39000, 81000, CEIL(39000 * 10, 9), CEIL(81000 * 10, 9), 0x12,
59 BRCM_RATE_36M},
60 /* MCS 5: SS 1, MOD: 64QAM, CR 2/3 */
61 {52000, 108000, CEIL(52000 * 10, 9), CEIL(108000 * 10, 9), 0x19,
62 BRCM_RATE_48M},
63 /* MCS 6: SS 1, MOD: 64QAM, CR 3/4 */
64 {58500, 121500, CEIL(58500 * 10, 9), CEIL(121500 * 10, 9), 0x1A,
65 BRCM_RATE_54M},
66 /* MCS 7: SS 1, MOD: 64QAM, CR 5/6 */
67 {65000, 135000, CEIL(65000 * 10, 9), CEIL(135000 * 10, 9), 0x1C,
68 BRCM_RATE_54M},
69 /* MCS 8: SS 2, MOD: BPSK, CR 1/2 */
70 {13000, 27000, CEIL(13000 * 10, 9), CEIL(27000 * 10, 9), 0x40,
71 BRCM_RATE_6M},
72 /* MCS 9: SS 2, MOD: QPSK, CR 1/2 */
73 {26000, 54000, CEIL(26000 * 10, 9), CEIL(54000 * 10, 9), 0x48,
74 BRCM_RATE_12M},
75 /* MCS 10: SS 2, MOD: QPSK, CR 3/4 */
76 {39000, 81000, CEIL(39000 * 10, 9), CEIL(81000 * 10, 9), 0x4A,
77 BRCM_RATE_18M},
78 /* MCS 11: SS 2, MOD: 16QAM, CR 1/2 */
79 {52000, 108000, CEIL(52000 * 10, 9), CEIL(108000 * 10, 9), 0x50,
80 BRCM_RATE_24M},
81 /* MCS 12: SS 2, MOD: 16QAM, CR 3/4 */
82 {78000, 162000, CEIL(78000 * 10, 9), CEIL(162000 * 10, 9), 0x52,
83 BRCM_RATE_36M},
84 /* MCS 13: SS 2, MOD: 64QAM, CR 2/3 */
85 {104000, 216000, CEIL(104000 * 10, 9), CEIL(216000 * 10, 9), 0x59,
86 BRCM_RATE_48M},
87 /* MCS 14: SS 2, MOD: 64QAM, CR 3/4 */
88 {117000, 243000, CEIL(117000 * 10, 9), CEIL(243000 * 10, 9), 0x5A,
89 BRCM_RATE_54M},
90 /* MCS 15: SS 2, MOD: 64QAM, CR 5/6 */
91 {130000, 270000, CEIL(130000 * 10, 9), CEIL(270000 * 10, 9), 0x5C,
92 BRCM_RATE_54M},
93 /* MCS 16: SS 3, MOD: BPSK, CR 1/2 */
94 {19500, 40500, CEIL(19500 * 10, 9), CEIL(40500 * 10, 9), 0x80,
95 BRCM_RATE_6M},
96 /* MCS 17: SS 3, MOD: QPSK, CR 1/2 */
97 {39000, 81000, CEIL(39000 * 10, 9), CEIL(81000 * 10, 9), 0x88,
98 BRCM_RATE_12M},
99 /* MCS 18: SS 3, MOD: QPSK, CR 3/4 */
100 {58500, 121500, CEIL(58500 * 10, 9), CEIL(121500 * 10, 9), 0x8A,
101 BRCM_RATE_18M},
102 /* MCS 19: SS 3, MOD: 16QAM, CR 1/2 */
103 {78000, 162000, CEIL(78000 * 10, 9), CEIL(162000 * 10, 9), 0x90,
104 BRCM_RATE_24M},
105 /* MCS 20: SS 3, MOD: 16QAM, CR 3/4 */
106 {117000, 243000, CEIL(117000 * 10, 9), CEIL(243000 * 10, 9), 0x92,
107 BRCM_RATE_36M},
108 /* MCS 21: SS 3, MOD: 64QAM, CR 2/3 */
109 {156000, 324000, CEIL(156000 * 10, 9), CEIL(324000 * 10, 9), 0x99,
110 BRCM_RATE_48M},
111 /* MCS 22: SS 3, MOD: 64QAM, CR 3/4 */
112 {175500, 364500, CEIL(175500 * 10, 9), CEIL(364500 * 10, 9), 0x9A,
113 BRCM_RATE_54M},
114 /* MCS 23: SS 3, MOD: 64QAM, CR 5/6 */
115 {195000, 405000, CEIL(195000 * 10, 9), CEIL(405000 * 10, 9), 0x9B,
116 BRCM_RATE_54M},
117 /* MCS 24: SS 4, MOD: BPSK, CR 1/2 */
118 {26000, 54000, CEIL(26000 * 10, 9), CEIL(54000 * 10, 9), 0xC0,
119 BRCM_RATE_6M},
120 /* MCS 25: SS 4, MOD: QPSK, CR 1/2 */
121 {52000, 108000, CEIL(52000 * 10, 9), CEIL(108000 * 10, 9), 0xC8,
122 BRCM_RATE_12M},
123 /* MCS 26: SS 4, MOD: QPSK, CR 3/4 */
124 {78000, 162000, CEIL(78000 * 10, 9), CEIL(162000 * 10, 9), 0xCA,
125 BRCM_RATE_18M},
126 /* MCS 27: SS 4, MOD: 16QAM, CR 1/2 */
127 {104000, 216000, CEIL(104000 * 10, 9), CEIL(216000 * 10, 9), 0xD0,
128 BRCM_RATE_24M},
129 /* MCS 28: SS 4, MOD: 16QAM, CR 3/4 */
130 {156000, 324000, CEIL(156000 * 10, 9), CEIL(324000 * 10, 9), 0xD2,
131 BRCM_RATE_36M},
132 /* MCS 29: SS 4, MOD: 64QAM, CR 2/3 */
133 {208000, 432000, CEIL(208000 * 10, 9), CEIL(432000 * 10, 9), 0xD9,
134 BRCM_RATE_48M},
135 /* MCS 30: SS 4, MOD: 64QAM, CR 3/4 */
136 {234000, 486000, CEIL(234000 * 10, 9), CEIL(486000 * 10, 9), 0xDA,
137 BRCM_RATE_54M},
138 /* MCS 31: SS 4, MOD: 64QAM, CR 5/6 */
139 {260000, 540000, CEIL(260000 * 10, 9), CEIL(540000 * 10, 9), 0xDB,
140 BRCM_RATE_54M},
141 /* MCS 32: SS 1, MOD: BPSK, CR 1/2 */
142 {0, 6000, 0, CEIL(6000 * 10, 9), 0x00, BRCM_RATE_6M},
143 };
144
145 /*
146 * phycfg for legacy OFDM frames: code rate, modulation scheme, spatial streams
147 * Number of spatial streams: always 1 other fields: refer to table 78 of
148 * section 17.3.2.2 of the original .11a standard
149 */
150 struct legacy_phycfg {
151 u32 rate_ofdm; /* ofdm mac rate */
152 /* phy ctl byte 3, code rate, modulation type, # of streams */
153 u8 tx_phy_ctl3;
154 };
155
156 /* Number of legacy_rate_cfg entries in the table */
157 #define LEGACY_PHYCFG_TABLE_SIZE 12
158
159 /*
160 * In CCK mode LPPHY overloads OFDM Modulation bits with CCK Data Rate
161 * Eventually MIMOPHY would also be converted to this format
162 * 0 = 1Mbps; 1 = 2Mbps; 2 = 5.5Mbps; 3 = 11Mbps
163 */
164 static const struct
165 legacy_phycfg legacy_phycfg_table[LEGACY_PHYCFG_TABLE_SIZE] = {
166 {BRCM_RATE_1M, 0x00}, /* CCK 1Mbps, data rate 0 */
167 {BRCM_RATE_2M, 0x08}, /* CCK 2Mbps, data rate 1 */
168 {BRCM_RATE_5M5, 0x10}, /* CCK 5.5Mbps, data rate 2 */
169 {BRCM_RATE_11M, 0x18}, /* CCK 11Mbps, data rate 3 */
170 /* OFDM 6Mbps, code rate 1/2, BPSK, 1 spatial stream */
171 {BRCM_RATE_6M, 0x00},
172 /* OFDM 9Mbps, code rate 3/4, BPSK, 1 spatial stream */
173 {BRCM_RATE_9M, 0x02},
174 /* OFDM 12Mbps, code rate 1/2, QPSK, 1 spatial stream */
175 {BRCM_RATE_12M, 0x08},
176 /* OFDM 18Mbps, code rate 3/4, QPSK, 1 spatial stream */
177 {BRCM_RATE_18M, 0x0A},
178 /* OFDM 24Mbps, code rate 1/2, 16-QAM, 1 spatial stream */
179 {BRCM_RATE_24M, 0x10},
180 /* OFDM 36Mbps, code rate 3/4, 16-QAM, 1 spatial stream */
181 {BRCM_RATE_36M, 0x12},
182 /* OFDM 48Mbps, code rate 2/3, 64-QAM, 1 spatial stream */
183 {BRCM_RATE_48M, 0x19},
184 /* OFDM 54Mbps, code rate 3/4, 64-QAM, 1 spatial stream */
185 {BRCM_RATE_54M, 0x1A},
186 };
187
188 /* Hardware rates (also encodes default basic rates) */
189
190 const struct brcms_c_rateset cck_ofdm_mimo_rates = {
191 12,
192 /* 1b, 2b, 5.5b, 6, 9, 11b, 12, 18, 24, 36, 48, */
193 { 0x82, 0x84, 0x8b, 0x0c, 0x12, 0x96, 0x18, 0x24, 0x30, 0x48, 0x60,
194 /* 54 Mbps */
195 0x6c},
196 0x00,
197 { 0xff, 0xff, 0xff, 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
198 0x00, 0x00, 0x00, 0x00, 0x00}
199 };
200
201 const struct brcms_c_rateset ofdm_mimo_rates = {
202 8,
203 /* 6b, 9, 12b, 18, 24b, 36, 48, 54 Mbps */
204 { 0x8c, 0x12, 0x98, 0x24, 0xb0, 0x48, 0x60, 0x6c},
205 0x00,
206 { 0xff, 0xff, 0xff, 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
207 0x00, 0x00, 0x00, 0x00, 0x00}
208 };
209
210 /* Default ratesets that include MCS32 for 40BW channels */
211 static const struct brcms_c_rateset cck_ofdm_40bw_mimo_rates = {
212 12,
213 /* 1b, 2b, 5.5b, 6, 9, 11b, 12, 18, 24, 36, 48 */
214 { 0x82, 0x84, 0x8b, 0x0c, 0x12, 0x96, 0x18, 0x24, 0x30, 0x48, 0x60,
215 /* 54 Mbps */
216 0x6c},
217 0x00,
218 { 0xff, 0xff, 0xff, 0xff, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
219 0x00, 0x00, 0x00, 0x00, 0x00}
220 };
221
222 static const struct brcms_c_rateset ofdm_40bw_mimo_rates = {
223 8,
224 /* 6b, 9, 12b, 18, 24b, 36, 48, 54 Mbps */
225 { 0x8c, 0x12, 0x98, 0x24, 0xb0, 0x48, 0x60, 0x6c},
226 0x00,
227 { 0xff, 0xff, 0xff, 0xff, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
228 0x00, 0x00, 0x00, 0x00, 0x00}
229 };
230
231 const struct brcms_c_rateset cck_ofdm_rates = {
232 12,
233 /* 1b, 2b, 5.5b, 6, 9, 11b, 12, 18, 24, 36, 48,*/
234 { 0x82, 0x84, 0x8b, 0x0c, 0x12, 0x96, 0x18, 0x24, 0x30, 0x48, 0x60,
235 /*54 Mbps */
236 0x6c},
237 0x00,
238 { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
239 0x00, 0x00, 0x00, 0x00, 0x00}
240 };
241
242 const struct brcms_c_rateset gphy_legacy_rates = {
243 4,
244 /* 1b, 2b, 5.5b, 11b Mbps */
245 { 0x82, 0x84, 0x8b, 0x96},
246 0x00,
247 { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
248 0x00, 0x00, 0x00, 0x00, 0x00}
249 };
250
251 const struct brcms_c_rateset ofdm_rates = {
252 8,
253 /* 6b, 9, 12b, 18, 24b, 36, 48, 54 Mbps */
254 { 0x8c, 0x12, 0x98, 0x24, 0xb0, 0x48, 0x60, 0x6c},
255 0x00,
256 { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
257 0x00, 0x00, 0x00, 0x00, 0x00}
258 };
259
260 const struct brcms_c_rateset cck_rates = {
261 4,
262 /* 1b, 2b, 5.5, 11 Mbps */
263 { 0x82, 0x84, 0x0b, 0x16},
264 0x00,
265 { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
266 0x00, 0x00, 0x00, 0x00, 0x00}
267 };
268
269 /* check if rateset is valid.
270 * if check_brate is true, rateset without a basic rate is considered NOT valid.
271 */
272 static bool brcms_c_rateset_valid(struct brcms_c_rateset *rs, bool check_brate)
273 {
274 uint idx;
275
276 if (!rs->count)
277 return false;
278
279 if (!check_brate)
280 return true;
281
282 /* error if no basic rates */
283 for (idx = 0; idx < rs->count; idx++) {
284 if (rs->rates[idx] & BRCMS_RATE_FLAG)
285 return true;
286 }
287 return false;
288 }
289
290 void brcms_c_rateset_mcs_upd(struct brcms_c_rateset *rs, u8 txstreams)
291 {
292 int i;
293 for (i = txstreams; i < MAX_STREAMS_SUPPORTED; i++)
294 rs->mcs[i] = 0;
295 }
296
297 /*
298 * filter based on hardware rateset, and sort filtered rateset with basic
299 * bit(s) preserved, and check if resulting rateset is valid.
300 */
301 bool
302 brcms_c_rate_hwrs_filter_sort_validate(struct brcms_c_rateset *rs,
303 const struct brcms_c_rateset *hw_rs,
304 bool check_brate, u8 txstreams)
305 {
306 u8 rateset[BRCM_MAXRATE + 1];
307 u8 r;
308 uint count;
309 uint i;
310
311 memset(rateset, 0, sizeof(rateset));
312 count = rs->count;
313
314 for (i = 0; i < count; i++) {
315 /* mask off "basic rate" bit, BRCMS_RATE_FLAG */
316 r = (int)rs->rates[i] & BRCMS_RATE_MASK;
317 if ((r > BRCM_MAXRATE) || (rate_info[r] == 0))
318 continue;
319 rateset[r] = rs->rates[i]; /* preserve basic bit! */
320 }
321
322 /* fill out the rates in order, looking at only supported rates */
323 count = 0;
324 for (i = 0; i < hw_rs->count; i++) {
325 r = hw_rs->rates[i] & BRCMS_RATE_MASK;
326 if (rateset[r])
327 rs->rates[count++] = rateset[r];
328 }
329
330 rs->count = count;
331
332 /* only set the mcs rate bit if the equivalent hw mcs bit is set */
333 for (i = 0; i < MCSSET_LEN; i++)
334 rs->mcs[i] = (rs->mcs[i] & hw_rs->mcs[i]);
335
336 if (brcms_c_rateset_valid(rs, check_brate))
337 return true;
338 else
339 return false;
340 }
341
342 /* calculate the rate of a rx'd frame and return it as a ratespec */
343 u32 brcms_c_compute_rspec(struct d11rxhdr *rxh, u8 *plcp)
344 {
345 int phy_type;
346 u32 rspec = PHY_TXC1_BW_20MHZ << RSPEC_BW_SHIFT;
347
348 phy_type =
349 ((rxh->RxChan & RXS_CHAN_PHYTYPE_MASK) >> RXS_CHAN_PHYTYPE_SHIFT);
350
351 if ((phy_type == PHY_TYPE_N) || (phy_type == PHY_TYPE_SSN) ||
352 (phy_type == PHY_TYPE_LCN) || (phy_type == PHY_TYPE_HT)) {
353 switch (rxh->PhyRxStatus_0 & PRXS0_FT_MASK) {
354 case PRXS0_CCK:
355 rspec =
356 cck_phy2mac_rate(
357 ((struct cck_phy_hdr *) plcp)->signal);
358 break;
359 case PRXS0_OFDM:
360 rspec =
361 ofdm_phy2mac_rate(
362 ((struct ofdm_phy_hdr *) plcp)->rlpt[0]);
363 break;
364 case PRXS0_PREN:
365 rspec = (plcp[0] & MIMO_PLCP_MCS_MASK) | RSPEC_MIMORATE;
366 if (plcp[0] & MIMO_PLCP_40MHZ) {
367 /* indicate rspec is for 40 MHz mode */
368 rspec &= ~RSPEC_BW_MASK;
369 rspec |= (PHY_TXC1_BW_40MHZ << RSPEC_BW_SHIFT);
370 }
371 break;
372 case PRXS0_STDN:
373 /* fallthru */
374 default:
375 /* not supported, error condition */
376 break;
377 }
378 if (plcp3_issgi(plcp[3]))
379 rspec |= RSPEC_SHORT_GI;
380 } else
381 if ((phy_type == PHY_TYPE_A) || (rxh->PhyRxStatus_0 & PRXS0_OFDM))
382 rspec = ofdm_phy2mac_rate(
383 ((struct ofdm_phy_hdr *) plcp)->rlpt[0]);
384 else
385 rspec = cck_phy2mac_rate(
386 ((struct cck_phy_hdr *) plcp)->signal);
387
388 return rspec;
389 }
390
391 /* copy rateset src to dst as-is (no masking or sorting) */
392 void brcms_c_rateset_copy(const struct brcms_c_rateset *src,
393 struct brcms_c_rateset *dst)
394 {
395 memcpy(dst, src, sizeof(struct brcms_c_rateset));
396 }
397
398 /*
399 * Copy and selectively filter one rateset to another.
400 * 'basic_only' means only copy basic rates.
401 * 'rates' indicates cck (11b) and ofdm rates combinations.
402 * - 0: cck and ofdm
403 * - 1: cck only
404 * - 2: ofdm only
405 * 'xmask' is the copy mask (typically 0x7f or 0xff).
406 */
407 void
408 brcms_c_rateset_filter(struct brcms_c_rateset *src, struct brcms_c_rateset *dst,
409 bool basic_only, u8 rates, uint xmask, bool mcsallow)
410 {
411 uint i;
412 uint r;
413 uint count;
414
415 count = 0;
416 for (i = 0; i < src->count; i++) {
417 r = src->rates[i];
418 if (basic_only && !(r & BRCMS_RATE_FLAG))
419 continue;
420 if (rates == BRCMS_RATES_CCK &&
421 is_ofdm_rate((r & BRCMS_RATE_MASK)))
422 continue;
423 if (rates == BRCMS_RATES_OFDM &&
424 is_cck_rate((r & BRCMS_RATE_MASK)))
425 continue;
426 dst->rates[count++] = r & xmask;
427 }
428 dst->count = count;
429 dst->htphy_membership = src->htphy_membership;
430
431 if (mcsallow && rates != BRCMS_RATES_CCK)
432 memcpy(&dst->mcs[0], &src->mcs[0], MCSSET_LEN);
433 else
434 brcms_c_rateset_mcs_clear(dst);
435 }
436
437 /* select rateset for a given phy_type and bandtype and filter it, sort it
438 * and fill rs_tgt with result
439 */
440 void
441 brcms_c_rateset_default(struct brcms_c_rateset *rs_tgt,
442 const struct brcms_c_rateset *rs_hw,
443 uint phy_type, int bandtype, bool cck_only,
444 uint rate_mask, bool mcsallow, u8 bw, u8 txstreams)
445 {
446 const struct brcms_c_rateset *rs_dflt;
447 struct brcms_c_rateset rs_sel;
448 if ((PHYTYPE_IS(phy_type, PHY_TYPE_HT)) ||
449 (PHYTYPE_IS(phy_type, PHY_TYPE_N)) ||
450 (PHYTYPE_IS(phy_type, PHY_TYPE_LCN)) ||
451 (PHYTYPE_IS(phy_type, PHY_TYPE_SSN))) {
452 if (bandtype == BRCM_BAND_5G)
453 rs_dflt = (bw == BRCMS_20_MHZ ?
454 &ofdm_mimo_rates : &ofdm_40bw_mimo_rates);
455 else
456 rs_dflt = (bw == BRCMS_20_MHZ ?
457 &cck_ofdm_mimo_rates :
458 &cck_ofdm_40bw_mimo_rates);
459 } else if (PHYTYPE_IS(phy_type, PHY_TYPE_LP)) {
460 rs_dflt = (bandtype == BRCM_BAND_5G) ?
461 &ofdm_rates : &cck_ofdm_rates;
462 } else if (PHYTYPE_IS(phy_type, PHY_TYPE_A)) {
463 rs_dflt = &ofdm_rates;
464 } else if (PHYTYPE_IS(phy_type, PHY_TYPE_G)) {
465 rs_dflt = &cck_ofdm_rates;
466 } else {
467 /* should not happen, error condition */
468 rs_dflt = &cck_rates; /* force cck */
469 }
470
471 /* if hw rateset is not supplied, assign selected rateset to it */
472 if (!rs_hw)
473 rs_hw = rs_dflt;
474
475 brcms_c_rateset_copy(rs_dflt, &rs_sel);
476 brcms_c_rateset_mcs_upd(&rs_sel, txstreams);
477 brcms_c_rateset_filter(&rs_sel, rs_tgt, false,
478 cck_only ? BRCMS_RATES_CCK : BRCMS_RATES_CCK_OFDM,
479 rate_mask, mcsallow);
480 brcms_c_rate_hwrs_filter_sort_validate(rs_tgt, rs_hw, false,
481 mcsallow ? txstreams : 1);
482 }
483
484 s16 brcms_c_rate_legacy_phyctl(uint rate)
485 {
486 uint i;
487 for (i = 0; i < LEGACY_PHYCFG_TABLE_SIZE; i++)
488 if (rate == legacy_phycfg_table[i].rate_ofdm)
489 return legacy_phycfg_table[i].tx_phy_ctl3;
490
491 return -1;
492 }
493
494 void brcms_c_rateset_mcs_clear(struct brcms_c_rateset *rateset)
495 {
496 uint i;
497 for (i = 0; i < MCSSET_LEN; i++)
498 rateset->mcs[i] = 0;
499 }
500
501 void brcms_c_rateset_mcs_build(struct brcms_c_rateset *rateset, u8 txstreams)
502 {
503 memcpy(&rateset->mcs[0], &cck_ofdm_mimo_rates.mcs[0], MCSSET_LEN);
504 brcms_c_rateset_mcs_upd(rateset, txstreams);
505 }
506
507 /* Based on bandwidth passed, allow/disallow MCS 32 in the rateset */
508 void brcms_c_rateset_bw_mcs_filter(struct brcms_c_rateset *rateset, u8 bw)
509 {
510 if (bw == BRCMS_40_MHZ)
511 setbit(rateset->mcs, 32);
512 else
513 clrbit(rateset->mcs, 32);
514 }