spi-topcliff-pch: supports a spi mode setup and bit order setup by IO control
[zen-stable.git] / drivers / net / wireless / rt2x00 / rt2x00pci.c
blob17148bb24426727971a91c130931887f7540496e
1 /*
2 Copyright (C) 2004 - 2009 Ivo van Doorn <IvDoorn@gmail.com>
3 <http://rt2x00.serialmonkey.com>
5 This program is free software; you can redistribute it and/or modify
6 it under the terms of the GNU General Public License as published by
7 the Free Software Foundation; either version 2 of the License, or
8 (at your option) any later version.
10 This program is distributed in the hope that it will be useful,
11 but WITHOUT ANY WARRANTY; without even the implied warranty of
12 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 GNU General Public License for more details.
15 You should have received a copy of the GNU General Public License
16 along with this program; if not, write to the
17 Free Software Foundation, Inc.,
18 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
22 Module: rt2x00pci
23 Abstract: rt2x00 generic pci device routines.
26 #include <linux/dma-mapping.h>
27 #include <linux/kernel.h>
28 #include <linux/module.h>
29 #include <linux/pci.h>
30 #include <linux/slab.h>
32 #include "rt2x00.h"
33 #include "rt2x00pci.h"
36 * Register access.
38 int rt2x00pci_regbusy_read(struct rt2x00_dev *rt2x00dev,
39 const unsigned int offset,
40 const struct rt2x00_field32 field,
41 u32 *reg)
43 unsigned int i;
45 if (!test_bit(DEVICE_STATE_PRESENT, &rt2x00dev->flags))
46 return 0;
48 for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
49 rt2x00pci_register_read(rt2x00dev, offset, reg);
50 if (!rt2x00_get_field32(*reg, field))
51 return 1;
52 udelay(REGISTER_BUSY_DELAY);
55 ERROR(rt2x00dev, "Indirect register access failed: "
56 "offset=0x%.08x, value=0x%.08x\n", offset, *reg);
57 *reg = ~0;
59 return 0;
61 EXPORT_SYMBOL_GPL(rt2x00pci_regbusy_read);
63 bool rt2x00pci_rxdone(struct rt2x00_dev *rt2x00dev)
65 struct data_queue *queue = rt2x00dev->rx;
66 struct queue_entry *entry;
67 struct queue_entry_priv_pci *entry_priv;
68 struct skb_frame_desc *skbdesc;
69 int max_rx = 16;
71 while (--max_rx) {
72 entry = rt2x00queue_get_entry(queue, Q_INDEX);
73 entry_priv = entry->priv_data;
75 if (rt2x00dev->ops->lib->get_entry_state(entry))
76 break;
79 * Fill in desc fields of the skb descriptor
81 skbdesc = get_skb_frame_desc(entry->skb);
82 skbdesc->desc = entry_priv->desc;
83 skbdesc->desc_len = entry->queue->desc_size;
86 * DMA is already done, notify rt2x00lib that
87 * it finished successfully.
89 rt2x00lib_dmastart(entry);
90 rt2x00lib_dmadone(entry);
93 * Send the frame to rt2x00lib for further processing.
95 rt2x00lib_rxdone(entry);
98 return !max_rx;
100 EXPORT_SYMBOL_GPL(rt2x00pci_rxdone);
102 void rt2x00pci_flush_queue(struct data_queue *queue, bool drop)
104 unsigned int i;
106 for (i = 0; !rt2x00queue_empty(queue) && i < 10; i++)
107 msleep(10);
109 EXPORT_SYMBOL_GPL(rt2x00pci_flush_queue);
112 * Device initialization handlers.
114 static int rt2x00pci_alloc_queue_dma(struct rt2x00_dev *rt2x00dev,
115 struct data_queue *queue)
117 struct queue_entry_priv_pci *entry_priv;
118 void *addr;
119 dma_addr_t dma;
120 unsigned int i;
123 * Allocate DMA memory for descriptor and buffer.
125 addr = dma_alloc_coherent(rt2x00dev->dev,
126 queue->limit * queue->desc_size,
127 &dma, GFP_KERNEL);
128 if (!addr)
129 return -ENOMEM;
131 memset(addr, 0, queue->limit * queue->desc_size);
134 * Initialize all queue entries to contain valid addresses.
136 for (i = 0; i < queue->limit; i++) {
137 entry_priv = queue->entries[i].priv_data;
138 entry_priv->desc = addr + i * queue->desc_size;
139 entry_priv->desc_dma = dma + i * queue->desc_size;
142 return 0;
145 static void rt2x00pci_free_queue_dma(struct rt2x00_dev *rt2x00dev,
146 struct data_queue *queue)
148 struct queue_entry_priv_pci *entry_priv =
149 queue->entries[0].priv_data;
151 if (entry_priv->desc)
152 dma_free_coherent(rt2x00dev->dev,
153 queue->limit * queue->desc_size,
154 entry_priv->desc, entry_priv->desc_dma);
155 entry_priv->desc = NULL;
158 int rt2x00pci_initialize(struct rt2x00_dev *rt2x00dev)
160 struct data_queue *queue;
161 int status;
164 * Allocate DMA
166 queue_for_each(rt2x00dev, queue) {
167 status = rt2x00pci_alloc_queue_dma(rt2x00dev, queue);
168 if (status)
169 goto exit;
173 * Register interrupt handler.
175 status = request_irq(rt2x00dev->irq,
176 rt2x00dev->ops->lib->irq_handler,
177 IRQF_SHARED, rt2x00dev->name, rt2x00dev);
178 if (status) {
179 ERROR(rt2x00dev, "IRQ %d allocation failed (error %d).\n",
180 rt2x00dev->irq, status);
181 goto exit;
184 return 0;
186 exit:
187 queue_for_each(rt2x00dev, queue)
188 rt2x00pci_free_queue_dma(rt2x00dev, queue);
190 return status;
192 EXPORT_SYMBOL_GPL(rt2x00pci_initialize);
194 void rt2x00pci_uninitialize(struct rt2x00_dev *rt2x00dev)
196 struct data_queue *queue;
199 * Free irq line.
201 free_irq(rt2x00dev->irq, rt2x00dev);
204 * Free DMA
206 queue_for_each(rt2x00dev, queue)
207 rt2x00pci_free_queue_dma(rt2x00dev, queue);
209 EXPORT_SYMBOL_GPL(rt2x00pci_uninitialize);
212 * PCI driver handlers.
214 static void rt2x00pci_free_reg(struct rt2x00_dev *rt2x00dev)
216 kfree(rt2x00dev->rf);
217 rt2x00dev->rf = NULL;
219 kfree(rt2x00dev->eeprom);
220 rt2x00dev->eeprom = NULL;
222 if (rt2x00dev->csr.base) {
223 iounmap(rt2x00dev->csr.base);
224 rt2x00dev->csr.base = NULL;
228 static int rt2x00pci_alloc_reg(struct rt2x00_dev *rt2x00dev)
230 struct pci_dev *pci_dev = to_pci_dev(rt2x00dev->dev);
232 rt2x00dev->csr.base = pci_ioremap_bar(pci_dev, 0);
233 if (!rt2x00dev->csr.base)
234 goto exit;
236 rt2x00dev->eeprom = kzalloc(rt2x00dev->ops->eeprom_size, GFP_KERNEL);
237 if (!rt2x00dev->eeprom)
238 goto exit;
240 rt2x00dev->rf = kzalloc(rt2x00dev->ops->rf_size, GFP_KERNEL);
241 if (!rt2x00dev->rf)
242 goto exit;
244 return 0;
246 exit:
247 ERROR_PROBE("Failed to allocate registers.\n");
249 rt2x00pci_free_reg(rt2x00dev);
251 return -ENOMEM;
254 int rt2x00pci_probe(struct pci_dev *pci_dev, const struct rt2x00_ops *ops)
256 struct ieee80211_hw *hw;
257 struct rt2x00_dev *rt2x00dev;
258 int retval;
260 retval = pci_enable_device(pci_dev);
261 if (retval) {
262 ERROR_PROBE("Enable device failed.\n");
263 return retval;
266 retval = pci_request_regions(pci_dev, pci_name(pci_dev));
267 if (retval) {
268 ERROR_PROBE("PCI request regions failed.\n");
269 goto exit_disable_device;
272 pci_set_master(pci_dev);
274 if (pci_set_mwi(pci_dev))
275 ERROR_PROBE("MWI not available.\n");
277 if (dma_set_mask(&pci_dev->dev, DMA_BIT_MASK(32))) {
278 ERROR_PROBE("PCI DMA not supported.\n");
279 retval = -EIO;
280 goto exit_release_regions;
283 hw = ieee80211_alloc_hw(sizeof(struct rt2x00_dev), ops->hw);
284 if (!hw) {
285 ERROR_PROBE("Failed to allocate hardware.\n");
286 retval = -ENOMEM;
287 goto exit_release_regions;
290 pci_set_drvdata(pci_dev, hw);
292 rt2x00dev = hw->priv;
293 rt2x00dev->dev = &pci_dev->dev;
294 rt2x00dev->ops = ops;
295 rt2x00dev->hw = hw;
296 rt2x00dev->irq = pci_dev->irq;
297 rt2x00dev->name = pci_name(pci_dev);
299 if (pci_is_pcie(pci_dev))
300 rt2x00_set_chip_intf(rt2x00dev, RT2X00_CHIP_INTF_PCIE);
301 else
302 rt2x00_set_chip_intf(rt2x00dev, RT2X00_CHIP_INTF_PCI);
304 retval = rt2x00pci_alloc_reg(rt2x00dev);
305 if (retval)
306 goto exit_free_device;
308 retval = rt2x00lib_probe_dev(rt2x00dev);
309 if (retval)
310 goto exit_free_reg;
312 return 0;
314 exit_free_reg:
315 rt2x00pci_free_reg(rt2x00dev);
317 exit_free_device:
318 ieee80211_free_hw(hw);
320 exit_release_regions:
321 pci_release_regions(pci_dev);
323 exit_disable_device:
324 pci_disable_device(pci_dev);
326 pci_set_drvdata(pci_dev, NULL);
328 return retval;
330 EXPORT_SYMBOL_GPL(rt2x00pci_probe);
332 void rt2x00pci_remove(struct pci_dev *pci_dev)
334 struct ieee80211_hw *hw = pci_get_drvdata(pci_dev);
335 struct rt2x00_dev *rt2x00dev = hw->priv;
338 * Free all allocated data.
340 rt2x00lib_remove_dev(rt2x00dev);
341 rt2x00pci_free_reg(rt2x00dev);
342 ieee80211_free_hw(hw);
345 * Free the PCI device data.
347 pci_set_drvdata(pci_dev, NULL);
348 pci_disable_device(pci_dev);
349 pci_release_regions(pci_dev);
351 EXPORT_SYMBOL_GPL(rt2x00pci_remove);
353 #ifdef CONFIG_PM
354 int rt2x00pci_suspend(struct pci_dev *pci_dev, pm_message_t state)
356 struct ieee80211_hw *hw = pci_get_drvdata(pci_dev);
357 struct rt2x00_dev *rt2x00dev = hw->priv;
358 int retval;
360 retval = rt2x00lib_suspend(rt2x00dev, state);
361 if (retval)
362 return retval;
364 pci_save_state(pci_dev);
365 pci_disable_device(pci_dev);
366 return pci_set_power_state(pci_dev, pci_choose_state(pci_dev, state));
368 EXPORT_SYMBOL_GPL(rt2x00pci_suspend);
370 int rt2x00pci_resume(struct pci_dev *pci_dev)
372 struct ieee80211_hw *hw = pci_get_drvdata(pci_dev);
373 struct rt2x00_dev *rt2x00dev = hw->priv;
375 if (pci_set_power_state(pci_dev, PCI_D0) ||
376 pci_enable_device(pci_dev)) {
377 ERROR(rt2x00dev, "Failed to resume device.\n");
378 return -EIO;
381 pci_restore_state(pci_dev);
382 return rt2x00lib_resume(rt2x00dev);
384 EXPORT_SYMBOL_GPL(rt2x00pci_resume);
385 #endif /* CONFIG_PM */
388 * rt2x00pci module information.
390 MODULE_AUTHOR(DRV_PROJECT);
391 MODULE_VERSION(DRV_VERSION);
392 MODULE_DESCRIPTION("rt2x00 pci library");
393 MODULE_LICENSE("GPL");