spi-topcliff-pch: supports a spi mode setup and bit order setup by IO control
[zen-stable.git] / drivers / net / wireless / wl12xx / io.h
blobd398cbcea98677ae4b2c952b3077ed7d10c8920d
1 /*
2 * This file is part of wl1271
4 * Copyright (C) 1998-2009 Texas Instruments. All rights reserved.
5 * Copyright (C) 2008-2010 Nokia Corporation
7 * Contact: Luciano Coelho <luciano.coelho@nokia.com>
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License
11 * version 2 as published by the Free Software Foundation.
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
16 * General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
21 * 02110-1301 USA
25 #ifndef __IO_H__
26 #define __IO_H__
28 #include <linux/irqreturn.h>
29 #include "reg.h"
31 #define HW_ACCESS_MEMORY_MAX_RANGE 0x1FFC0
33 #define HW_PARTITION_REGISTERS_ADDR 0x1FFC0
34 #define HW_PART0_SIZE_ADDR (HW_PARTITION_REGISTERS_ADDR)
35 #define HW_PART0_START_ADDR (HW_PARTITION_REGISTERS_ADDR + 4)
36 #define HW_PART1_SIZE_ADDR (HW_PARTITION_REGISTERS_ADDR + 8)
37 #define HW_PART1_START_ADDR (HW_PARTITION_REGISTERS_ADDR + 12)
38 #define HW_PART2_SIZE_ADDR (HW_PARTITION_REGISTERS_ADDR + 16)
39 #define HW_PART2_START_ADDR (HW_PARTITION_REGISTERS_ADDR + 20)
40 #define HW_PART3_START_ADDR (HW_PARTITION_REGISTERS_ADDR + 24)
42 #define HW_ACCESS_REGISTER_SIZE 4
44 #define HW_ACCESS_PRAM_MAX_RANGE 0x3c000
46 struct wl1271;
48 void wl1271_disable_interrupts(struct wl1271 *wl);
49 void wl1271_enable_interrupts(struct wl1271 *wl);
51 void wl1271_io_reset(struct wl1271 *wl);
52 void wl1271_io_init(struct wl1271 *wl);
54 /* Raw target IO, address is not translated */
55 static inline void wl1271_raw_write(struct wl1271 *wl, int addr, void *buf,
56 size_t len, bool fixed)
58 wl->if_ops->write(wl->dev, addr, buf, len, fixed);
61 static inline void wl1271_raw_read(struct wl1271 *wl, int addr, void *buf,
62 size_t len, bool fixed)
64 wl->if_ops->read(wl->dev, addr, buf, len, fixed);
67 static inline u32 wl1271_raw_read32(struct wl1271 *wl, int addr)
69 wl1271_raw_read(wl, addr, &wl->buffer_32,
70 sizeof(wl->buffer_32), false);
72 return le32_to_cpu(wl->buffer_32);
75 static inline void wl1271_raw_write32(struct wl1271 *wl, int addr, u32 val)
77 wl->buffer_32 = cpu_to_le32(val);
78 wl1271_raw_write(wl, addr, &wl->buffer_32,
79 sizeof(wl->buffer_32), false);
82 /* Translated target IO */
83 static inline int wl1271_translate_addr(struct wl1271 *wl, int addr)
86 * To translate, first check to which window of addresses the
87 * particular address belongs. Then subtract the starting address
88 * of that window from the address. Then, add offset of the
89 * translated region.
91 * The translated regions occur next to each other in physical device
92 * memory, so just add the sizes of the preceding address regions to
93 * get the offset to the new region.
95 * Currently, only the two first regions are addressed, and the
96 * assumption is that all addresses will fall into either of those
97 * two.
99 if ((addr >= wl->part.reg.start) &&
100 (addr < wl->part.reg.start + wl->part.reg.size))
101 return addr - wl->part.reg.start + wl->part.mem.size;
102 else
103 return addr - wl->part.mem.start;
106 static inline void wl1271_read(struct wl1271 *wl, int addr, void *buf,
107 size_t len, bool fixed)
109 int physical;
111 physical = wl1271_translate_addr(wl, addr);
113 wl1271_raw_read(wl, physical, buf, len, fixed);
116 static inline void wl1271_write(struct wl1271 *wl, int addr, void *buf,
117 size_t len, bool fixed)
119 int physical;
121 physical = wl1271_translate_addr(wl, addr);
123 wl1271_raw_write(wl, physical, buf, len, fixed);
126 static inline void wl1271_read_hwaddr(struct wl1271 *wl, int hwaddr,
127 void *buf, size_t len, bool fixed)
129 int physical;
130 int addr;
132 /* Addresses are stored internally as addresses to 32 bytes blocks */
133 addr = hwaddr << 5;
135 physical = wl1271_translate_addr(wl, addr);
137 wl1271_raw_read(wl, physical, buf, len, fixed);
140 static inline u32 wl1271_read32(struct wl1271 *wl, int addr)
142 return wl1271_raw_read32(wl, wl1271_translate_addr(wl, addr));
145 static inline void wl1271_write32(struct wl1271 *wl, int addr, u32 val)
147 wl1271_raw_write32(wl, wl1271_translate_addr(wl, addr), val);
150 static inline void wl1271_power_off(struct wl1271 *wl)
152 wl->if_ops->power(wl->dev, false);
153 clear_bit(WL1271_FLAG_GPIO_POWER, &wl->flags);
156 static inline int wl1271_power_on(struct wl1271 *wl)
158 int ret = wl->if_ops->power(wl->dev, true);
159 if (ret == 0)
160 set_bit(WL1271_FLAG_GPIO_POWER, &wl->flags);
162 return ret;
166 /* Top Register IO */
167 void wl1271_top_reg_write(struct wl1271 *wl, int addr, u16 val);
168 u16 wl1271_top_reg_read(struct wl1271 *wl, int addr);
170 int wl1271_set_partition(struct wl1271 *wl,
171 struct wl1271_partition_set *p);
173 bool wl1271_set_block_size(struct wl1271 *wl);
175 /* Functions from wl1271_main.c */
177 int wl1271_tx_dummy_packet(struct wl1271 *wl);
179 #endif