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QE/FHCI: fixed the CONTROL bug
[zen-stable.git] / drivers / scsi / pmcraid.h
blobf920baf3ff24638f6c28a1ecf36bc2d70916f9c4
1 /*
2 * pmcraid.h -- PMC Sierra MaxRAID controller driver header file
3 *
4 * Written By: Anil Ravindranath<anil_ravindranath@pmc-sierra.com>
5 * PMC-Sierra Inc
6 *
7 * Copyright (C) 2008, 2009 PMC Sierra Inc.
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
22 */
23
24 #ifndef _PMCRAID_H
25 #define _PMCRAID_H
26
27 #include <linux/version.h>
28 #include <linux/types.h>
29 #include <linux/completion.h>
30 #include <linux/list.h>
31 #include <scsi/scsi.h>
32 #include <scsi/scsi_cmnd.h>
33 #include <linux/cdev.h>
34 #include <net/netlink.h>
35 #include <net/genetlink.h>
36 #include <linux/connector.h>
37 /*
38 * Driver name : string representing the driver name
39 * Device file : /dev file to be used for management interfaces
40 * Driver version: version string in major_version.minor_version.patch format
41 * Driver date : date information in "Mon dd yyyy" format
42 */
43 #define PMCRAID_DRIVER_NAME "PMC MaxRAID"
44 #define PMCRAID_DEVFILE "pmcsas"
45 #define PMCRAID_DRIVER_VERSION "1.0.3"
46
47 #define PMCRAID_FW_VERSION_1 0x002
48
49 /* Maximum number of adapters supported by current version of the driver */
50 #define PMCRAID_MAX_ADAPTERS 1024
51
52 /* Bit definitions as per firmware, bit position [0][1][2].....[31] */
53 #define PMC_BIT8(n) (1 << (7-n))
54 #define PMC_BIT16(n) (1 << (15-n))
55 #define PMC_BIT32(n) (1 << (31-n))
56
57 /* PMC PCI vendor ID and device ID values */
58 #define PCI_VENDOR_ID_PMC 0x11F8
59 #define PCI_DEVICE_ID_PMC_MAXRAID 0x5220
60
61 /*
62 * MAX_CMD : maximum commands that can be outstanding with IOA
63 * MAX_IO_CMD : command blocks available for IO commands
64 * MAX_HCAM_CMD : command blocks avaibale for HCAMS
65 * MAX_INTERNAL_CMD : command blocks avaible for internal commands like reset
66 */
67 #define PMCRAID_MAX_CMD 1024
68 #define PMCRAID_MAX_IO_CMD 1020
69 #define PMCRAID_MAX_HCAM_CMD 2
70 #define PMCRAID_MAX_INTERNAL_CMD 2
71
72 /* MAX_IOADLS : max number of scatter-gather lists supported by IOA
73 * IOADLS_INTERNAL : number of ioadls included as part of IOARCB.
74 * IOADLS_EXTERNAL : number of ioadls allocated external to IOARCB
75 */
76 #define PMCRAID_IOADLS_INTERNAL 27
77 #define PMCRAID_IOADLS_EXTERNAL 37
78 #define PMCRAID_MAX_IOADLS PMCRAID_IOADLS_INTERNAL
79
80 /* HRRQ_ENTRY_SIZE : size of hrrq buffer
81 * IOARCB_ALIGNMENT : alignment required for IOARCB
82 * IOADL_ALIGNMENT : alignment requirement for IOADLs
83 * MSIX_VECTORS : number of MSIX vectors supported
84 */
85 #define HRRQ_ENTRY_SIZE sizeof(__le32)
86 #define PMCRAID_IOARCB_ALIGNMENT 32
87 #define PMCRAID_IOADL_ALIGNMENT 16
88 #define PMCRAID_IOASA_ALIGNMENT 4
89 #define PMCRAID_NUM_MSIX_VECTORS 16
90
91 /* various other limits */
92 #define PMCRAID_VENDOR_ID_LEN 8
93 #define PMCRAID_PRODUCT_ID_LEN 16
94 #define PMCRAID_SERIAL_NUM_LEN 8
95 #define PMCRAID_LUN_LEN 8
96 #define PMCRAID_MAX_CDB_LEN 16
97 #define PMCRAID_DEVICE_ID_LEN 8
98 #define PMCRAID_SENSE_DATA_LEN 256
99 #define PMCRAID_ADD_CMD_PARAM_LEN 48
100
101 #define PMCRAID_MAX_BUS_TO_SCAN 1
102 #define PMCRAID_MAX_NUM_TARGETS_PER_BUS 256
103 #define PMCRAID_MAX_NUM_LUNS_PER_TARGET 8
104
105 /* IOA bus/target/lun number of IOA resources */
106 #define PMCRAID_IOA_BUS_ID 0xfe
107 #define PMCRAID_IOA_TARGET_ID 0xff
108 #define PMCRAID_IOA_LUN_ID 0xff
109 #define PMCRAID_VSET_BUS_ID 0x1
110 #define PMCRAID_VSET_LUN_ID 0x0
111 #define PMCRAID_PHYS_BUS_ID 0x0
112 #define PMCRAID_VIRTUAL_ENCL_BUS_ID 0x8
113 #define PMCRAID_MAX_VSET_TARGETS 0x7F
114 #define PMCRAID_MAX_VSET_LUNS_PER_TARGET 8
115
116 #define PMCRAID_IOA_MAX_SECTORS 32767
117 #define PMCRAID_VSET_MAX_SECTORS 512
118 #define PMCRAID_MAX_CMD_PER_LUN 254
119
120 /* Number of configuration table entries (resources), includes 1 FP,
121 * 1 Enclosure device
122 */
123 #define PMCRAID_MAX_RESOURCES 256
124
125 /* Adapter Commands used by driver */
126 #define PMCRAID_QUERY_RESOURCE_STATE 0xC2
127 #define PMCRAID_RESET_DEVICE 0xC3
128 /* options to select reset target */
129 #define ENABLE_RESET_MODIFIER 0x80
130 #define RESET_DEVICE_LUN 0x40
131 #define RESET_DEVICE_TARGET 0x20
132 #define RESET_DEVICE_BUS 0x10
133
134 #define PMCRAID_IDENTIFY_HRRQ 0xC4
135 #define PMCRAID_QUERY_IOA_CONFIG 0xC5
136 #define PMCRAID_QUERY_CMD_STATUS 0xCB
137 #define PMCRAID_ABORT_CMD 0xC7
138
139 /* CANCEL ALL command, provides option for setting SYNC_COMPLETE
140 * on the target resources for which commands got cancelled
141 */
142 #define PMCRAID_CANCEL_ALL_REQUESTS 0xCE
143 #define PMCRAID_SYNC_COMPLETE_AFTER_CANCEL PMC_BIT8(0)
144
145 /* HCAM command and types of HCAM supported by IOA */
146 #define PMCRAID_HOST_CONTROLLED_ASYNC 0xCF
147 #define PMCRAID_HCAM_CODE_CONFIG_CHANGE 0x01
148 #define PMCRAID_HCAM_CODE_LOG_DATA 0x02
149
150 /* IOA shutdown command and various shutdown types */
151 #define PMCRAID_IOA_SHUTDOWN 0xF7
152 #define PMCRAID_SHUTDOWN_NORMAL 0x00
153 #define PMCRAID_SHUTDOWN_PREPARE_FOR_NORMAL 0x40
154 #define PMCRAID_SHUTDOWN_NONE 0x100
155 #define PMCRAID_SHUTDOWN_ABBREV 0x80
156
157 /* SET SUPPORTED DEVICES command and the option to select all the
158 * devices to be supported
159 */
160 #define PMCRAID_SET_SUPPORTED_DEVICES 0xFB
161 #define ALL_DEVICES_SUPPORTED PMC_BIT8(0)
162
163 /* This option is used with SCSI WRITE_BUFFER command */
164 #define PMCRAID_WR_BUF_DOWNLOAD_AND_SAVE 0x05
165
166 /* IOASC Codes used by driver */
167 #define PMCRAID_IOASC_SENSE_MASK 0xFFFFFF00
168 #define PMCRAID_IOASC_SENSE_KEY(ioasc) ((ioasc) >> 24)
169 #define PMCRAID_IOASC_SENSE_CODE(ioasc) (((ioasc) & 0x00ff0000) >> 16)
170 #define PMCRAID_IOASC_SENSE_QUAL(ioasc) (((ioasc) & 0x0000ff00) >> 8)
171 #define PMCRAID_IOASC_SENSE_STATUS(ioasc) ((ioasc) & 0x000000ff)
172
173 #define PMCRAID_IOASC_GOOD_COMPLETION 0x00000000
174 #define PMCRAID_IOASC_GC_IOARCB_NOTFOUND 0x005A0000
175 #define PMCRAID_IOASC_NR_INIT_CMD_REQUIRED 0x02040200
176 #define PMCRAID_IOASC_NR_IOA_RESET_REQUIRED 0x02048000
177 #define PMCRAID_IOASC_NR_SYNC_REQUIRED 0x023F0000
178 #define PMCRAID_IOASC_ME_READ_ERROR_NO_REALLOC 0x03110C00
179 #define PMCRAID_IOASC_HW_CANNOT_COMMUNICATE 0x04050000
180 #define PMCRAID_IOASC_HW_DEVICE_TIMEOUT 0x04080100
181 #define PMCRAID_IOASC_HW_DEVICE_BUS_STATUS_ERROR 0x04448500
182 #define PMCRAID_IOASC_HW_IOA_RESET_REQUIRED 0x04448600
183 #define PMCRAID_IOASC_IR_INVALID_RESOURCE_HANDLE 0x05250000
184 #define PMCRAID_IOASC_AC_TERMINATED_BY_HOST 0x0B5A0000
185 #define PMCRAID_IOASC_UA_BUS_WAS_RESET 0x06290000
186 #define PMCRAID_IOASC_TIME_STAMP_OUT_OF_SYNC 0x06908B00
187 #define PMCRAID_IOASC_UA_BUS_WAS_RESET_BY_OTHER 0x06298000
188
189 /* Driver defined IOASCs */
190 #define PMCRAID_IOASC_IOA_WAS_RESET 0x10000001
191 #define PMCRAID_IOASC_PCI_ACCESS_ERROR 0x10000002
192
193 /* Various timeout values (in milliseconds) used. If any of these are chip
194 * specific, move them to pmcraid_chip_details structure.
195 */
196 #define PMCRAID_PCI_DEASSERT_TIMEOUT 2000
197 #define PMCRAID_BIST_TIMEOUT 2000
198 #define PMCRAID_AENWAIT_TIMEOUT 5000
199 #define PMCRAID_TRANSOP_TIMEOUT 60000
200
201 #define PMCRAID_RESET_TIMEOUT (2 * HZ)
202 #define PMCRAID_CHECK_FOR_RESET_TIMEOUT ((HZ / 10))
203 #define PMCRAID_VSET_IO_TIMEOUT (60 * HZ)
204 #define PMCRAID_INTERNAL_TIMEOUT (60 * HZ)
205 #define PMCRAID_SHUTDOWN_TIMEOUT (150 * HZ)
206 #define PMCRAID_RESET_BUS_TIMEOUT (60 * HZ)
207 #define PMCRAID_RESET_HOST_TIMEOUT (150 * HZ)
208 #define PMCRAID_REQUEST_SENSE_TIMEOUT (30 * HZ)
209 #define PMCRAID_SET_SUP_DEV_TIMEOUT (2 * 60 * HZ)
210
211 /* structure to represent a scatter-gather element (IOADL descriptor) */
212 struct pmcraid_ioadl_desc {
213 __le64 address;
214 __le32 data_len;
215 __u8 reserved[3];
216 __u8 flags;
217 } __attribute__((packed, aligned(PMCRAID_IOADL_ALIGNMENT)));
218
219 /* pmcraid_ioadl_desc.flags values */
220 #define IOADL_FLAGS_CHAINED PMC_BIT8(0)
221 #define IOADL_FLAGS_LAST_DESC PMC_BIT8(1)
222 #define IOADL_FLAGS_READ_LAST PMC_BIT8(1)
223 #define IOADL_FLAGS_WRITE_LAST PMC_BIT8(1)
224
225
226 /* additional IOARCB data which can be CDB or additional request parameters
227 * or list of IOADLs. Firmware supports max of 512 bytes for IOARCB, hence then
228 * number of IOADLs are limted to 27. In case they are more than 27, they will
229 * be used in chained form
230 */
231 struct pmcraid_ioarcb_add_data {
232 union {
233 struct pmcraid_ioadl_desc ioadl[PMCRAID_IOADLS_INTERNAL];
234 __u8 add_cmd_params[PMCRAID_ADD_CMD_PARAM_LEN];
235 } u;
236 };
237
238 /*
239 * IOA Request Control Block
240 */
241 struct pmcraid_ioarcb {
242 __le64 ioarcb_bus_addr;
243 __le32 resource_handle;
244 __le32 response_handle;
245 __le64 ioadl_bus_addr;
246 __le32 ioadl_length;
247 __le32 data_transfer_length;
248 __le64 ioasa_bus_addr;
249 __le16 ioasa_len;
250 __le16 cmd_timeout;
251 __le16 add_cmd_param_offset;
252 __le16 add_cmd_param_length;
253 __le32 reserved1[2];
254 __le32 reserved2;
255 __u8 request_type;
256 __u8 request_flags0;
257 __u8 request_flags1;
258 __u8 hrrq_id;
259 __u8 cdb[PMCRAID_MAX_CDB_LEN];
260 struct pmcraid_ioarcb_add_data add_data;
261 } __attribute__((packed, aligned(PMCRAID_IOARCB_ALIGNMENT)));
262
263 /* well known resource handle values */
264 #define PMCRAID_IOA_RES_HANDLE 0xffffffff
265 #define PMCRAID_INVALID_RES_HANDLE 0
266
267 /* pmcraid_ioarcb.request_type values */
268 #define REQ_TYPE_SCSI 0x00
269 #define REQ_TYPE_IOACMD 0x01
270 #define REQ_TYPE_HCAM 0x02
271
272 /* pmcraid_ioarcb.flags0 values */
273 #define TRANSFER_DIR_WRITE PMC_BIT8(0)
274 #define INHIBIT_UL_CHECK PMC_BIT8(2)
275 #define SYNC_OVERRIDE PMC_BIT8(3)
276 #define SYNC_COMPLETE PMC_BIT8(4)
277 #define NO_LINK_DESCS PMC_BIT8(5)
278
279 /* pmcraid_ioarcb.flags1 values */
280 #define DELAY_AFTER_RESET PMC_BIT8(0)
281 #define TASK_TAG_SIMPLE 0x10
282 #define TASK_TAG_ORDERED 0x20
283 #define TASK_TAG_QUEUE_HEAD 0x30
284
285 /* toggle bit offset in response handle */
286 #define HRRQ_TOGGLE_BIT 0x01
287 #define HRRQ_RESPONSE_BIT 0x02
288
289 /* IOA Status Area */
290 struct pmcraid_ioasa_vset {
291 __le32 failing_lba_hi;
292 __le32 failing_lba_lo;
293 __le32 reserved;
294 } __attribute__((packed, aligned(4)));
295
296 struct pmcraid_ioasa {
297 __le32 ioasc;
298 __le16 returned_status_length;
299 __le16 available_status_length;
300 __le32 residual_data_length;
301 __le32 ilid;
302 __le32 fd_ioasc;
303 __le32 fd_res_address;
304 __le32 fd_res_handle;
305 __le32 reserved;
306
307 /* resource specific sense information */
308 union {
309 struct pmcraid_ioasa_vset vset;
310 } u;
311
312 /* IOA autosense data */
313 __le16 auto_sense_length;
314 __le16 error_data_length;
315 __u8 sense_data[PMCRAID_SENSE_DATA_LEN];
316 } __attribute__((packed, aligned(4)));
317
318 #define PMCRAID_DRIVER_ILID 0xffffffff
319
320 /* Config Table Entry per Resource */
321 struct pmcraid_config_table_entry {
322 __u8 resource_type;
323 __u8 bus_protocol;
324 __le16 array_id;
325 __u8 common_flags0;
326 __u8 common_flags1;
327 __u8 unique_flags0;
328 __u8 unique_flags1; /*also used as vset target_id */
329 __le32 resource_handle;
330 __le32 resource_address;
331 __u8 device_id[PMCRAID_DEVICE_ID_LEN];
332 __u8 lun[PMCRAID_LUN_LEN];
333 } __attribute__((packed, aligned(4)));
334
335 /* extended configuration table sizes are also of 32 bytes in size */
336 struct pmcraid_config_table_entry_ext {
337 struct pmcraid_config_table_entry cfgte;
338 };
339
340 /* resource types (config_table_entry.resource_type values) */
341 #define RES_TYPE_AF_DASD 0x00
342 #define RES_TYPE_GSCSI 0x01
343 #define RES_TYPE_VSET 0x02
344 #define RES_TYPE_IOA_FP 0xFF
345
346 #define RES_IS_IOA(res) ((res).resource_type == RES_TYPE_IOA_FP)
347 #define RES_IS_GSCSI(res) ((res).resource_type == RES_TYPE_GSCSI)
348 #define RES_IS_VSET(res) ((res).resource_type == RES_TYPE_VSET)
349 #define RES_IS_AFDASD(res) ((res).resource_type == RES_TYPE_AF_DASD)
350
351 /* bus_protocol values used by driver */
352 #define RES_TYPE_VENCLOSURE 0x8
353
354 /* config_table_entry.common_flags0 */
355 #define MULTIPATH_RESOURCE PMC_BIT32(0)
356
357 /* unique_flags1 */
358 #define IMPORT_MODE_MANUAL PMC_BIT8(0)
359
360 /* well known resource handle values */
361 #define RES_HANDLE_IOA 0xFFFFFFFF
362 #define RES_HANDLE_NONE 0x00000000
363
364 /* well known resource address values */
365 #define RES_ADDRESS_IOAFP 0xFEFFFFFF
366 #define RES_ADDRESS_INVALID 0xFFFFFFFF
367
368 /* BUS/TARGET/LUN values from resource_addrr */
369 #define RES_BUS(res_addr) (le32_to_cpu(res_addr) & 0xFF)
370 #define RES_TARGET(res_addr) ((le32_to_cpu(res_addr) >> 16) & 0xFF)
371 #define RES_LUN(res_addr) 0x0
372
373 /* configuration table structure */
374 struct pmcraid_config_table {
375 __le16 num_entries;
376 __u8 table_format;
377 __u8 reserved1;
378 __u8 flags;
379 __u8 reserved2[11];
380 union {
381 struct pmcraid_config_table_entry
382 entries[PMCRAID_MAX_RESOURCES];
383 struct pmcraid_config_table_entry_ext
384 entries_ext[PMCRAID_MAX_RESOURCES];
385 };
386 } __attribute__((packed, aligned(4)));
387
388 /* config_table.flags value */
389 #define MICROCODE_UPDATE_REQUIRED PMC_BIT32(0)
390
391 /*
392 * HCAM format
393 */
394 #define PMCRAID_HOSTRCB_LDNSIZE 4056
395
396 /* Error log notification format */
397 struct pmcraid_hostrcb_error {
398 __le32 fd_ioasc;
399 __le32 fd_ra;
400 __le32 fd_rh;
401 __le32 prc;
402 union {
403 __u8 data[PMCRAID_HOSTRCB_LDNSIZE];
404 } u;
405 } __attribute__ ((packed, aligned(4)));
406
407 struct pmcraid_hcam_hdr {
408 __u8 op_code;
409 __u8 notification_type;
410 __u8 notification_lost;
411 __u8 flags;
412 __u8 overlay_id;
413 __u8 reserved1[3];
414 __le32 ilid;
415 __le32 timestamp1;
416 __le32 timestamp2;
417 __le32 data_len;
418 } __attribute__((packed, aligned(4)));
419
420 #define PMCRAID_AEN_GROUP 0x3
421
422 struct pmcraid_hcam_ccn {
423 struct pmcraid_hcam_hdr header;
424 struct pmcraid_config_table_entry cfg_entry;
425 struct pmcraid_config_table_entry cfg_entry_old;
426 } __attribute__((packed, aligned(4)));
427
428 #define PMCRAID_CCN_EXT_SIZE 3944
429 struct pmcraid_hcam_ccn_ext {
430 struct pmcraid_hcam_hdr header;
431 struct pmcraid_config_table_entry_ext cfg_entry;
432 struct pmcraid_config_table_entry_ext cfg_entry_old;
433 __u8 reserved[PMCRAID_CCN_EXT_SIZE];
434 } __attribute__((packed, aligned(4)));
435
436 struct pmcraid_hcam_ldn {
437 struct pmcraid_hcam_hdr header;
438 struct pmcraid_hostrcb_error error_log;
439 } __attribute__((packed, aligned(4)));
440
441 /* pmcraid_hcam.op_code values */
442 #define HOSTRCB_TYPE_CCN 0xE1
443 #define HOSTRCB_TYPE_LDN 0xE2
444
445 /* pmcraid_hcam.notification_type values */
446 #define NOTIFICATION_TYPE_ENTRY_CHANGED 0x0
447 #define NOTIFICATION_TYPE_ENTRY_NEW 0x1
448 #define NOTIFICATION_TYPE_ENTRY_DELETED 0x2
449 #define NOTIFICATION_TYPE_STATE_CHANGE 0x3
450 #define NOTIFICATION_TYPE_ENTRY_STATECHANGED 0x4
451 #define NOTIFICATION_TYPE_ERROR_LOG 0x10
452 #define NOTIFICATION_TYPE_INFORMATION_LOG 0x11
453
454 #define HOSTRCB_NOTIFICATIONS_LOST PMC_BIT8(0)
455
456 /* pmcraid_hcam.flags values */
457 #define HOSTRCB_INTERNAL_OP_ERROR PMC_BIT8(0)
458 #define HOSTRCB_ERROR_RESPONSE_SENT PMC_BIT8(1)
459
460 /* pmcraid_hcam.overlay_id values */
461 #define HOSTRCB_OVERLAY_ID_08 0x08
462 #define HOSTRCB_OVERLAY_ID_09 0x09
463 #define HOSTRCB_OVERLAY_ID_11 0x11
464 #define HOSTRCB_OVERLAY_ID_12 0x12
465 #define HOSTRCB_OVERLAY_ID_13 0x13
466 #define HOSTRCB_OVERLAY_ID_14 0x14
467 #define HOSTRCB_OVERLAY_ID_16 0x16
468 #define HOSTRCB_OVERLAY_ID_17 0x17
469 #define HOSTRCB_OVERLAY_ID_20 0x20
470 #define HOSTRCB_OVERLAY_ID_FF 0xFF
471
472 /* Implementation specific card details */
473 struct pmcraid_chip_details {
474 /* hardware register offsets */
475 unsigned long ioastatus;
476 unsigned long ioarrin;
477 unsigned long mailbox;
478 unsigned long global_intr_mask;
479 unsigned long ioa_host_intr;
480 unsigned long ioa_host_msix_intr;
481 unsigned long ioa_host_intr_clr;
482 unsigned long ioa_host_mask;
483 unsigned long ioa_host_mask_clr;
484 unsigned long host_ioa_intr;
485 unsigned long host_ioa_intr_clr;
486
487 /* timeout used during transitional to operational state */
488 unsigned long transop_timeout;
489 };
490
491 /* IOA to HOST doorbells (interrupts) */
492 #define INTRS_TRANSITION_TO_OPERATIONAL PMC_BIT32(0)
493 #define INTRS_IOARCB_TRANSFER_FAILED PMC_BIT32(3)
494 #define INTRS_IOA_UNIT_CHECK PMC_BIT32(4)
495 #define INTRS_NO_HRRQ_FOR_CMD_RESPONSE PMC_BIT32(5)
496 #define INTRS_CRITICAL_OP_IN_PROGRESS PMC_BIT32(6)
497 #define INTRS_IO_DEBUG_ACK PMC_BIT32(7)
498 #define INTRS_IOARRIN_LOST PMC_BIT32(27)
499 #define INTRS_SYSTEM_BUS_MMIO_ERROR PMC_BIT32(28)
500 #define INTRS_IOA_PROCESSOR_ERROR PMC_BIT32(29)
501 #define INTRS_HRRQ_VALID PMC_BIT32(30)
502 #define INTRS_OPERATIONAL_STATUS PMC_BIT32(0)
503 #define INTRS_ALLOW_MSIX_VECTOR0 PMC_BIT32(31)
504
505 /* Host to IOA Doorbells */
506 #define DOORBELL_RUNTIME_RESET PMC_BIT32(1)
507 #define DOORBELL_IOA_RESET_ALERT PMC_BIT32(7)
508 #define DOORBELL_IOA_DEBUG_ALERT PMC_BIT32(9)
509 #define DOORBELL_ENABLE_DESTRUCTIVE_DIAGS PMC_BIT32(8)
510 #define DOORBELL_IOA_START_BIST PMC_BIT32(23)
511 #define DOORBELL_INTR_MODE_MSIX PMC_BIT32(25)
512 #define DOORBELL_INTR_MSIX_CLR PMC_BIT32(26)
513 #define DOORBELL_RESET_IOA PMC_BIT32(31)
514
515 /* Global interrupt mask register value */
516 #define GLOBAL_INTERRUPT_MASK 0x5ULL
517
518 #define PMCRAID_ERROR_INTERRUPTS (INTRS_IOARCB_TRANSFER_FAILED | \
519 INTRS_IOA_UNIT_CHECK | \
520 INTRS_NO_HRRQ_FOR_CMD_RESPONSE | \
521 INTRS_IOARRIN_LOST | \
522 INTRS_SYSTEM_BUS_MMIO_ERROR | \
523 INTRS_IOA_PROCESSOR_ERROR)
524
525 #define PMCRAID_PCI_INTERRUPTS (PMCRAID_ERROR_INTERRUPTS | \
526 INTRS_HRRQ_VALID | \
527 INTRS_TRANSITION_TO_OPERATIONAL |\
528 INTRS_ALLOW_MSIX_VECTOR0)
529
530 /* control_block, associated with each of the commands contains IOARCB, IOADLs
531 * memory for IOASA. Additional 3 * 16 bytes are allocated in order to support
532 * additional request parameters (of max size 48) any command.
533 */
534 struct pmcraid_control_block {
535 struct pmcraid_ioarcb ioarcb;
536 struct pmcraid_ioadl_desc ioadl[PMCRAID_IOADLS_EXTERNAL + 3];
537 struct pmcraid_ioasa ioasa;
538 } __attribute__ ((packed, aligned(PMCRAID_IOARCB_ALIGNMENT)));
539
540 /* pmcraid_sglist - Scatter-gather list allocated for passthrough ioctls
541 */
542 struct pmcraid_sglist {
543 u32 order;
544 u32 num_sg;
545 u32 num_dma_sg;
546 u32 buffer_len;
547 struct scatterlist scatterlist[1];
548 };
549
550 /* page D0 inquiry data of focal point resource */
551 struct pmcraid_inquiry_data {
552 __u8 ph_dev_type;
553 __u8 page_code;
554 __u8 reserved1;
555 __u8 add_page_len;
556 __u8 length;
557 __u8 reserved2;
558 __le16 fw_version;
559 __u8 reserved3[16];
560 };
561
562 #define PMCRAID_TIMESTAMP_LEN 12
563 #define PMCRAID_REQ_TM_STR_LEN 6
564 #define PMCRAID_SCSI_SET_TIMESTAMP 0xA4
565 #define PMCRAID_SCSI_SERVICE_ACTION 0x0F
566
567 struct pmcraid_timestamp_data {
568 __u8 reserved1[4];
569 __u8 timestamp[PMCRAID_REQ_TM_STR_LEN]; /* current time value */
570 __u8 reserved2[2];
571 };
572
573 /* pmcraid_cmd - LLD representation of SCSI command */
574 struct pmcraid_cmd {
575
576 /* Ptr and bus address of DMA.able control block for this command */
577 struct pmcraid_control_block *ioa_cb;
578 dma_addr_t ioa_cb_bus_addr;
579 dma_addr_t dma_handle;
580
581 /* pointer to mid layer structure of SCSI commands */
582 struct scsi_cmnd *scsi_cmd;
583
584 struct list_head free_list;
585 struct completion wait_for_completion;
586 struct timer_list timer; /* needed for internal commands */
587 u32 timeout; /* current timeout value */
588 u32 index; /* index into the command list */
589 u8 completion_req; /* for handling internal commands */
590 u8 release; /* for handling completions */
591
592 void (*cmd_done) (struct pmcraid_cmd *);
593 struct pmcraid_instance *drv_inst;
594
595 struct pmcraid_sglist *sglist; /* used for passthrough IOCTLs */
596
597 /* scratch used */
598 union {
599 /* during reset sequence */
600 unsigned long time_left;
601 struct pmcraid_resource_entry *res;
602 int hrrq_index;
603
604 /* used during IO command error handling. Sense buffer
605 * for REQUEST SENSE command if firmware is not sending
606 * auto sense data
607 */
608 struct {
609 u8 *sense_buffer;
610 dma_addr_t sense_buffer_dma;
611 };
612 };
613 };
614
615 /*
616 * Interrupt registers of IOA
617 */
618 struct pmcraid_interrupts {
619 void __iomem *ioa_host_interrupt_reg;
620 void __iomem *ioa_host_msix_interrupt_reg;
621 void __iomem *ioa_host_interrupt_clr_reg;
622 void __iomem *ioa_host_interrupt_mask_reg;
623 void __iomem *ioa_host_interrupt_mask_clr_reg;
624 void __iomem *global_interrupt_mask_reg;
625 void __iomem *host_ioa_interrupt_reg;
626 void __iomem *host_ioa_interrupt_clr_reg;
627 };
628
629 /* ISR parameters LLD allocates (one for each MSI-X if enabled) vectors */
630 struct pmcraid_isr_param {
631 struct pmcraid_instance *drv_inst;
632 u16 vector; /* allocated msi-x vector */
633 u8 hrrq_id; /* hrrq entry index */
634 };
635
636
637 /* AEN message header sent as part of event data to applications */
638 struct pmcraid_aen_msg {
639 u32 hostno;
640 u32 length;
641 u8 reserved[8];
642 u8 data[0];
643 };
644
645 /* Controller state event message type */
646 struct pmcraid_state_msg {
647 struct pmcraid_aen_msg msg;
648 u32 ioa_state;
649 };
650
651 #define PMC_DEVICE_EVENT_RESET_START 0x11000000
652 #define PMC_DEVICE_EVENT_RESET_SUCCESS 0x11000001
653 #define PMC_DEVICE_EVENT_RESET_FAILED 0x11000002
654 #define PMC_DEVICE_EVENT_SHUTDOWN_START 0x11000003
655 #define PMC_DEVICE_EVENT_SHUTDOWN_SUCCESS 0x11000004
656 #define PMC_DEVICE_EVENT_SHUTDOWN_FAILED 0x11000005
657
658 struct pmcraid_hostrcb {
659 struct pmcraid_instance *drv_inst;
660 struct pmcraid_aen_msg *msg;
661 struct pmcraid_hcam_hdr *hcam; /* pointer to hcam buffer */
662 struct pmcraid_cmd *cmd; /* pointer to command block used */
663 dma_addr_t baddr; /* system address of hcam buffer */
664 atomic_t ignore; /* process HCAM response ? */
665 };
666
667 #define PMCRAID_AEN_HDR_SIZE sizeof(struct pmcraid_aen_msg)
668
669
670
671 /*
672 * Per adapter structure maintained by LLD
673 */
674 struct pmcraid_instance {
675 /* Array of allowed-to-be-exposed resources, initialized from
676 * Configutation Table, later updated with CCNs
677 */
678 struct pmcraid_resource_entry *res_entries;
679
680 struct list_head free_res_q; /* res_entries lists for easy lookup */
681 struct list_head used_res_q; /* List of to be exposed resources */
682 spinlock_t resource_lock; /* spinlock to protect resource list */
683
684 void __iomem *mapped_dma_addr;
685 void __iomem *ioa_status; /* Iomapped IOA status register */
686 void __iomem *mailbox; /* Iomapped mailbox register */
687 void __iomem *ioarrin; /* IOmapped IOARR IN register */
688
689 struct pmcraid_interrupts int_regs;
690 struct pmcraid_chip_details *chip_cfg;
691
692 /* HostRCBs needed for HCAM */
693 struct pmcraid_hostrcb ldn;
694 struct pmcraid_hostrcb ccn;
695 struct pmcraid_state_msg scn; /* controller state change msg */
696
697
698 /* Bus address of start of HRRQ */
699 dma_addr_t hrrq_start_bus_addr[PMCRAID_NUM_MSIX_VECTORS];
700
701 /* Pointer to 1st entry of HRRQ */
702 __be32 *hrrq_start[PMCRAID_NUM_MSIX_VECTORS];
703
704 /* Pointer to last entry of HRRQ */
705 __be32 *hrrq_end[PMCRAID_NUM_MSIX_VECTORS];
706
707 /* Pointer to current pointer of hrrq */
708 __be32 *hrrq_curr[PMCRAID_NUM_MSIX_VECTORS];
709
710 /* Lock for HRRQ access */
711 spinlock_t hrrq_lock[PMCRAID_NUM_MSIX_VECTORS];
712
713 struct pmcraid_inquiry_data *inq_data;
714 dma_addr_t inq_data_baddr;
715
716 struct pmcraid_timestamp_data *timestamp_data;
717 dma_addr_t timestamp_data_baddr;
718
719 /* size of configuration table entry, varies based on the firmware */
720 u32 config_table_entry_size;
721
722 /* Expected toggle bit at host */
723 u8 host_toggle_bit[PMCRAID_NUM_MSIX_VECTORS];
724
725
726 /* Wait Q for threads to wait for Reset IOA completion */
727 wait_queue_head_t reset_wait_q;
728 struct pmcraid_cmd *reset_cmd;
729
730 /* structures for supporting SIGIO based AEN. */
731 struct fasync_struct *aen_queue;
732 struct mutex aen_queue_lock; /* lock for aen subscribers list */
733 struct cdev cdev;
734
735 struct Scsi_Host *host; /* mid layer interface structure handle */
736 struct pci_dev *pdev; /* PCI device structure handle */
737
738 /* No of Reset IOA retries . IOA marked dead if threshold exceeds */
739 u8 ioa_reset_attempts;
740 #define PMCRAID_RESET_ATTEMPTS 3
741
742 u8 current_log_level; /* default level for logging IOASC errors */
743
744 u8 num_hrrq; /* Number of interrupt vectors allocated */
745 u8 interrupt_mode; /* current interrupt mode legacy or msix */
746 dev_t dev; /* Major-Minor numbers for Char device */
747
748 /* Used as ISR handler argument */
749 struct pmcraid_isr_param hrrq_vector[PMCRAID_NUM_MSIX_VECTORS];
750
751 /* Message id as filled in last fired IOARCB, used to identify HRRQ */
752 atomic_t last_message_id;
753
754 /* configuration table */
755 struct pmcraid_config_table *cfg_table;
756 dma_addr_t cfg_table_bus_addr;
757
758 /* structures related to command blocks */
759 struct kmem_cache *cmd_cachep; /* cache for cmd blocks */
760 struct pci_pool *control_pool; /* pool for control blocks */
761 char cmd_pool_name[64]; /* name of cmd cache */
762 char ctl_pool_name[64]; /* name of control cache */
763
764 struct pmcraid_cmd *cmd_list[PMCRAID_MAX_CMD];
765
766 struct list_head free_cmd_pool;
767 struct list_head pending_cmd_pool;
768 spinlock_t free_pool_lock; /* free pool lock */
769 spinlock_t pending_pool_lock; /* pending pool lock */
770
771 /* Tasklet to handle deferred processing */
772 struct tasklet_struct isr_tasklet[PMCRAID_NUM_MSIX_VECTORS];
773
774 /* Work-queue (Shared) for deferred reset processing */
775 struct work_struct worker_q;
776
777 /* No of IO commands pending with FW */
778 atomic_t outstanding_cmds;
779
780 /* should add/delete resources to mid-layer now ?*/
781 atomic_t expose_resources;
782
783
784
785 u32 ioa_state:4; /* For IOA Reset sequence FSM */
786 #define IOA_STATE_OPERATIONAL 0x0
787 #define IOA_STATE_UNKNOWN 0x1
788 #define IOA_STATE_DEAD 0x2
789 #define IOA_STATE_IN_SOFT_RESET 0x3
790 #define IOA_STATE_IN_HARD_RESET 0x4
791 #define IOA_STATE_IN_RESET_ALERT 0x5
792 #define IOA_STATE_IN_BRINGDOWN 0x6
793 #define IOA_STATE_IN_BRINGUP 0x7
794
795 u32 ioa_reset_in_progress:1; /* true if IOA reset is in progress */
796 u32 ioa_hard_reset:1; /* TRUE if Hard Reset is needed */
797 u32 ioa_unit_check:1; /* Indicates Unit Check condition */
798 u32 ioa_bringdown:1; /* whether IOA needs to be brought down */
799 u32 force_ioa_reset:1; /* force adapter reset ? */
800 u32 reinit_cfg_table:1; /* reinit config table due to lost CCN */
801 u32 ioa_shutdown_type:2;/* shutdown type used during reset */
802 #define SHUTDOWN_NONE 0x0
803 #define SHUTDOWN_NORMAL 0x1
804 #define SHUTDOWN_ABBREV 0x2
805 u32 timestamp_error:1; /* indicate set timestamp for out of sync */
806
807 };
808
809 /* LLD maintained resource entry structure */
810 struct pmcraid_resource_entry {
811 struct list_head queue; /* link to "to be exposed" resources */
812 union {
813 struct pmcraid_config_table_entry cfg_entry;
814 struct pmcraid_config_table_entry_ext cfg_entry_ext;
815 };
816 struct scsi_device *scsi_dev; /* Link scsi_device structure */
817 atomic_t read_failures; /* count of failed READ commands */
818 atomic_t write_failures; /* count of failed WRITE commands */
819
820 /* To indicate add/delete/modify during CCN */
821 u8 change_detected;
822 #define RES_CHANGE_ADD 0x1 /* add this to mid-layer */
823 #define RES_CHANGE_DEL 0x2 /* remove this from mid-layer */
824
825 u8 reset_progress; /* Device is resetting */
826
827 /*
828 * When IOA asks for sync (i.e. IOASC = Not Ready, Sync Required), this
829 * flag will be set, mid layer will be asked to retry. In the next
830 * attempt, this flag will be checked in queuecommand() to set
831 * SYNC_COMPLETE flag in IOARCB (flag_0).
832 */
833 u8 sync_reqd;
834
835 /* target indicates the mapped target_id assigned to this resource if
836 * this is VSET resource. For non-VSET resources this will be un-used
837 * or zero
838 */
839 u8 target;
840 };
841
842 /* Data structures used in IOASC error code logging */
843 struct pmcraid_ioasc_error {
844 u32 ioasc_code; /* IOASC code */
845 u8 log_level; /* default log level assignment. */
846 char *error_string;
847 };
848
849 /* Initial log_level assignments for various IOASCs */
850 #define IOASC_LOG_LEVEL_NONE 0x0 /* no logging */
851 #define IOASC_LOG_LEVEL_MUST 0x1 /* must log: all high-severity errors */
852 #define IOASC_LOG_LEVEL_HARD 0x2 /* optional – low severity errors */
853
854 /* Error information maintained by LLD. LLD initializes the pmcraid_error_table
855 * statically.
856 */
857 static struct pmcraid_ioasc_error pmcraid_ioasc_error_table[] = {
858 {0x01180600, IOASC_LOG_LEVEL_HARD,
859 "Recovered Error, soft media error, sector reassignment suggested"},
860 {0x015D0000, IOASC_LOG_LEVEL_HARD,
861 "Recovered Error, failure prediction thresold exceeded"},
862 {0x015D9200, IOASC_LOG_LEVEL_HARD,
863 "Recovered Error, soft Cache Card Battery error thresold"},
864 {0x015D9200, IOASC_LOG_LEVEL_HARD,
865 "Recovered Error, soft Cache Card Battery error thresold"},
866 {0x02048000, IOASC_LOG_LEVEL_HARD,
867 "Not Ready, IOA Reset Required"},
868 {0x02408500, IOASC_LOG_LEVEL_HARD,
869 "Not Ready, IOA microcode download required"},
870 {0x03110B00, IOASC_LOG_LEVEL_HARD,
871 "Medium Error, data unreadable, reassignment suggested"},
872 {0x03110C00, IOASC_LOG_LEVEL_MUST,
873 "Medium Error, data unreadable do not reassign"},
874 {0x03310000, IOASC_LOG_LEVEL_HARD,
875 "Medium Error, media corrupted"},
876 {0x04050000, IOASC_LOG_LEVEL_HARD,
877 "Hardware Error, IOA can't communicate with device"},
878 {0x04080000, IOASC_LOG_LEVEL_MUST,
879 "Hardware Error, device bus error"},
880 {0x04088000, IOASC_LOG_LEVEL_MUST,
881 "Hardware Error, device bus is not functioning"},
882 {0x04118000, IOASC_LOG_LEVEL_HARD,
883 "Hardware Error, IOA reserved area data check"},
884 {0x04118100, IOASC_LOG_LEVEL_HARD,
885 "Hardware Error, IOA reserved area invalid data pattern"},
886 {0x04118200, IOASC_LOG_LEVEL_HARD,
887 "Hardware Error, IOA reserved area LRC error"},
888 {0x04320000, IOASC_LOG_LEVEL_HARD,
889 "Hardware Error, reassignment space exhausted"},
890 {0x04330000, IOASC_LOG_LEVEL_HARD,
891 "Hardware Error, data transfer underlength error"},
892 {0x04330000, IOASC_LOG_LEVEL_HARD,
893 "Hardware Error, data transfer overlength error"},
894 {0x04418000, IOASC_LOG_LEVEL_MUST,
895 "Hardware Error, PCI bus error"},
896 {0x04440000, IOASC_LOG_LEVEL_HARD,
897 "Hardware Error, device error"},
898 {0x04448200, IOASC_LOG_LEVEL_MUST,
899 "Hardware Error, IOA error"},
900 {0x04448300, IOASC_LOG_LEVEL_HARD,
901 "Hardware Error, undefined device response"},
902 {0x04448400, IOASC_LOG_LEVEL_HARD,
903 "Hardware Error, IOA microcode error"},
904 {0x04448600, IOASC_LOG_LEVEL_HARD,
905 "Hardware Error, IOA reset required"},
906 {0x04449200, IOASC_LOG_LEVEL_HARD,
907 "Hardware Error, hard Cache Fearuee Card Battery error"},
908 {0x0444A000, IOASC_LOG_LEVEL_HARD,
909 "Hardware Error, failed device altered"},
910 {0x0444A200, IOASC_LOG_LEVEL_HARD,
911 "Hardware Error, data check after reassignment"},
912 {0x0444A300, IOASC_LOG_LEVEL_HARD,
913 "Hardware Error, LRC error after reassignment"},
914 {0x044A0000, IOASC_LOG_LEVEL_HARD,
915 "Hardware Error, device bus error (msg/cmd phase)"},
916 {0x04670400, IOASC_LOG_LEVEL_HARD,
917 "Hardware Error, new device can't be used"},
918 {0x04678000, IOASC_LOG_LEVEL_HARD,
919 "Hardware Error, invalid multiadapter configuration"},
920 {0x04678100, IOASC_LOG_LEVEL_HARD,
921 "Hardware Error, incorrect connection between enclosures"},
922 {0x04678200, IOASC_LOG_LEVEL_HARD,
923 "Hardware Error, connections exceed IOA design limits"},
924 {0x04678300, IOASC_LOG_LEVEL_HARD,
925 "Hardware Error, incorrect multipath connection"},
926 {0x04679000, IOASC_LOG_LEVEL_HARD,
927 "Hardware Error, command to LUN failed"},
928 {0x064C8000, IOASC_LOG_LEVEL_HARD,
929 "Unit Attention, cache exists for missing/failed device"},
930 {0x06670100, IOASC_LOG_LEVEL_HARD,
931 "Unit Attention, incompatible exposed mode device"},
932 {0x06670600, IOASC_LOG_LEVEL_HARD,
933 "Unit Attention, attachment of logical unit failed"},
934 {0x06678000, IOASC_LOG_LEVEL_HARD,
935 "Unit Attention, cables exceed connective design limit"},
936 {0x06678300, IOASC_LOG_LEVEL_HARD,
937 "Unit Attention, incomplete multipath connection between" \
938 "IOA and enclosure"},
939 {0x06678400, IOASC_LOG_LEVEL_HARD,
940 "Unit Attention, incomplete multipath connection between" \
941 "device and enclosure"},
942 {0x06678500, IOASC_LOG_LEVEL_HARD,
943 "Unit Attention, incomplete multipath connection between" \
944 "IOA and remote IOA"},
945 {0x06678600, IOASC_LOG_LEVEL_HARD,
946 "Unit Attention, missing remote IOA"},
947 {0x06679100, IOASC_LOG_LEVEL_HARD,
948 "Unit Attention, enclosure doesn't support required multipath" \
949 "function"},
950 {0x06698200, IOASC_LOG_LEVEL_HARD,
951 "Unit Attention, corrupt array parity detected on device"},
952 {0x066B0200, IOASC_LOG_LEVEL_HARD,
953 "Unit Attention, array exposed"},
954 {0x066B8200, IOASC_LOG_LEVEL_HARD,
955 "Unit Attention, exposed array is still protected"},
956 {0x066B9200, IOASC_LOG_LEVEL_HARD,
957 "Unit Attention, Multipath redundancy level got worse"},
958 {0x07270000, IOASC_LOG_LEVEL_HARD,
959 "Data Protect, device is read/write protected by IOA"},
960 {0x07278000, IOASC_LOG_LEVEL_HARD,
961 "Data Protect, IOA doesn't support device attribute"},
962 {0x07278100, IOASC_LOG_LEVEL_HARD,
963 "Data Protect, NVRAM mirroring prohibited"},
964 {0x07278400, IOASC_LOG_LEVEL_HARD,
965 "Data Protect, array is short 2 or more devices"},
966 {0x07278600, IOASC_LOG_LEVEL_HARD,
967 "Data Protect, exposed array is short a required device"},
968 {0x07278700, IOASC_LOG_LEVEL_HARD,
969 "Data Protect, array members not at required addresses"},
970 {0x07278800, IOASC_LOG_LEVEL_HARD,
971 "Data Protect, exposed mode device resource address conflict"},
972 {0x07278900, IOASC_LOG_LEVEL_HARD,
973 "Data Protect, incorrect resource address of exposed mode device"},
974 {0x07278A00, IOASC_LOG_LEVEL_HARD,
975 "Data Protect, Array is missing a device and parity is out of sync"},
976 {0x07278B00, IOASC_LOG_LEVEL_HARD,
977 "Data Protect, maximum number of arrays already exist"},
978 {0x07278C00, IOASC_LOG_LEVEL_HARD,
979 "Data Protect, cannot locate cache data for device"},
980 {0x07278D00, IOASC_LOG_LEVEL_HARD,
981 "Data Protect, cache data exits for a changed device"},
982 {0x07279100, IOASC_LOG_LEVEL_HARD,
983 "Data Protect, detection of a device requiring format"},
984 {0x07279200, IOASC_LOG_LEVEL_HARD,
985 "Data Protect, IOA exceeds maximum number of devices"},
986 {0x07279600, IOASC_LOG_LEVEL_HARD,
987 "Data Protect, missing array, volume set is not functional"},
988 {0x07279700, IOASC_LOG_LEVEL_HARD,
989 "Data Protect, single device for a volume set"},
990 {0x07279800, IOASC_LOG_LEVEL_HARD,
991 "Data Protect, missing multiple devices for a volume set"},
992 {0x07279900, IOASC_LOG_LEVEL_HARD,
993 "Data Protect, maximum number of volument sets already exists"},
994 {0x07279A00, IOASC_LOG_LEVEL_HARD,
995 "Data Protect, other volume set problem"},
996 };
997
998 /* macros to help in debugging */
999 #define pmcraid_err(...) \
1000 printk(KERN_ERR "MaxRAID: "__VA_ARGS__)
1001
1002 #define pmcraid_info(...) \
1003 if (pmcraid_debug_log) \
1004 printk(KERN_INFO "MaxRAID: "__VA_ARGS__)
1005
1006 /* check if given command is a SCSI READ or SCSI WRITE command */
1007 #define SCSI_READ_CMD 0x1 /* any of SCSI READ commands */
1008 #define SCSI_WRITE_CMD 0x2 /* any of SCSI WRITE commands */
1009 #define SCSI_CMD_TYPE(opcode) \
1010 ({ u8 op = opcode; u8 __type = 0;\
1011 if (op == READ_6 || op == READ_10 || op == READ_12 || op == READ_16)\
1012 __type = SCSI_READ_CMD;\
1013 else if (op == WRITE_6 || op == WRITE_10 || op == WRITE_12 || \
1014 op == WRITE_16)\
1015 __type = SCSI_WRITE_CMD;\
1016 __type;\
1017 })
1018
1019 #define IS_SCSI_READ_WRITE(opcode) \
1020 ({ u8 __type = SCSI_CMD_TYPE(opcode); \
1021 (__type == SCSI_READ_CMD || __type == SCSI_WRITE_CMD) ? 1 : 0;\
1022 })
1023
1024
1025 /*
1026 * pmcraid_ioctl_header - definition of header structure that precedes all the
1027 * buffers given as ioctl arguments.
1028 *
1029 * .signature : always ASCII string, "PMCRAID"
1030 * .reserved : not used
1031 * .buffer_length : length of the buffer following the header
1032 */
1033 struct pmcraid_ioctl_header {
1034 u8 signature[8];
1035 u32 reserved;
1036 u32 buffer_length;
1037 };
1038
1039 #define PMCRAID_IOCTL_SIGNATURE "PMCRAID"
1040
1041 /*
1042 * pmcraid_passthrough_ioctl_buffer - structure given as argument to
1043 * passthrough(or firmware handled) IOCTL commands. Note that ioarcb requires
1044 * 32-byte alignment so, it is necessary to pack this structure to avoid any
1045 * holes between ioctl_header and passthrough buffer
1046 *
1047 * .ioactl_header : ioctl header
1048 * .ioarcb : filled-up ioarcb buffer, driver always reads this buffer
1049 * .ioasa : buffer for ioasa, driver fills this with IOASA from firmware
1050 * .request_buffer: The I/O buffer (flat), driver reads/writes to this based on
1051 * the transfer directions passed in ioarcb.flags0. Contents
1052 * of this buffer are valid only when ioarcb.data_transfer_len
1053 * is not zero.
1054 */
1055 struct pmcraid_passthrough_ioctl_buffer {
1056 struct pmcraid_ioctl_header ioctl_header;
1057 struct pmcraid_ioarcb ioarcb;
1058 struct pmcraid_ioasa ioasa;
1059 u8 request_buffer[1];
1060 } __attribute__ ((packed));
1061
1062 /*
1063 * keys to differentiate between driver handled IOCTLs and passthrough
1064 * IOCTLs passed to IOA. driver determines the ioctl type using macro
1065 * _IOC_TYPE
1066 */
1067 #define PMCRAID_DRIVER_IOCTL 'D'
1068 #define PMCRAID_PASSTHROUGH_IOCTL 'F'
1069
1070 #define DRV_IOCTL(n, size) \
1071 _IOC(_IOC_READ|_IOC_WRITE, PMCRAID_DRIVER_IOCTL, (n), (size))
1072
1073 #define FMW_IOCTL(n, size) \
1074 _IOC(_IOC_READ|_IOC_WRITE, PMCRAID_PASSTHROUGH_IOCTL, (n), (size))
1075
1076 /*
1077 * _ARGSIZE: macro that gives size of the argument type passed to an IOCTL cmd.
1078 * This is to facilitate applications avoiding un-necessary memory allocations.
1079 * For example, most of driver handled ioctls do not require ioarcb, ioasa.
1080 */
1081 #define _ARGSIZE(arg) (sizeof(struct pmcraid_ioctl_header) + sizeof(arg))
1082
1083 /* Driver handled IOCTL command definitions */
1084
1085 #define PMCRAID_IOCTL_RESET_ADAPTER \
1086 DRV_IOCTL(5, sizeof(struct pmcraid_ioctl_header))
1087
1088 /* passthrough/firmware handled commands */
1089 #define PMCRAID_IOCTL_PASSTHROUGH_COMMAND \
1090 FMW_IOCTL(1, sizeof(struct pmcraid_passthrough_ioctl_buffer))
1091
1092 #define PMCRAID_IOCTL_DOWNLOAD_MICROCODE \
1093 FMW_IOCTL(2, sizeof(struct pmcraid_passthrough_ioctl_buffer))
1094
1095
1096 #endif /* _PMCRAID_H */