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QE/FHCI: fixed the CONTROL bug
[zen-stable.git] / drivers / scsi / qla4xxx / ql4_mbx.c
blobfce8289e97525732a02857153b987f1928a2333e
1 /*
2 * QLogic iSCSI HBA Driver
3 * Copyright (c) 2003-2010 QLogic Corporation
4 *
5 * See LICENSE.qla4xxx for copyright and licensing details.
6 */
7
8 #include "ql4_def.h"
9 #include "ql4_glbl.h"
10 #include "ql4_dbg.h"
11 #include "ql4_inline.h"
12
13
14 /**
15 * qla4xxx_mailbox_command - issues mailbox commands
16 * @ha: Pointer to host adapter structure.
17 * @inCount: number of mailbox registers to load.
18 * @outCount: number of mailbox registers to return.
19 * @mbx_cmd: data pointer for mailbox in registers.
20 * @mbx_sts: data pointer for mailbox out registers.
21 *
22 * This routine issue mailbox commands and waits for completion.
23 * If outCount is 0, this routine completes successfully WITHOUT waiting
24 * for the mailbox command to complete.
25 **/
26 int qla4xxx_mailbox_command(struct scsi_qla_host *ha, uint8_t inCount,
27 uint8_t outCount, uint32_t *mbx_cmd,
28 uint32_t *mbx_sts)
29 {
30 int status = QLA_ERROR;
31 uint8_t i;
32 u_long wait_count;
33 uint32_t intr_status;
34 unsigned long flags = 0;
35 uint32_t dev_state;
36
37 /* Make sure that pointers are valid */
38 if (!mbx_cmd || !mbx_sts) {
39 DEBUG2(printk("scsi%ld: %s: Invalid mbx_cmd or mbx_sts "
40 "pointer\n", ha->host_no, __func__));
41 return status;
42 }
43
44 if (is_qla8022(ha)) {
45 if (test_bit(AF_FW_RECOVERY, &ha->flags)) {
46 DEBUG2(ql4_printk(KERN_WARNING, ha, "scsi%ld: %s: "
47 "prematurely completing mbx cmd as firmware "
48 "recovery detected\n", ha->host_no, __func__));
49 return status;
50 }
51 /* Do not send any mbx cmd if h/w is in failed state*/
52 qla4_8xxx_idc_lock(ha);
53 dev_state = qla4_8xxx_rd_32(ha, QLA82XX_CRB_DEV_STATE);
54 qla4_8xxx_idc_unlock(ha);
55 if (dev_state == QLA82XX_DEV_FAILED) {
56 ql4_printk(KERN_WARNING, ha, "scsi%ld: %s: H/W is in "
57 "failed state, do not send any mailbox commands\n",
58 ha->host_no, __func__);
59 return status;
60 }
61 }
62
63 if ((is_aer_supported(ha)) &&
64 (test_bit(AF_PCI_CHANNEL_IO_PERM_FAILURE, &ha->flags))) {
65 DEBUG2(printk(KERN_WARNING "scsi%ld: %s: Perm failure on EEH, "
66 "timeout MBX Exiting.\n", ha->host_no, __func__));
67 return status;
68 }
69
70 /* Mailbox code active */
71 wait_count = MBOX_TOV * 100;
72
73 while (wait_count--) {
74 mutex_lock(&ha->mbox_sem);
75 if (!test_bit(AF_MBOX_COMMAND, &ha->flags)) {
76 set_bit(AF_MBOX_COMMAND, &ha->flags);
77 mutex_unlock(&ha->mbox_sem);
78 break;
79 }
80 mutex_unlock(&ha->mbox_sem);
81 if (!wait_count) {
82 DEBUG2(printk("scsi%ld: %s: mbox_sem failed\n",
83 ha->host_no, __func__));
84 return status;
85 }
86 msleep(10);
87 }
88
89 spin_lock_irqsave(&ha->hardware_lock, flags);
90
91 ha->mbox_status_count = outCount;
92 for (i = 0; i < outCount; i++)
93 ha->mbox_status[i] = 0;
94
95 if (is_qla8022(ha)) {
96 /* Load all mailbox registers, except mailbox 0. */
97 DEBUG5(
98 printk("scsi%ld: %s: Cmd ", ha->host_no, __func__);
99 for (i = 0; i < inCount; i++)
100 printk("mb%d=%04x ", i, mbx_cmd[i]);
101 printk("\n"));
102
103 for (i = 1; i < inCount; i++)
104 writel(mbx_cmd[i], &ha->qla4_8xxx_reg->mailbox_in[i]);
105 writel(mbx_cmd[0], &ha->qla4_8xxx_reg->mailbox_in[0]);
106 readl(&ha->qla4_8xxx_reg->mailbox_in[0]);
107 writel(HINT_MBX_INT_PENDING, &ha->qla4_8xxx_reg->hint);
108 } else {
109 /* Load all mailbox registers, except mailbox 0. */
110 for (i = 1; i < inCount; i++)
111 writel(mbx_cmd[i], &ha->reg->mailbox[i]);
112
113 /* Wakeup firmware */
114 writel(mbx_cmd[0], &ha->reg->mailbox[0]);
115 readl(&ha->reg->mailbox[0]);
116 writel(set_rmask(CSR_INTR_RISC), &ha->reg->ctrl_status);
117 readl(&ha->reg->ctrl_status);
118 }
119
120 spin_unlock_irqrestore(&ha->hardware_lock, flags);
121
122 /* Wait for completion */
123
124 /*
125 * If we don't want status, don't wait for the mailbox command to
126 * complete. For example, MBOX_CMD_RESET_FW doesn't return status,
127 * you must poll the inbound Interrupt Mask for completion.
128 */
129 if (outCount == 0) {
130 status = QLA_SUCCESS;
131 goto mbox_exit;
132 }
133
134 /*
135 * Wait for completion: Poll or completion queue
136 */
137 if (test_bit(AF_IRQ_ATTACHED, &ha->flags) &&
138 test_bit(AF_INTERRUPTS_ON, &ha->flags) &&
139 test_bit(AF_ONLINE, &ha->flags) &&
140 !test_bit(AF_HA_REMOVAL, &ha->flags)) {
141 /* Do not poll for completion. Use completion queue */
142 set_bit(AF_MBOX_COMMAND_NOPOLL, &ha->flags);
143 wait_for_completion_timeout(&ha->mbx_intr_comp, MBOX_TOV * HZ);
144 clear_bit(AF_MBOX_COMMAND_NOPOLL, &ha->flags);
145 } else {
146 /* Poll for command to complete */
147 wait_count = jiffies + MBOX_TOV * HZ;
148 while (test_bit(AF_MBOX_COMMAND_DONE, &ha->flags) == 0) {
149 if (time_after_eq(jiffies, wait_count))
150 break;
151
152 /*
153 * Service the interrupt.
154 * The ISR will save the mailbox status registers
155 * to a temporary storage location in the adapter
156 * structure.
157 */
158
159 spin_lock_irqsave(&ha->hardware_lock, flags);
160 if (is_qla8022(ha)) {
161 intr_status =
162 readl(&ha->qla4_8xxx_reg->host_int);
163 if (intr_status & ISRX_82XX_RISC_INT) {
164 ha->mbox_status_count = outCount;
165 intr_status =
166 readl(&ha->qla4_8xxx_reg->host_status);
167 ha->isp_ops->interrupt_service_routine(
168 ha, intr_status);
169 if (test_bit(AF_INTERRUPTS_ON,
170 &ha->flags) &&
171 test_bit(AF_INTx_ENABLED,
172 &ha->flags))
173 qla4_8xxx_wr_32(ha,
174 ha->nx_legacy_intr.tgt_mask_reg,
175 0xfbff);
176 }
177 } else {
178 intr_status = readl(&ha->reg->ctrl_status);
179 if (intr_status & INTR_PENDING) {
180 /*
181 * Service the interrupt.
182 * The ISR will save the mailbox status
183 * registers to a temporary storage
184 * location in the adapter structure.
185 */
186 ha->mbox_status_count = outCount;
187 ha->isp_ops->interrupt_service_routine(
188 ha, intr_status);
189 }
190 }
191 spin_unlock_irqrestore(&ha->hardware_lock, flags);
192 msleep(10);
193 }
194 }
195
196 /* Check for mailbox timeout. */
197 if (!test_bit(AF_MBOX_COMMAND_DONE, &ha->flags)) {
198 if (is_qla8022(ha) &&
199 test_bit(AF_FW_RECOVERY, &ha->flags)) {
200 DEBUG2(ql4_printk(KERN_INFO, ha,
201 "scsi%ld: %s: prematurely completing mbx cmd as "
202 "firmware recovery detected\n",
203 ha->host_no, __func__));
204 goto mbox_exit;
205 }
206 DEBUG2(printk("scsi%ld: Mailbox Cmd 0x%08X timed out ...,"
207 " Scheduling Adapter Reset\n", ha->host_no,
208 mbx_cmd[0]));
209 ha->mailbox_timeout_count++;
210 mbx_sts[0] = (-1);
211 set_bit(DPC_RESET_HA, &ha->dpc_flags);
212 goto mbox_exit;
213 }
214
215 /*
216 * Copy the mailbox out registers to the caller's mailbox in/out
217 * structure.
218 */
219 spin_lock_irqsave(&ha->hardware_lock, flags);
220 for (i = 0; i < outCount; i++)
221 mbx_sts[i] = ha->mbox_status[i];
222
223 /* Set return status and error flags (if applicable). */
224 switch (ha->mbox_status[0]) {
225 case MBOX_STS_COMMAND_COMPLETE:
226 status = QLA_SUCCESS;
227 break;
228
229 case MBOX_STS_INTERMEDIATE_COMPLETION:
230 status = QLA_SUCCESS;
231 break;
232
233 case MBOX_STS_BUSY:
234 DEBUG2( printk("scsi%ld: %s: Cmd = %08X, ISP BUSY\n",
235 ha->host_no, __func__, mbx_cmd[0]));
236 ha->mailbox_timeout_count++;
237 break;
238
239 default:
240 DEBUG2(printk("scsi%ld: %s: **** FAILED, cmd = %08X, "
241 "sts = %08X ****\n", ha->host_no, __func__,
242 mbx_cmd[0], mbx_sts[0]));
243 break;
244 }
245 spin_unlock_irqrestore(&ha->hardware_lock, flags);
246
247 mbox_exit:
248 mutex_lock(&ha->mbox_sem);
249 clear_bit(AF_MBOX_COMMAND, &ha->flags);
250 mutex_unlock(&ha->mbox_sem);
251 clear_bit(AF_MBOX_COMMAND_DONE, &ha->flags);
252
253 return status;
254 }
255
256 void qla4xxx_mailbox_premature_completion(struct scsi_qla_host *ha)
257 {
258 set_bit(AF_FW_RECOVERY, &ha->flags);
259 ql4_printk(KERN_INFO, ha, "scsi%ld: %s: set FW RECOVERY!\n",
260 ha->host_no, __func__);
261
262 if (test_bit(AF_MBOX_COMMAND, &ha->flags)) {
263 if (test_bit(AF_MBOX_COMMAND_NOPOLL, &ha->flags)) {
264 complete(&ha->mbx_intr_comp);
265 ql4_printk(KERN_INFO, ha, "scsi%ld: %s: Due to fw "
266 "recovery, doing premature completion of "
267 "mbx cmd\n", ha->host_no, __func__);
268
269 } else {
270 set_bit(AF_MBOX_COMMAND_DONE, &ha->flags);
271 ql4_printk(KERN_INFO, ha, "scsi%ld: %s: Due to fw "
272 "recovery, doing premature completion of "
273 "polling mbx cmd\n", ha->host_no, __func__);
274 }
275 }
276 }
277
278 static uint8_t
279 qla4xxx_set_ifcb(struct scsi_qla_host *ha, uint32_t *mbox_cmd,
280 uint32_t *mbox_sts, dma_addr_t init_fw_cb_dma)
281 {
282 memset(mbox_cmd, 0, sizeof(mbox_cmd[0]) * MBOX_REG_COUNT);
283 memset(mbox_sts, 0, sizeof(mbox_sts[0]) * MBOX_REG_COUNT);
284
285 if (is_qla8022(ha))
286 qla4_8xxx_wr_32(ha, ha->nx_db_wr_ptr, 0);
287
288 mbox_cmd[0] = MBOX_CMD_INITIALIZE_FIRMWARE;
289 mbox_cmd[1] = 0;
290 mbox_cmd[2] = LSDW(init_fw_cb_dma);
291 mbox_cmd[3] = MSDW(init_fw_cb_dma);
292 mbox_cmd[4] = sizeof(struct addr_ctrl_blk);
293 mbox_cmd[5] = (IFCB_VER_MAX << 8) | IFCB_VER_MIN;
294
295 if (qla4xxx_mailbox_command(ha, 6, 6, mbox_cmd, mbox_sts) !=
296 QLA_SUCCESS) {
297 DEBUG2(printk(KERN_WARNING "scsi%ld: %s: "
298 "MBOX_CMD_INITIALIZE_FIRMWARE"
299 " failed w/ status %04X\n",
300 ha->host_no, __func__, mbox_sts[0]));
301 return QLA_ERROR;
302 }
303 return QLA_SUCCESS;
304 }
305
306 static uint8_t
307 qla4xxx_get_ifcb(struct scsi_qla_host *ha, uint32_t *mbox_cmd,
308 uint32_t *mbox_sts, dma_addr_t init_fw_cb_dma)
309 {
310 memset(mbox_cmd, 0, sizeof(mbox_cmd[0]) * MBOX_REG_COUNT);
311 memset(mbox_sts, 0, sizeof(mbox_sts[0]) * MBOX_REG_COUNT);
312 mbox_cmd[0] = MBOX_CMD_GET_INIT_FW_CTRL_BLOCK;
313 mbox_cmd[2] = LSDW(init_fw_cb_dma);
314 mbox_cmd[3] = MSDW(init_fw_cb_dma);
315 mbox_cmd[4] = sizeof(struct addr_ctrl_blk);
316
317 if (qla4xxx_mailbox_command(ha, 5, 5, mbox_cmd, mbox_sts) !=
318 QLA_SUCCESS) {
319 DEBUG2(printk(KERN_WARNING "scsi%ld: %s: "
320 "MBOX_CMD_GET_INIT_FW_CTRL_BLOCK"
321 " failed w/ status %04X\n",
322 ha->host_no, __func__, mbox_sts[0]));
323 return QLA_ERROR;
324 }
325 return QLA_SUCCESS;
326 }
327
328 static void
329 qla4xxx_update_local_ip(struct scsi_qla_host *ha,
330 struct addr_ctrl_blk *init_fw_cb)
331 {
332 /* Save IPv4 Address Info */
333 memcpy(ha->ip_address, init_fw_cb->ipv4_addr,
334 min(sizeof(ha->ip_address), sizeof(init_fw_cb->ipv4_addr)));
335 memcpy(ha->subnet_mask, init_fw_cb->ipv4_subnet,
336 min(sizeof(ha->subnet_mask), sizeof(init_fw_cb->ipv4_subnet)));
337 memcpy(ha->gateway, init_fw_cb->ipv4_gw_addr,
338 min(sizeof(ha->gateway), sizeof(init_fw_cb->ipv4_gw_addr)));
339
340 if (is_ipv6_enabled(ha)) {
341 /* Save IPv6 Address */
342 ha->ipv6_link_local_state = init_fw_cb->ipv6_lnk_lcl_addr_state;
343 ha->ipv6_addr0_state = init_fw_cb->ipv6_addr0_state;
344 ha->ipv6_addr1_state = init_fw_cb->ipv6_addr1_state;
345 ha->ipv6_default_router_state = init_fw_cb->ipv6_dflt_rtr_state;
346 ha->ipv6_link_local_addr.in6_u.u6_addr8[0] = 0xFE;
347 ha->ipv6_link_local_addr.in6_u.u6_addr8[1] = 0x80;
348
349 memcpy(&ha->ipv6_link_local_addr.in6_u.u6_addr8[8],
350 init_fw_cb->ipv6_if_id,
351 min(sizeof(ha->ipv6_link_local_addr)/2,
352 sizeof(init_fw_cb->ipv6_if_id)));
353 memcpy(&ha->ipv6_addr0, init_fw_cb->ipv6_addr0,
354 min(sizeof(ha->ipv6_addr0),
355 sizeof(init_fw_cb->ipv6_addr0)));
356 memcpy(&ha->ipv6_addr1, init_fw_cb->ipv6_addr1,
357 min(sizeof(ha->ipv6_addr1),
358 sizeof(init_fw_cb->ipv6_addr1)));
359 memcpy(&ha->ipv6_default_router_addr,
360 init_fw_cb->ipv6_dflt_rtr_addr,
361 min(sizeof(ha->ipv6_default_router_addr),
362 sizeof(init_fw_cb->ipv6_dflt_rtr_addr)));
363 }
364 }
365
366 static uint8_t
367 qla4xxx_update_local_ifcb(struct scsi_qla_host *ha,
368 uint32_t *mbox_cmd,
369 uint32_t *mbox_sts,
370 struct addr_ctrl_blk *init_fw_cb,
371 dma_addr_t init_fw_cb_dma)
372 {
373 if (qla4xxx_get_ifcb(ha, mbox_cmd, mbox_sts, init_fw_cb_dma)
374 != QLA_SUCCESS) {
375 DEBUG2(printk(KERN_WARNING
376 "scsi%ld: %s: Failed to get init_fw_ctrl_blk\n",
377 ha->host_no, __func__));
378 return QLA_ERROR;
379 }
380
381 DEBUG2(qla4xxx_dump_buffer(init_fw_cb, sizeof(struct addr_ctrl_blk)));
382
383 /* Save some info in adapter structure. */
384 ha->acb_version = init_fw_cb->acb_version;
385 ha->firmware_options = le16_to_cpu(init_fw_cb->fw_options);
386 ha->tcp_options = le16_to_cpu(init_fw_cb->ipv4_tcp_opts);
387 ha->ipv4_options = le16_to_cpu(init_fw_cb->ipv4_ip_opts);
388 ha->ipv4_addr_state = le16_to_cpu(init_fw_cb->ipv4_addr_state);
389 ha->heartbeat_interval = init_fw_cb->hb_interval;
390 memcpy(ha->name_string, init_fw_cb->iscsi_name,
391 min(sizeof(ha->name_string),
392 sizeof(init_fw_cb->iscsi_name)));
393 /*memcpy(ha->alias, init_fw_cb->Alias,
394 min(sizeof(ha->alias), sizeof(init_fw_cb->Alias)));*/
395
396 if (ha->acb_version == ACB_SUPPORTED) {
397 ha->ipv6_options = init_fw_cb->ipv6_opts;
398 ha->ipv6_addl_options = init_fw_cb->ipv6_addtl_opts;
399 }
400 qla4xxx_update_local_ip(ha, init_fw_cb);
401
402 return QLA_SUCCESS;
403 }
404
405 /**
406 * qla4xxx_initialize_fw_cb - initializes firmware control block.
407 * @ha: Pointer to host adapter structure.
408 **/
409 int qla4xxx_initialize_fw_cb(struct scsi_qla_host * ha)
410 {
411 struct addr_ctrl_blk *init_fw_cb;
412 dma_addr_t init_fw_cb_dma;
413 uint32_t mbox_cmd[MBOX_REG_COUNT];
414 uint32_t mbox_sts[MBOX_REG_COUNT];
415 int status = QLA_ERROR;
416
417 init_fw_cb = dma_alloc_coherent(&ha->pdev->dev,
418 sizeof(struct addr_ctrl_blk),
419 &init_fw_cb_dma, GFP_KERNEL);
420 if (init_fw_cb == NULL) {
421 DEBUG2(printk("scsi%ld: %s: Unable to alloc init_cb\n",
422 ha->host_no, __func__));
423 goto exit_init_fw_cb_no_free;
424 }
425 memset(init_fw_cb, 0, sizeof(struct addr_ctrl_blk));
426
427 /* Get Initialize Firmware Control Block. */
428 memset(&mbox_cmd, 0, sizeof(mbox_cmd));
429 memset(&mbox_sts, 0, sizeof(mbox_sts));
430
431 if (qla4xxx_get_ifcb(ha, &mbox_cmd[0], &mbox_sts[0], init_fw_cb_dma) !=
432 QLA_SUCCESS) {
433 dma_free_coherent(&ha->pdev->dev,
434 sizeof(struct addr_ctrl_blk),
435 init_fw_cb, init_fw_cb_dma);
436 goto exit_init_fw_cb;
437 }
438
439 /* Initialize request and response queues. */
440 qla4xxx_init_rings(ha);
441
442 /* Fill in the request and response queue information. */
443 init_fw_cb->rqq_consumer_idx = cpu_to_le16(ha->request_out);
444 init_fw_cb->compq_producer_idx = cpu_to_le16(ha->response_in);
445 init_fw_cb->rqq_len = __constant_cpu_to_le16(REQUEST_QUEUE_DEPTH);
446 init_fw_cb->compq_len = __constant_cpu_to_le16(RESPONSE_QUEUE_DEPTH);
447 init_fw_cb->rqq_addr_lo = cpu_to_le32(LSDW(ha->request_dma));
448 init_fw_cb->rqq_addr_hi = cpu_to_le32(MSDW(ha->request_dma));
449 init_fw_cb->compq_addr_lo = cpu_to_le32(LSDW(ha->response_dma));
450 init_fw_cb->compq_addr_hi = cpu_to_le32(MSDW(ha->response_dma));
451 init_fw_cb->shdwreg_addr_lo = cpu_to_le32(LSDW(ha->shadow_regs_dma));
452 init_fw_cb->shdwreg_addr_hi = cpu_to_le32(MSDW(ha->shadow_regs_dma));
453
454 /* Set up required options. */
455 init_fw_cb->fw_options |=
456 __constant_cpu_to_le16(FWOPT_SESSION_MODE |
457 FWOPT_INITIATOR_MODE);
458
459 if (is_qla8022(ha))
460 init_fw_cb->fw_options |=
461 __constant_cpu_to_le16(FWOPT_ENABLE_CRBDB);
462
463 init_fw_cb->fw_options &= __constant_cpu_to_le16(~FWOPT_TARGET_MODE);
464
465 /* Set bit for "serialize task mgmt" all other bits need to be zero */
466 init_fw_cb->add_fw_options = 0;
467 init_fw_cb->add_fw_options |=
468 __constant_cpu_to_le16(SERIALIZE_TASK_MGMT);
469
470 if (qla4xxx_set_ifcb(ha, &mbox_cmd[0], &mbox_sts[0], init_fw_cb_dma)
471 != QLA_SUCCESS) {
472 DEBUG2(printk(KERN_WARNING
473 "scsi%ld: %s: Failed to set init_fw_ctrl_blk\n",
474 ha->host_no, __func__));
475 goto exit_init_fw_cb;
476 }
477
478 if (qla4xxx_update_local_ifcb(ha, &mbox_cmd[0], &mbox_sts[0],
479 init_fw_cb, init_fw_cb_dma) != QLA_SUCCESS) {
480 DEBUG2(printk("scsi%ld: %s: Failed to update local ifcb\n",
481 ha->host_no, __func__));
482 goto exit_init_fw_cb;
483 }
484 status = QLA_SUCCESS;
485
486 exit_init_fw_cb:
487 dma_free_coherent(&ha->pdev->dev, sizeof(struct addr_ctrl_blk),
488 init_fw_cb, init_fw_cb_dma);
489 exit_init_fw_cb_no_free:
490 return status;
491 }
492
493 /**
494 * qla4xxx_get_dhcp_ip_address - gets HBA ip address via DHCP
495 * @ha: Pointer to host adapter structure.
496 **/
497 int qla4xxx_get_dhcp_ip_address(struct scsi_qla_host * ha)
498 {
499 struct addr_ctrl_blk *init_fw_cb;
500 dma_addr_t init_fw_cb_dma;
501 uint32_t mbox_cmd[MBOX_REG_COUNT];
502 uint32_t mbox_sts[MBOX_REG_COUNT];
503
504 init_fw_cb = dma_alloc_coherent(&ha->pdev->dev,
505 sizeof(struct addr_ctrl_blk),
506 &init_fw_cb_dma, GFP_KERNEL);
507 if (init_fw_cb == NULL) {
508 printk("scsi%ld: %s: Unable to alloc init_cb\n", ha->host_no,
509 __func__);
510 return QLA_ERROR;
511 }
512
513 /* Get Initialize Firmware Control Block. */
514 memset(init_fw_cb, 0, sizeof(struct addr_ctrl_blk));
515 if (qla4xxx_get_ifcb(ha, &mbox_cmd[0], &mbox_sts[0], init_fw_cb_dma) !=
516 QLA_SUCCESS) {
517 DEBUG2(printk("scsi%ld: %s: Failed to get init_fw_ctrl_blk\n",
518 ha->host_no, __func__));
519 dma_free_coherent(&ha->pdev->dev,
520 sizeof(struct addr_ctrl_blk),
521 init_fw_cb, init_fw_cb_dma);
522 return QLA_ERROR;
523 }
524
525 /* Save IP Address. */
526 qla4xxx_update_local_ip(ha, init_fw_cb);
527 dma_free_coherent(&ha->pdev->dev, sizeof(struct addr_ctrl_blk),
528 init_fw_cb, init_fw_cb_dma);
529
530 return QLA_SUCCESS;
531 }
532
533 /**
534 * qla4xxx_get_firmware_state - gets firmware state of HBA
535 * @ha: Pointer to host adapter structure.
536 **/
537 int qla4xxx_get_firmware_state(struct scsi_qla_host * ha)
538 {
539 uint32_t mbox_cmd[MBOX_REG_COUNT];
540 uint32_t mbox_sts[MBOX_REG_COUNT];
541
542 /* Get firmware version */
543 memset(&mbox_cmd, 0, sizeof(mbox_cmd));
544 memset(&mbox_sts, 0, sizeof(mbox_sts));
545
546 mbox_cmd[0] = MBOX_CMD_GET_FW_STATE;
547
548 if (qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 4, &mbox_cmd[0], &mbox_sts[0]) !=
549 QLA_SUCCESS) {
550 DEBUG2(printk("scsi%ld: %s: MBOX_CMD_GET_FW_STATE failed w/ "
551 "status %04X\n", ha->host_no, __func__,
552 mbox_sts[0]));
553 return QLA_ERROR;
554 }
555 ha->firmware_state = mbox_sts[1];
556 ha->board_id = mbox_sts[2];
557 ha->addl_fw_state = mbox_sts[3];
558 DEBUG2(printk("scsi%ld: %s firmware_state=0x%x\n",
559 ha->host_no, __func__, ha->firmware_state);)
560
561 return QLA_SUCCESS;
562 }
563
564 /**
565 * qla4xxx_get_firmware_status - retrieves firmware status
566 * @ha: Pointer to host adapter structure.
567 **/
568 int qla4xxx_get_firmware_status(struct scsi_qla_host * ha)
569 {
570 uint32_t mbox_cmd[MBOX_REG_COUNT];
571 uint32_t mbox_sts[MBOX_REG_COUNT];
572
573 /* Get firmware version */
574 memset(&mbox_cmd, 0, sizeof(mbox_cmd));
575 memset(&mbox_sts, 0, sizeof(mbox_sts));
576
577 mbox_cmd[0] = MBOX_CMD_GET_FW_STATUS;
578
579 if (qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 3, &mbox_cmd[0], &mbox_sts[0]) !=
580 QLA_SUCCESS) {
581 DEBUG2(printk("scsi%ld: %s: MBOX_CMD_GET_FW_STATUS failed w/ "
582 "status %04X\n", ha->host_no, __func__,
583 mbox_sts[0]));
584 return QLA_ERROR;
585 }
586
587 ql4_printk(KERN_INFO, ha, "%ld firmare IOCBs available (%d).\n",
588 ha->host_no, mbox_sts[2]);
589
590 return QLA_SUCCESS;
591 }
592
593 /**
594 * qla4xxx_get_fwddb_entry - retrieves firmware ddb entry
595 * @ha: Pointer to host adapter structure.
596 * @fw_ddb_index: Firmware's device database index
597 * @fw_ddb_entry: Pointer to firmware's device database entry structure
598 * @num_valid_ddb_entries: Pointer to number of valid ddb entries
599 * @next_ddb_index: Pointer to next valid device database index
600 * @fw_ddb_device_state: Pointer to device state
601 **/
602 int qla4xxx_get_fwddb_entry(struct scsi_qla_host *ha,
603 uint16_t fw_ddb_index,
604 struct dev_db_entry *fw_ddb_entry,
605 dma_addr_t fw_ddb_entry_dma,
606 uint32_t *num_valid_ddb_entries,
607 uint32_t *next_ddb_index,
608 uint32_t *fw_ddb_device_state,
609 uint32_t *conn_err_detail,
610 uint16_t *tcp_source_port_num,
611 uint16_t *connection_id)
612 {
613 int status = QLA_ERROR;
614 uint16_t options;
615 uint32_t mbox_cmd[MBOX_REG_COUNT];
616 uint32_t mbox_sts[MBOX_REG_COUNT];
617
618 /* Make sure the device index is valid */
619 if (fw_ddb_index >= MAX_DDB_ENTRIES) {
620 DEBUG2(printk("scsi%ld: %s: ddb [%d] out of range.\n",
621 ha->host_no, __func__, fw_ddb_index));
622 goto exit_get_fwddb;
623 }
624 memset(&mbox_cmd, 0, sizeof(mbox_cmd));
625 memset(&mbox_sts, 0, sizeof(mbox_sts));
626
627 mbox_cmd[0] = MBOX_CMD_GET_DATABASE_ENTRY;
628 mbox_cmd[1] = (uint32_t) fw_ddb_index;
629 mbox_cmd[2] = LSDW(fw_ddb_entry_dma);
630 mbox_cmd[3] = MSDW(fw_ddb_entry_dma);
631 mbox_cmd[4] = sizeof(struct dev_db_entry);
632
633 if (qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 7, &mbox_cmd[0], &mbox_sts[0]) ==
634 QLA_ERROR) {
635 DEBUG2(printk("scsi%ld: %s: MBOX_CMD_GET_DATABASE_ENTRY failed"
636 " with status 0x%04X\n", ha->host_no, __func__,
637 mbox_sts[0]));
638 goto exit_get_fwddb;
639 }
640 if (fw_ddb_index != mbox_sts[1]) {
641 DEBUG2(printk("scsi%ld: %s: ddb mismatch [%d] != [%d].\n",
642 ha->host_no, __func__, fw_ddb_index,
643 mbox_sts[1]));
644 goto exit_get_fwddb;
645 }
646 if (fw_ddb_entry) {
647 options = le16_to_cpu(fw_ddb_entry->options);
648 if (options & DDB_OPT_IPV6_DEVICE) {
649 ql4_printk(KERN_INFO, ha, "%s: DDB[%d] MB0 %04x Tot %d "
650 "Next %d State %04x ConnErr %08x %pI6 "
651 ":%04d \"%s\"\n", __func__, fw_ddb_index,
652 mbox_sts[0], mbox_sts[2], mbox_sts[3],
653 mbox_sts[4], mbox_sts[5],
654 fw_ddb_entry->ip_addr,
655 le16_to_cpu(fw_ddb_entry->port),
656 fw_ddb_entry->iscsi_name);
657 } else {
658 ql4_printk(KERN_INFO, ha, "%s: DDB[%d] MB0 %04x Tot %d "
659 "Next %d State %04x ConnErr %08x %pI4 "
660 ":%04d \"%s\"\n", __func__, fw_ddb_index,
661 mbox_sts[0], mbox_sts[2], mbox_sts[3],
662 mbox_sts[4], mbox_sts[5],
663 fw_ddb_entry->ip_addr,
664 le16_to_cpu(fw_ddb_entry->port),
665 fw_ddb_entry->iscsi_name);
666 }
667 }
668 if (num_valid_ddb_entries)
669 *num_valid_ddb_entries = mbox_sts[2];
670 if (next_ddb_index)
671 *next_ddb_index = mbox_sts[3];
672 if (fw_ddb_device_state)
673 *fw_ddb_device_state = mbox_sts[4];
674
675 /*
676 * RA: This mailbox has been changed to pass connection error and
677 * details. Its true for ISP4010 as per Version E - Not sure when it
678 * was changed. Get the time2wait from the fw_dd_entry field :
679 * default_time2wait which we call it as minTime2Wait DEV_DB_ENTRY
680 * struct.
681 */
682 if (conn_err_detail)
683 *conn_err_detail = mbox_sts[5];
684 if (tcp_source_port_num)
685 *tcp_source_port_num = (uint16_t) (mbox_sts[6] >> 16);
686 if (connection_id)
687 *connection_id = (uint16_t) mbox_sts[6] & 0x00FF;
688 status = QLA_SUCCESS;
689
690 exit_get_fwddb:
691 return status;
692 }
693
694 /**
695 * qla4xxx_set_fwddb_entry - sets a ddb entry.
696 * @ha: Pointer to host adapter structure.
697 * @fw_ddb_index: Firmware's device database index
698 * @fw_ddb_entry: Pointer to firmware's ddb entry structure, or NULL.
699 *
700 * This routine initializes or updates the adapter's device database
701 * entry for the specified device. It also triggers a login for the
702 * specified device. Therefore, it may also be used as a secondary
703 * login routine when a NULL pointer is specified for the fw_ddb_entry.
704 **/
705 int qla4xxx_set_ddb_entry(struct scsi_qla_host * ha, uint16_t fw_ddb_index,
706 dma_addr_t fw_ddb_entry_dma)
707 {
708 uint32_t mbox_cmd[MBOX_REG_COUNT];
709 uint32_t mbox_sts[MBOX_REG_COUNT];
710 int status;
711
712 /* Do not wait for completion. The firmware will send us an
713 * ASTS_DATABASE_CHANGED (0x8014) to notify us of the login status.
714 */
715 memset(&mbox_cmd, 0, sizeof(mbox_cmd));
716 memset(&mbox_sts, 0, sizeof(mbox_sts));
717
718 mbox_cmd[0] = MBOX_CMD_SET_DATABASE_ENTRY;
719 mbox_cmd[1] = (uint32_t) fw_ddb_index;
720 mbox_cmd[2] = LSDW(fw_ddb_entry_dma);
721 mbox_cmd[3] = MSDW(fw_ddb_entry_dma);
722 mbox_cmd[4] = sizeof(struct dev_db_entry);
723
724 status = qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 5, &mbox_cmd[0],
725 &mbox_sts[0]);
726 DEBUG2(printk("scsi%ld: %s: status=%d mbx0=0x%x mbx4=0x%x\n",
727 ha->host_no, __func__, status, mbox_sts[0], mbox_sts[4]);)
728
729 return status;
730 }
731
732 /**
733 * qla4xxx_get_crash_record - retrieves crash record.
734 * @ha: Pointer to host adapter structure.
735 *
736 * This routine retrieves a crash record from the QLA4010 after an 8002h aen.
737 **/
738 void qla4xxx_get_crash_record(struct scsi_qla_host * ha)
739 {
740 uint32_t mbox_cmd[MBOX_REG_COUNT];
741 uint32_t mbox_sts[MBOX_REG_COUNT];
742 struct crash_record *crash_record = NULL;
743 dma_addr_t crash_record_dma = 0;
744 uint32_t crash_record_size = 0;
745
746 memset(&mbox_cmd, 0, sizeof(mbox_cmd));
747 memset(&mbox_sts, 0, sizeof(mbox_cmd));
748
749 /* Get size of crash record. */
750 mbox_cmd[0] = MBOX_CMD_GET_CRASH_RECORD;
751
752 if (qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 5, &mbox_cmd[0], &mbox_sts[0]) !=
753 QLA_SUCCESS) {
754 DEBUG2(printk("scsi%ld: %s: ERROR: Unable to retrieve size!\n",
755 ha->host_no, __func__));
756 goto exit_get_crash_record;
757 }
758 crash_record_size = mbox_sts[4];
759 if (crash_record_size == 0) {
760 DEBUG2(printk("scsi%ld: %s: ERROR: Crash record size is 0!\n",
761 ha->host_no, __func__));
762 goto exit_get_crash_record;
763 }
764
765 /* Alloc Memory for Crash Record. */
766 crash_record = dma_alloc_coherent(&ha->pdev->dev, crash_record_size,
767 &crash_record_dma, GFP_KERNEL);
768 if (crash_record == NULL)
769 goto exit_get_crash_record;
770
771 /* Get Crash Record. */
772 memset(&mbox_cmd, 0, sizeof(mbox_cmd));
773 memset(&mbox_sts, 0, sizeof(mbox_cmd));
774
775 mbox_cmd[0] = MBOX_CMD_GET_CRASH_RECORD;
776 mbox_cmd[2] = LSDW(crash_record_dma);
777 mbox_cmd[3] = MSDW(crash_record_dma);
778 mbox_cmd[4] = crash_record_size;
779
780 if (qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 5, &mbox_cmd[0], &mbox_sts[0]) !=
781 QLA_SUCCESS)
782 goto exit_get_crash_record;
783
784 /* Dump Crash Record. */
785
786 exit_get_crash_record:
787 if (crash_record)
788 dma_free_coherent(&ha->pdev->dev, crash_record_size,
789 crash_record, crash_record_dma);
790 }
791
792 /**
793 * qla4xxx_get_conn_event_log - retrieves connection event log
794 * @ha: Pointer to host adapter structure.
795 **/
796 void qla4xxx_get_conn_event_log(struct scsi_qla_host * ha)
797 {
798 uint32_t mbox_cmd[MBOX_REG_COUNT];
799 uint32_t mbox_sts[MBOX_REG_COUNT];
800 struct conn_event_log_entry *event_log = NULL;
801 dma_addr_t event_log_dma = 0;
802 uint32_t event_log_size = 0;
803 uint32_t num_valid_entries;
804 uint32_t oldest_entry = 0;
805 uint32_t max_event_log_entries;
806 uint8_t i;
807
808
809 memset(&mbox_cmd, 0, sizeof(mbox_cmd));
810 memset(&mbox_sts, 0, sizeof(mbox_cmd));
811
812 /* Get size of crash record. */
813 mbox_cmd[0] = MBOX_CMD_GET_CONN_EVENT_LOG;
814
815 if (qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 5, &mbox_cmd[0], &mbox_sts[0]) !=
816 QLA_SUCCESS)
817 goto exit_get_event_log;
818
819 event_log_size = mbox_sts[4];
820 if (event_log_size == 0)
821 goto exit_get_event_log;
822
823 /* Alloc Memory for Crash Record. */
824 event_log = dma_alloc_coherent(&ha->pdev->dev, event_log_size,
825 &event_log_dma, GFP_KERNEL);
826 if (event_log == NULL)
827 goto exit_get_event_log;
828
829 /* Get Crash Record. */
830 memset(&mbox_cmd, 0, sizeof(mbox_cmd));
831 memset(&mbox_sts, 0, sizeof(mbox_cmd));
832
833 mbox_cmd[0] = MBOX_CMD_GET_CONN_EVENT_LOG;
834 mbox_cmd[2] = LSDW(event_log_dma);
835 mbox_cmd[3] = MSDW(event_log_dma);
836
837 if (qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 5, &mbox_cmd[0], &mbox_sts[0]) !=
838 QLA_SUCCESS) {
839 DEBUG2(printk("scsi%ld: %s: ERROR: Unable to retrieve event "
840 "log!\n", ha->host_no, __func__));
841 goto exit_get_event_log;
842 }
843
844 /* Dump Event Log. */
845 num_valid_entries = mbox_sts[1];
846
847 max_event_log_entries = event_log_size /
848 sizeof(struct conn_event_log_entry);
849
850 if (num_valid_entries > max_event_log_entries)
851 oldest_entry = num_valid_entries % max_event_log_entries;
852
853 DEBUG3(printk("scsi%ld: Connection Event Log Dump (%d entries):\n",
854 ha->host_no, num_valid_entries));
855
856 if (ql4xextended_error_logging == 3) {
857 if (oldest_entry == 0) {
858 /* Circular Buffer has not wrapped around */
859 for (i=0; i < num_valid_entries; i++) {
860 qla4xxx_dump_buffer((uint8_t *)event_log+
861 (i*sizeof(*event_log)),
862 sizeof(*event_log));
863 }
864 }
865 else {
866 /* Circular Buffer has wrapped around -
867 * display accordingly*/
868 for (i=oldest_entry; i < max_event_log_entries; i++) {
869 qla4xxx_dump_buffer((uint8_t *)event_log+
870 (i*sizeof(*event_log)),
871 sizeof(*event_log));
872 }
873 for (i=0; i < oldest_entry; i++) {
874 qla4xxx_dump_buffer((uint8_t *)event_log+
875 (i*sizeof(*event_log)),
876 sizeof(*event_log));
877 }
878 }
879 }
880
881 exit_get_event_log:
882 if (event_log)
883 dma_free_coherent(&ha->pdev->dev, event_log_size, event_log,
884 event_log_dma);
885 }
886
887 /**
888 * qla4xxx_abort_task - issues Abort Task
889 * @ha: Pointer to host adapter structure.
890 * @srb: Pointer to srb entry
891 *
892 * This routine performs a LUN RESET on the specified target/lun.
893 * The caller must ensure that the ddb_entry and lun_entry pointers
894 * are valid before calling this routine.
895 **/
896 int qla4xxx_abort_task(struct scsi_qla_host *ha, struct srb *srb)
897 {
898 uint32_t mbox_cmd[MBOX_REG_COUNT];
899 uint32_t mbox_sts[MBOX_REG_COUNT];
900 struct scsi_cmnd *cmd = srb->cmd;
901 int status = QLA_SUCCESS;
902 unsigned long flags = 0;
903 uint32_t index;
904
905 /*
906 * Send abort task command to ISP, so that the ISP will return
907 * request with ABORT status
908 */
909 memset(&mbox_cmd, 0, sizeof(mbox_cmd));
910 memset(&mbox_sts, 0, sizeof(mbox_sts));
911
912 spin_lock_irqsave(&ha->hardware_lock, flags);
913 index = (unsigned long)(unsigned char *)cmd->host_scribble;
914 spin_unlock_irqrestore(&ha->hardware_lock, flags);
915
916 /* Firmware already posted completion on response queue */
917 if (index == MAX_SRBS)
918 return status;
919
920 mbox_cmd[0] = MBOX_CMD_ABORT_TASK;
921 mbox_cmd[1] = srb->ddb->fw_ddb_index;
922 mbox_cmd[2] = index;
923 /* Immediate Command Enable */
924 mbox_cmd[5] = 0x01;
925
926 qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 5, &mbox_cmd[0],
927 &mbox_sts[0]);
928 if (mbox_sts[0] != MBOX_STS_COMMAND_COMPLETE) {
929 status = QLA_ERROR;
930
931 DEBUG2(printk(KERN_WARNING "scsi%ld:%d:%d: abort task FAILED: "
932 "mbx0=%04X, mb1=%04X, mb2=%04X, mb3=%04X, mb4=%04X\n",
933 ha->host_no, cmd->device->id, cmd->device->lun, mbox_sts[0],
934 mbox_sts[1], mbox_sts[2], mbox_sts[3], mbox_sts[4]));
935 }
936
937 return status;
938 }
939
940 /**
941 * qla4xxx_reset_lun - issues LUN Reset
942 * @ha: Pointer to host adapter structure.
943 * @ddb_entry: Pointer to device database entry
944 * @lun: lun number
945 *
946 * This routine performs a LUN RESET on the specified target/lun.
947 * The caller must ensure that the ddb_entry and lun_entry pointers
948 * are valid before calling this routine.
949 **/
950 int qla4xxx_reset_lun(struct scsi_qla_host * ha, struct ddb_entry * ddb_entry,
951 int lun)
952 {
953 uint32_t mbox_cmd[MBOX_REG_COUNT];
954 uint32_t mbox_sts[MBOX_REG_COUNT];
955 int status = QLA_SUCCESS;
956
957 DEBUG2(printk("scsi%ld:%d:%d: lun reset issued\n", ha->host_no,
958 ddb_entry->fw_ddb_index, lun));
959
960 /*
961 * Send lun reset command to ISP, so that the ISP will return all
962 * outstanding requests with RESET status
963 */
964 memset(&mbox_cmd, 0, sizeof(mbox_cmd));
965 memset(&mbox_sts, 0, sizeof(mbox_sts));
966
967 mbox_cmd[0] = MBOX_CMD_LUN_RESET;
968 mbox_cmd[1] = ddb_entry->fw_ddb_index;
969 mbox_cmd[2] = lun << 8;
970 mbox_cmd[5] = 0x01; /* Immediate Command Enable */
971
972 qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 1, &mbox_cmd[0], &mbox_sts[0]);
973 if (mbox_sts[0] != MBOX_STS_COMMAND_COMPLETE &&
974 mbox_sts[0] != MBOX_STS_COMMAND_ERROR)
975 status = QLA_ERROR;
976
977 return status;
978 }
979
980 /**
981 * qla4xxx_reset_target - issues target Reset
982 * @ha: Pointer to host adapter structure.
983 * @db_entry: Pointer to device database entry
984 * @un_entry: Pointer to lun entry structure
985 *
986 * This routine performs a TARGET RESET on the specified target.
987 * The caller must ensure that the ddb_entry pointers
988 * are valid before calling this routine.
989 **/
990 int qla4xxx_reset_target(struct scsi_qla_host *ha,
991 struct ddb_entry *ddb_entry)
992 {
993 uint32_t mbox_cmd[MBOX_REG_COUNT];
994 uint32_t mbox_sts[MBOX_REG_COUNT];
995 int status = QLA_SUCCESS;
996
997 DEBUG2(printk("scsi%ld:%d: target reset issued\n", ha->host_no,
998 ddb_entry->fw_ddb_index));
999
1000 /*
1001 * Send target reset command to ISP, so that the ISP will return all
1002 * outstanding requests with RESET status
1003 */
1004 memset(&mbox_cmd, 0, sizeof(mbox_cmd));
1005 memset(&mbox_sts, 0, sizeof(mbox_sts));
1006
1007 mbox_cmd[0] = MBOX_CMD_TARGET_WARM_RESET;
1008 mbox_cmd[1] = ddb_entry->fw_ddb_index;
1009 mbox_cmd[5] = 0x01; /* Immediate Command Enable */
1010
1011 qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 1, &mbox_cmd[0],
1012 &mbox_sts[0]);
1013 if (mbox_sts[0] != MBOX_STS_COMMAND_COMPLETE &&
1014 mbox_sts[0] != MBOX_STS_COMMAND_ERROR)
1015 status = QLA_ERROR;
1016
1017 return status;
1018 }
1019
1020 int qla4xxx_get_flash(struct scsi_qla_host * ha, dma_addr_t dma_addr,
1021 uint32_t offset, uint32_t len)
1022 {
1023 uint32_t mbox_cmd[MBOX_REG_COUNT];
1024 uint32_t mbox_sts[MBOX_REG_COUNT];
1025
1026 memset(&mbox_cmd, 0, sizeof(mbox_cmd));
1027 memset(&mbox_sts, 0, sizeof(mbox_sts));
1028
1029 mbox_cmd[0] = MBOX_CMD_READ_FLASH;
1030 mbox_cmd[1] = LSDW(dma_addr);
1031 mbox_cmd[2] = MSDW(dma_addr);
1032 mbox_cmd[3] = offset;
1033 mbox_cmd[4] = len;
1034
1035 if (qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 2, &mbox_cmd[0], &mbox_sts[0]) !=
1036 QLA_SUCCESS) {
1037 DEBUG2(printk("scsi%ld: %s: MBOX_CMD_READ_FLASH, failed w/ "
1038 "status %04X %04X, offset %08x, len %08x\n", ha->host_no,
1039 __func__, mbox_sts[0], mbox_sts[1], offset, len));
1040 return QLA_ERROR;
1041 }
1042 return QLA_SUCCESS;
1043 }
1044
1045 /**
1046 * qla4xxx_about_firmware - gets FW, iscsi draft and boot loader version
1047 * @ha: Pointer to host adapter structure.
1048 *
1049 * Retrieves the FW version, iSCSI draft version & bootloader version of HBA.
1050 * Mailboxes 2 & 3 may hold an address for data. Make sure that we write 0 to
1051 * those mailboxes, if unused.
1052 **/
1053 int qla4xxx_about_firmware(struct scsi_qla_host *ha)
1054 {
1055 struct about_fw_info *about_fw = NULL;
1056 dma_addr_t about_fw_dma;
1057 uint32_t mbox_cmd[MBOX_REG_COUNT];
1058 uint32_t mbox_sts[MBOX_REG_COUNT];
1059 int status = QLA_ERROR;
1060
1061 about_fw = dma_alloc_coherent(&ha->pdev->dev,
1062 sizeof(struct about_fw_info),
1063 &about_fw_dma, GFP_KERNEL);
1064 if (!about_fw) {
1065 DEBUG2(ql4_printk(KERN_ERR, ha, "%s: Unable to alloc memory "
1066 "for about_fw\n", __func__));
1067 return status;
1068 }
1069
1070 memset(about_fw, 0, sizeof(struct about_fw_info));
1071 memset(&mbox_cmd, 0, sizeof(mbox_cmd));
1072 memset(&mbox_sts, 0, sizeof(mbox_sts));
1073
1074 mbox_cmd[0] = MBOX_CMD_ABOUT_FW;
1075 mbox_cmd[2] = LSDW(about_fw_dma);
1076 mbox_cmd[3] = MSDW(about_fw_dma);
1077 mbox_cmd[4] = sizeof(struct about_fw_info);
1078
1079 status = qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, MBOX_REG_COUNT,
1080 &mbox_cmd[0], &mbox_sts[0]);
1081 if (status != QLA_SUCCESS) {
1082 DEBUG2(ql4_printk(KERN_WARNING, ha, "%s: MBOX_CMD_ABOUT_FW "
1083 "failed w/ status %04X\n", __func__,
1084 mbox_sts[0]));
1085 goto exit_about_fw;
1086 }
1087
1088 /* Save version information. */
1089 ha->firmware_version[0] = le16_to_cpu(about_fw->fw_major);
1090 ha->firmware_version[1] = le16_to_cpu(about_fw->fw_minor);
1091 ha->patch_number = le16_to_cpu(about_fw->fw_patch);
1092 ha->build_number = le16_to_cpu(about_fw->fw_build);
1093 ha->iscsi_major = le16_to_cpu(about_fw->iscsi_major);
1094 ha->iscsi_minor = le16_to_cpu(about_fw->iscsi_minor);
1095 ha->bootload_major = le16_to_cpu(about_fw->bootload_major);
1096 ha->bootload_minor = le16_to_cpu(about_fw->bootload_minor);
1097 ha->bootload_patch = le16_to_cpu(about_fw->bootload_patch);
1098 ha->bootload_build = le16_to_cpu(about_fw->bootload_build);
1099 status = QLA_SUCCESS;
1100
1101 exit_about_fw:
1102 dma_free_coherent(&ha->pdev->dev, sizeof(struct about_fw_info),
1103 about_fw, about_fw_dma);
1104 return status;
1105 }
1106
1107 static int qla4xxx_get_default_ddb(struct scsi_qla_host *ha,
1108 dma_addr_t dma_addr)
1109 {
1110 uint32_t mbox_cmd[MBOX_REG_COUNT];
1111 uint32_t mbox_sts[MBOX_REG_COUNT];
1112
1113 memset(&mbox_cmd, 0, sizeof(mbox_cmd));
1114 memset(&mbox_sts, 0, sizeof(mbox_sts));
1115
1116 mbox_cmd[0] = MBOX_CMD_GET_DATABASE_ENTRY_DEFAULTS;
1117 mbox_cmd[2] = LSDW(dma_addr);
1118 mbox_cmd[3] = MSDW(dma_addr);
1119
1120 if (qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 1, &mbox_cmd[0], &mbox_sts[0]) !=
1121 QLA_SUCCESS) {
1122 DEBUG2(printk("scsi%ld: %s: failed status %04X\n",
1123 ha->host_no, __func__, mbox_sts[0]));
1124 return QLA_ERROR;
1125 }
1126 return QLA_SUCCESS;
1127 }
1128
1129 static int qla4xxx_req_ddb_entry(struct scsi_qla_host *ha, uint32_t *ddb_index)
1130 {
1131 uint32_t mbox_cmd[MBOX_REG_COUNT];
1132 uint32_t mbox_sts[MBOX_REG_COUNT];
1133
1134 memset(&mbox_cmd, 0, sizeof(mbox_cmd));
1135 memset(&mbox_sts, 0, sizeof(mbox_sts));
1136
1137 mbox_cmd[0] = MBOX_CMD_REQUEST_DATABASE_ENTRY;
1138 mbox_cmd[1] = MAX_PRST_DEV_DB_ENTRIES;
1139
1140 if (qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 3, &mbox_cmd[0], &mbox_sts[0]) !=
1141 QLA_SUCCESS) {
1142 if (mbox_sts[0] == MBOX_STS_COMMAND_ERROR) {
1143 *ddb_index = mbox_sts[2];
1144 } else {
1145 DEBUG2(printk("scsi%ld: %s: failed status %04X\n",
1146 ha->host_no, __func__, mbox_sts[0]));
1147 return QLA_ERROR;
1148 }
1149 } else {
1150 *ddb_index = MAX_PRST_DEV_DB_ENTRIES;
1151 }
1152
1153 return QLA_SUCCESS;
1154 }
1155
1156
1157 int qla4xxx_send_tgts(struct scsi_qla_host *ha, char *ip, uint16_t port)
1158 {
1159 struct dev_db_entry *fw_ddb_entry;
1160 dma_addr_t fw_ddb_entry_dma;
1161 uint32_t ddb_index;
1162 int ret_val = QLA_SUCCESS;
1163
1164
1165 fw_ddb_entry = dma_alloc_coherent(&ha->pdev->dev,
1166 sizeof(*fw_ddb_entry),
1167 &fw_ddb_entry_dma, GFP_KERNEL);
1168 if (!fw_ddb_entry) {
1169 DEBUG2(printk("scsi%ld: %s: Unable to allocate dma buffer.\n",
1170 ha->host_no, __func__));
1171 ret_val = QLA_ERROR;
1172 goto exit_send_tgts_no_free;
1173 }
1174
1175 ret_val = qla4xxx_get_default_ddb(ha, fw_ddb_entry_dma);
1176 if (ret_val != QLA_SUCCESS)
1177 goto exit_send_tgts;
1178
1179 ret_val = qla4xxx_req_ddb_entry(ha, &ddb_index);
1180 if (ret_val != QLA_SUCCESS)
1181 goto exit_send_tgts;
1182
1183 memset(fw_ddb_entry->iscsi_alias, 0,
1184 sizeof(fw_ddb_entry->iscsi_alias));
1185
1186 memset(fw_ddb_entry->iscsi_name, 0,
1187 sizeof(fw_ddb_entry->iscsi_name));
1188
1189 memset(fw_ddb_entry->ip_addr, 0, sizeof(fw_ddb_entry->ip_addr));
1190 memset(fw_ddb_entry->tgt_addr, 0,
1191 sizeof(fw_ddb_entry->tgt_addr));
1192
1193 fw_ddb_entry->options = (DDB_OPT_DISC_SESSION | DDB_OPT_TARGET);
1194 fw_ddb_entry->port = cpu_to_le16(ntohs(port));
1195
1196 fw_ddb_entry->ip_addr[0] = *ip;
1197 fw_ddb_entry->ip_addr[1] = *(ip + 1);
1198 fw_ddb_entry->ip_addr[2] = *(ip + 2);
1199 fw_ddb_entry->ip_addr[3] = *(ip + 3);
1200
1201 ret_val = qla4xxx_set_ddb_entry(ha, ddb_index, fw_ddb_entry_dma);
1202
1203 exit_send_tgts:
1204 dma_free_coherent(&ha->pdev->dev, sizeof(*fw_ddb_entry),
1205 fw_ddb_entry, fw_ddb_entry_dma);
1206 exit_send_tgts_no_free:
1207 return ret_val;
1208 }
1209