aufs: policies for multiple writable branches, from aufs2.2-3.0
[zen-stable.git] / drivers / rtc / rtc-sa1100.c
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1 /*
2 * Real Time Clock interface for StrongARM SA1x00 and XScale PXA2xx
4 * Copyright (c) 2000 Nils Faerber
6 * Based on rtc.c by Paul Gortmaker
8 * Original Driver by Nils Faerber <nils@kernelconcepts.de>
10 * Modifications from:
11 * CIH <cih@coventive.com>
12 * Nicolas Pitre <nico@fluxnic.net>
13 * Andrew Christian <andrew.christian@hp.com>
15 * Converted to the RTC subsystem and Driver Model
16 * by Richard Purdie <rpurdie@rpsys.net>
18 * This program is free software; you can redistribute it and/or
19 * modify it under the terms of the GNU General Public License
20 * as published by the Free Software Foundation; either version
21 * 2 of the License, or (at your option) any later version.
24 #include <linux/platform_device.h>
25 #include <linux/module.h>
26 #include <linux/rtc.h>
27 #include <linux/init.h>
28 #include <linux/fs.h>
29 #include <linux/interrupt.h>
30 #include <linux/string.h>
31 #include <linux/pm.h>
32 #include <linux/bitops.h>
34 #include <mach/hardware.h>
35 #include <asm/irq.h>
37 #ifdef CONFIG_ARCH_PXA
38 #include <mach/regs-rtc.h>
39 #endif
41 #define RTC_DEF_DIVIDER (32768 - 1)
42 #define RTC_DEF_TRIM 0
44 static const unsigned long RTC_FREQ = 1024;
45 static struct rtc_time rtc_alarm;
46 static DEFINE_SPINLOCK(sa1100_rtc_lock);
48 static inline int rtc_periodic_alarm(struct rtc_time *tm)
50 return (tm->tm_year == -1) ||
51 ((unsigned)tm->tm_mon >= 12) ||
52 ((unsigned)(tm->tm_mday - 1) >= 31) ||
53 ((unsigned)tm->tm_hour > 23) ||
54 ((unsigned)tm->tm_min > 59) ||
55 ((unsigned)tm->tm_sec > 59);
59 * Calculate the next alarm time given the requested alarm time mask
60 * and the current time.
62 static void rtc_next_alarm_time(struct rtc_time *next, struct rtc_time *now,
63 struct rtc_time *alrm)
65 unsigned long next_time;
66 unsigned long now_time;
68 next->tm_year = now->tm_year;
69 next->tm_mon = now->tm_mon;
70 next->tm_mday = now->tm_mday;
71 next->tm_hour = alrm->tm_hour;
72 next->tm_min = alrm->tm_min;
73 next->tm_sec = alrm->tm_sec;
75 rtc_tm_to_time(now, &now_time);
76 rtc_tm_to_time(next, &next_time);
78 if (next_time < now_time) {
79 /* Advance one day */
80 next_time += 60 * 60 * 24;
81 rtc_time_to_tm(next_time, next);
85 static int rtc_update_alarm(struct rtc_time *alrm)
87 struct rtc_time alarm_tm, now_tm;
88 unsigned long now, time;
89 int ret;
91 do {
92 now = RCNR;
93 rtc_time_to_tm(now, &now_tm);
94 rtc_next_alarm_time(&alarm_tm, &now_tm, alrm);
95 ret = rtc_tm_to_time(&alarm_tm, &time);
96 if (ret != 0)
97 break;
99 RTSR = RTSR & (RTSR_HZE|RTSR_ALE|RTSR_AL);
100 RTAR = time;
101 } while (now != RCNR);
103 return ret;
106 static irqreturn_t sa1100_rtc_interrupt(int irq, void *dev_id)
108 struct platform_device *pdev = to_platform_device(dev_id);
109 struct rtc_device *rtc = platform_get_drvdata(pdev);
110 unsigned int rtsr;
111 unsigned long events = 0;
113 spin_lock(&sa1100_rtc_lock);
115 rtsr = RTSR;
116 /* clear interrupt sources */
117 RTSR = 0;
118 /* Fix for a nasty initialization problem the in SA11xx RTSR register.
119 * See also the comments in sa1100_rtc_probe(). */
120 if (rtsr & (RTSR_ALE | RTSR_HZE)) {
121 /* This is the original code, before there was the if test
122 * above. This code does not clear interrupts that were not
123 * enabled. */
124 RTSR = (RTSR_AL | RTSR_HZ) & (rtsr >> 2);
125 } else {
126 /* For some reason, it is possible to enter this routine
127 * without interruptions enabled, it has been tested with
128 * several units (Bug in SA11xx chip?).
130 * This situation leads to an infinite "loop" of interrupt
131 * routine calling and as a result the processor seems to
132 * lock on its first call to open(). */
133 RTSR = RTSR_AL | RTSR_HZ;
136 /* clear alarm interrupt if it has occurred */
137 if (rtsr & RTSR_AL)
138 rtsr &= ~RTSR_ALE;
139 RTSR = rtsr & (RTSR_ALE | RTSR_HZE);
141 /* update irq data & counter */
142 if (rtsr & RTSR_AL)
143 events |= RTC_AF | RTC_IRQF;
144 if (rtsr & RTSR_HZ)
145 events |= RTC_UF | RTC_IRQF;
147 rtc_update_irq(rtc, 1, events);
149 if (rtsr & RTSR_AL && rtc_periodic_alarm(&rtc_alarm))
150 rtc_update_alarm(&rtc_alarm);
152 spin_unlock(&sa1100_rtc_lock);
154 return IRQ_HANDLED;
157 static int sa1100_rtc_open(struct device *dev)
159 int ret;
160 struct platform_device *plat_dev = to_platform_device(dev);
161 struct rtc_device *rtc = platform_get_drvdata(plat_dev);
163 ret = request_irq(IRQ_RTC1Hz, sa1100_rtc_interrupt, IRQF_DISABLED,
164 "rtc 1Hz", dev);
165 if (ret) {
166 dev_err(dev, "IRQ %d already in use.\n", IRQ_RTC1Hz);
167 goto fail_ui;
169 ret = request_irq(IRQ_RTCAlrm, sa1100_rtc_interrupt, IRQF_DISABLED,
170 "rtc Alrm", dev);
171 if (ret) {
172 dev_err(dev, "IRQ %d already in use.\n", IRQ_RTCAlrm);
173 goto fail_ai;
175 rtc->max_user_freq = RTC_FREQ;
176 rtc_irq_set_freq(rtc, NULL, RTC_FREQ);
178 return 0;
180 fail_ai:
181 free_irq(IRQ_RTC1Hz, dev);
182 fail_ui:
183 return ret;
186 static void sa1100_rtc_release(struct device *dev)
188 spin_lock_irq(&sa1100_rtc_lock);
189 RTSR = 0;
190 spin_unlock_irq(&sa1100_rtc_lock);
192 free_irq(IRQ_RTCAlrm, dev);
193 free_irq(IRQ_RTC1Hz, dev);
196 static int sa1100_rtc_alarm_irq_enable(struct device *dev, unsigned int enabled)
198 spin_lock_irq(&sa1100_rtc_lock);
199 if (enabled)
200 RTSR |= RTSR_ALE;
201 else
202 RTSR &= ~RTSR_ALE;
203 spin_unlock_irq(&sa1100_rtc_lock);
204 return 0;
207 static int sa1100_rtc_read_time(struct device *dev, struct rtc_time *tm)
209 rtc_time_to_tm(RCNR, tm);
210 return 0;
213 static int sa1100_rtc_set_time(struct device *dev, struct rtc_time *tm)
215 unsigned long time;
216 int ret;
218 ret = rtc_tm_to_time(tm, &time);
219 if (ret == 0)
220 RCNR = time;
221 return ret;
224 static int sa1100_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm)
226 u32 rtsr;
228 memcpy(&alrm->time, &rtc_alarm, sizeof(struct rtc_time));
229 rtsr = RTSR;
230 alrm->enabled = (rtsr & RTSR_ALE) ? 1 : 0;
231 alrm->pending = (rtsr & RTSR_AL) ? 1 : 0;
232 return 0;
235 static int sa1100_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
237 int ret;
239 spin_lock_irq(&sa1100_rtc_lock);
240 ret = rtc_update_alarm(&alrm->time);
241 if (ret == 0) {
242 if (alrm->enabled)
243 RTSR |= RTSR_ALE;
244 else
245 RTSR &= ~RTSR_ALE;
247 spin_unlock_irq(&sa1100_rtc_lock);
249 return ret;
252 static int sa1100_rtc_proc(struct device *dev, struct seq_file *seq)
254 seq_printf(seq, "trim/divider\t\t: 0x%08x\n", (u32) RTTR);
255 seq_printf(seq, "RTSR\t\t\t: 0x%08x\n", (u32)RTSR);
257 return 0;
260 static const struct rtc_class_ops sa1100_rtc_ops = {
261 .open = sa1100_rtc_open,
262 .release = sa1100_rtc_release,
263 .read_time = sa1100_rtc_read_time,
264 .set_time = sa1100_rtc_set_time,
265 .read_alarm = sa1100_rtc_read_alarm,
266 .set_alarm = sa1100_rtc_set_alarm,
267 .proc = sa1100_rtc_proc,
268 .alarm_irq_enable = sa1100_rtc_alarm_irq_enable,
271 static int sa1100_rtc_probe(struct platform_device *pdev)
273 struct rtc_device *rtc;
276 * According to the manual we should be able to let RTTR be zero
277 * and then a default diviser for a 32.768KHz clock is used.
278 * Apparently this doesn't work, at least for my SA1110 rev 5.
279 * If the clock divider is uninitialized then reset it to the
280 * default value to get the 1Hz clock.
282 if (RTTR == 0) {
283 RTTR = RTC_DEF_DIVIDER + (RTC_DEF_TRIM << 16);
284 dev_warn(&pdev->dev, "warning: "
285 "initializing default clock divider/trim value\n");
286 /* The current RTC value probably doesn't make sense either */
287 RCNR = 0;
290 device_init_wakeup(&pdev->dev, 1);
292 rtc = rtc_device_register(pdev->name, &pdev->dev, &sa1100_rtc_ops,
293 THIS_MODULE);
295 if (IS_ERR(rtc))
296 return PTR_ERR(rtc);
298 platform_set_drvdata(pdev, rtc);
300 /* Fix for a nasty initialization problem the in SA11xx RTSR register.
301 * See also the comments in sa1100_rtc_interrupt().
303 * Sometimes bit 1 of the RTSR (RTSR_HZ) will wake up 1, which means an
304 * interrupt pending, even though interrupts were never enabled.
305 * In this case, this bit it must be reset before enabling
306 * interruptions to avoid a nonexistent interrupt to occur.
308 * In principle, the same problem would apply to bit 0, although it has
309 * never been observed to happen.
311 * This issue is addressed both here and in sa1100_rtc_interrupt().
312 * If the issue is not addressed here, in the times when the processor
313 * wakes up with the bit set there will be one spurious interrupt.
315 * The issue is also dealt with in sa1100_rtc_interrupt() to be on the
316 * safe side, once the condition that lead to this strange
317 * initialization is unknown and could in principle happen during
318 * normal processing.
320 * Notice that clearing bit 1 and 0 is accomplished by writting ONES to
321 * the corresponding bits in RTSR. */
322 RTSR = RTSR_AL | RTSR_HZ;
324 return 0;
327 static int sa1100_rtc_remove(struct platform_device *pdev)
329 struct rtc_device *rtc = platform_get_drvdata(pdev);
331 if (rtc)
332 rtc_device_unregister(rtc);
334 return 0;
337 #ifdef CONFIG_PM
338 static int sa1100_rtc_suspend(struct device *dev)
340 if (device_may_wakeup(dev))
341 enable_irq_wake(IRQ_RTCAlrm);
342 return 0;
345 static int sa1100_rtc_resume(struct device *dev)
347 if (device_may_wakeup(dev))
348 disable_irq_wake(IRQ_RTCAlrm);
349 return 0;
352 static const struct dev_pm_ops sa1100_rtc_pm_ops = {
353 .suspend = sa1100_rtc_suspend,
354 .resume = sa1100_rtc_resume,
356 #endif
358 static struct platform_driver sa1100_rtc_driver = {
359 .probe = sa1100_rtc_probe,
360 .remove = sa1100_rtc_remove,
361 .driver = {
362 .name = "sa1100-rtc",
363 #ifdef CONFIG_PM
364 .pm = &sa1100_rtc_pm_ops,
365 #endif
369 module_platform_driver(sa1100_rtc_driver);
371 MODULE_AUTHOR("Richard Purdie <rpurdie@rpsys.net>");
372 MODULE_DESCRIPTION("SA11x0/PXA2xx Realtime Clock Driver (RTC)");
373 MODULE_LICENSE("GPL");
374 MODULE_ALIAS("platform:sa1100-rtc");