2 * linux/arch/arm/mach-mmp/pxa168.c
4 * Code specific to PXA168
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
11 #include <linux/module.h>
12 #include <linux/kernel.h>
13 #include <linux/init.h>
14 #include <linux/list.h>
16 #include <linux/clk.h>
18 #include <asm/mach/time.h>
19 #include <mach/addr-map.h>
20 #include <mach/cputype.h>
21 #include <mach/regs-apbc.h>
22 #include <mach/regs-apmu.h>
23 #include <mach/irqs.h>
24 #include <mach/gpio.h>
26 #include <mach/devices.h>
28 #include <linux/platform_device.h>
29 #include <linux/dma-mapping.h>
30 #include <mach/pxa168.h>
35 #define MFPR_VIRT_BASE (APB_VIRT_BASE + 0x1e000)
37 static struct mfp_addr_map pxa168_mfp_addr_map
[] __initdata
=
39 MFP_ADDR_X(GPIO0
, GPIO36
, 0x04c),
40 MFP_ADDR_X(GPIO37
, GPIO55
, 0x000),
41 MFP_ADDR_X(GPIO56
, GPIO123
, 0x0e0),
42 MFP_ADDR_X(GPIO124
, GPIO127
, 0x0f4),
47 #define APMASK(i) (GPIO_REGS_VIRT + BANK_OFF(i) + 0x09c)
49 static void __init
pxa168_init_gpio(void)
53 /* enable GPIO clock */
54 __raw_writel(APBC_APBCLK
| APBC_FNCLK
, APBC_PXA168_GPIO
);
56 /* unmask GPIO edge detection for all 4 banks - APMASKx */
57 for (i
= 0; i
< 4; i
++)
58 __raw_writel(0xffffffff, APMASK(i
));
60 pxa_init_gpio(IRQ_PXA168_GPIOX
, 0, 127, NULL
);
63 void __init
pxa168_init_irq(void)
69 /* APB peripheral clocks */
70 static APBC_CLK(uart1
, PXA168_UART1
, 1, 14745600);
71 static APBC_CLK(uart2
, PXA168_UART2
, 1, 14745600);
72 static APBC_CLK(uart3
, PXA168_UART3
, 1, 14745600);
73 static APBC_CLK(twsi0
, PXA168_TWSI0
, 1, 33000000);
74 static APBC_CLK(twsi1
, PXA168_TWSI1
, 1, 33000000);
75 static APBC_CLK(pwm1
, PXA168_PWM1
, 1, 13000000);
76 static APBC_CLK(pwm2
, PXA168_PWM2
, 1, 13000000);
77 static APBC_CLK(pwm3
, PXA168_PWM3
, 1, 13000000);
78 static APBC_CLK(pwm4
, PXA168_PWM4
, 1, 13000000);
79 static APBC_CLK(ssp1
, PXA168_SSP1
, 4, 0);
80 static APBC_CLK(ssp2
, PXA168_SSP2
, 4, 0);
81 static APBC_CLK(ssp3
, PXA168_SSP3
, 4, 0);
82 static APBC_CLK(ssp4
, PXA168_SSP4
, 4, 0);
83 static APBC_CLK(ssp5
, PXA168_SSP5
, 4, 0);
84 static APBC_CLK(keypad
, PXA168_KPC
, 0, 32000);
86 static APMU_CLK(nand
, NAND
, 0x19b, 156000000);
87 static APMU_CLK(lcd
, LCD
, 0x7f, 312000000);
88 static APMU_CLK(eth
, ETH
, 0x09, 0);
89 static APMU_CLK(usb
, USB
, 0x12, 0);
91 /* device and clock bindings */
92 static struct clk_lookup pxa168_clkregs
[] = {
93 INIT_CLKREG(&clk_uart1
, "pxa2xx-uart.0", NULL
),
94 INIT_CLKREG(&clk_uart2
, "pxa2xx-uart.1", NULL
),
95 INIT_CLKREG(&clk_uart3
, "pxa2xx-uart.2", NULL
),
96 INIT_CLKREG(&clk_twsi0
, "pxa2xx-i2c.0", NULL
),
97 INIT_CLKREG(&clk_twsi1
, "pxa2xx-i2c.1", NULL
),
98 INIT_CLKREG(&clk_pwm1
, "pxa168-pwm.0", NULL
),
99 INIT_CLKREG(&clk_pwm2
, "pxa168-pwm.1", NULL
),
100 INIT_CLKREG(&clk_pwm3
, "pxa168-pwm.2", NULL
),
101 INIT_CLKREG(&clk_pwm4
, "pxa168-pwm.3", NULL
),
102 INIT_CLKREG(&clk_ssp1
, "pxa168-ssp.0", NULL
),
103 INIT_CLKREG(&clk_ssp2
, "pxa168-ssp.1", NULL
),
104 INIT_CLKREG(&clk_ssp3
, "pxa168-ssp.2", NULL
),
105 INIT_CLKREG(&clk_ssp4
, "pxa168-ssp.3", NULL
),
106 INIT_CLKREG(&clk_ssp5
, "pxa168-ssp.4", NULL
),
107 INIT_CLKREG(&clk_nand
, "pxa3xx-nand", NULL
),
108 INIT_CLKREG(&clk_lcd
, "pxa168-fb", NULL
),
109 INIT_CLKREG(&clk_keypad
, "pxa27x-keypad", NULL
),
110 INIT_CLKREG(&clk_eth
, "pxa168-eth", "MFUCLK"),
111 INIT_CLKREG(&clk_usb
, "pxa168-ehci", "PXA168-USBCLK"),
114 static int __init
pxa168_init(void)
116 if (cpu_is_pxa168()) {
117 mfp_init_base(MFPR_VIRT_BASE
);
118 mfp_init_addr(pxa168_mfp_addr_map
);
119 pxa_init_dma(IRQ_PXA168_DMA_INT0
, 32);
120 clkdev_add_table(ARRAY_AND_SIZE(pxa168_clkregs
));
125 postcore_initcall(pxa168_init
);
127 /* system timer - clock enabled, 3.25MHz */
128 #define TIMER_CLK_RST (APBC_APBCLK | APBC_FNCLK | APBC_FNCLKSEL(3))
130 static void __init
pxa168_timer_init(void)
132 /* this is early, we have to initialize the CCU registers by
133 * ourselves instead of using clk_* API. Clock rate is defined
134 * by APBC_TIMERS_CLK_RST (3.25MHz) and enabled free-running
136 __raw_writel(APBC_APBCLK
| APBC_RST
, APBC_PXA168_TIMERS
);
138 /* 3.25MHz, bus/functional clock enabled, release reset */
139 __raw_writel(TIMER_CLK_RST
, APBC_PXA168_TIMERS
);
141 timer_init(IRQ_PXA168_TIMER1
);
144 struct sys_timer pxa168_timer
= {
145 .init
= pxa168_timer_init
,
148 void pxa168_clear_keypad_wakeup(void)
151 uint32_t mask
= APMU_PXA168_KP_WAKE_CLR
;
153 /* wake event clear is needed in order to clear keypad interrupt */
154 val
= __raw_readl(APMU_WAKE_CLR
);
155 __raw_writel(val
| mask
, APMU_WAKE_CLR
);
158 /* on-chip devices */
159 PXA168_DEVICE(uart1
, "pxa2xx-uart", 0, UART1
, 0xd4017000, 0x30, 21, 22);
160 PXA168_DEVICE(uart2
, "pxa2xx-uart", 1, UART2
, 0xd4018000, 0x30, 23, 24);
161 PXA168_DEVICE(uart3
, "pxa2xx-uart", 2, UART3
, 0xd4026000, 0x30, 23, 24);
162 PXA168_DEVICE(twsi0
, "pxa2xx-i2c", 0, TWSI0
, 0xd4011000, 0x28);
163 PXA168_DEVICE(twsi1
, "pxa2xx-i2c", 1, TWSI1
, 0xd4025000, 0x28);
164 PXA168_DEVICE(pwm1
, "pxa168-pwm", 0, NONE
, 0xd401a000, 0x10);
165 PXA168_DEVICE(pwm2
, "pxa168-pwm", 1, NONE
, 0xd401a400, 0x10);
166 PXA168_DEVICE(pwm3
, "pxa168-pwm", 2, NONE
, 0xd401a800, 0x10);
167 PXA168_DEVICE(pwm4
, "pxa168-pwm", 3, NONE
, 0xd401ac00, 0x10);
168 PXA168_DEVICE(nand
, "pxa3xx-nand", -1, NAND
, 0xd4283000, 0x80, 97, 99);
169 PXA168_DEVICE(ssp1
, "pxa168-ssp", 0, SSP1
, 0xd401b000, 0x40, 52, 53);
170 PXA168_DEVICE(ssp2
, "pxa168-ssp", 1, SSP2
, 0xd401c000, 0x40, 54, 55);
171 PXA168_DEVICE(ssp3
, "pxa168-ssp", 2, SSP3
, 0xd401f000, 0x40, 56, 57);
172 PXA168_DEVICE(ssp4
, "pxa168-ssp", 3, SSP4
, 0xd4020000, 0x40, 58, 59);
173 PXA168_DEVICE(ssp5
, "pxa168-ssp", 4, SSP5
, 0xd4021000, 0x40, 60, 61);
174 PXA168_DEVICE(fb
, "pxa168-fb", -1, LCD
, 0xd420b000, 0x1c8);
175 PXA168_DEVICE(keypad
, "pxa27x-keypad", -1, KEYPAD
, 0xd4012000, 0x4c);
176 PXA168_DEVICE(eth
, "pxa168-eth", -1, MFU
, 0xc0800000, 0x0fff);
178 struct resource pxa168_usb_host_resources
[] = {
179 /* USB Host conroller register base */
182 .end
= 0xd4209000 + 0x200,
183 .flags
= IORESOURCE_MEM
,
184 .name
= "pxa168-usb-host",
186 /* USB PHY register base */
189 .end
= 0xd4206000 + 0xff,
190 .flags
= IORESOURCE_MEM
,
191 .name
= "pxa168-usb-phy",
194 .start
= IRQ_PXA168_USB2
,
195 .end
= IRQ_PXA168_USB2
,
196 .flags
= IORESOURCE_IRQ
,
200 static u64 pxa168_usb_host_dmamask
= DMA_BIT_MASK(32);
201 struct platform_device pxa168_device_usb_host
= {
202 .name
= "pxa168-ehci",
205 .dma_mask
= &pxa168_usb_host_dmamask
,
206 .coherent_dma_mask
= DMA_BIT_MASK(32),
209 .num_resources
= ARRAY_SIZE(pxa168_usb_host_resources
),
210 .resource
= pxa168_usb_host_resources
,
213 int __init
pxa168_add_usb_host(struct pxa168_usb_pdata
*pdata
)
215 pxa168_device_usb_host
.dev
.platform_data
= pdata
;
216 return platform_device_register(&pxa168_device_usb_host
);