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Merge branch 'for-greg' of git://git.kernel.org/pub/scm/linux/kernel/git/balbi/usb...
[zen-stable.git] / drivers / input / keyboard / tegra-kbc.c
blobcf3228b0ab909a253c48f91a770172ae55acea1c
1 /*
2 * Keyboard class input driver for the NVIDIA Tegra SoC internal matrix
3 * keyboard controller
4 *
5 * Copyright (c) 2009-2011, NVIDIA Corporation.
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * more details.
16 *
17 * You should have received a copy of the GNU General Public License along
18 * with this program; if not, write to the Free Software Foundation, Inc.,
19 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
20 */
21
22 #include <linux/kernel.h>
23 #include <linux/module.h>
24 #include <linux/input.h>
25 #include <linux/platform_device.h>
26 #include <linux/delay.h>
27 #include <linux/io.h>
28 #include <linux/interrupt.h>
29 #include <linux/clk.h>
30 #include <linux/slab.h>
31 #include <mach/clk.h>
32 #include <mach/kbc.h>
33
34 #define KBC_MAX_DEBOUNCE_CNT 0x3ffu
35
36 /* KBC row scan time and delay for beginning the row scan. */
37 #define KBC_ROW_SCAN_TIME 16
38 #define KBC_ROW_SCAN_DLY 5
39
40 /* KBC uses a 32KHz clock so a cycle = 1/32Khz */
41 #define KBC_CYCLE_MS 32
42
43 /* KBC Registers */
44
45 /* KBC Control Register */
46 #define KBC_CONTROL_0 0x0
47 #define KBC_FIFO_TH_CNT_SHIFT(cnt) (cnt << 14)
48 #define KBC_DEBOUNCE_CNT_SHIFT(cnt) (cnt << 4)
49 #define KBC_CONTROL_FIFO_CNT_INT_EN (1 << 3)
50 #define KBC_CONTROL_KBC_EN (1 << 0)
51
52 /* KBC Interrupt Register */
53 #define KBC_INT_0 0x4
54 #define KBC_INT_FIFO_CNT_INT_STATUS (1 << 2)
55
56 #define KBC_ROW_CFG0_0 0x8
57 #define KBC_COL_CFG0_0 0x18
58 #define KBC_TO_CNT_0 0x24
59 #define KBC_INIT_DLY_0 0x28
60 #define KBC_RPT_DLY_0 0x2c
61 #define KBC_KP_ENT0_0 0x30
62 #define KBC_KP_ENT1_0 0x34
63 #define KBC_ROW0_MASK_0 0x38
64
65 #define KBC_ROW_SHIFT 3
66
67 struct tegra_kbc {
68 void __iomem *mmio;
69 struct input_dev *idev;
70 unsigned int irq;
71 spinlock_t lock;
72 unsigned int repoll_dly;
73 unsigned long cp_dly_jiffies;
74 unsigned int cp_to_wkup_dly;
75 bool use_fn_map;
76 bool use_ghost_filter;
77 const struct tegra_kbc_platform_data *pdata;
78 unsigned short keycode[KBC_MAX_KEY * 2];
79 unsigned short current_keys[KBC_MAX_KPENT];
80 unsigned int num_pressed_keys;
81 struct timer_list timer;
82 struct clk *clk;
83 };
84
85 static const u32 tegra_kbc_default_keymap[] = {
86 KEY(0, 2, KEY_W),
87 KEY(0, 3, KEY_S),
88 KEY(0, 4, KEY_A),
89 KEY(0, 5, KEY_Z),
90 KEY(0, 7, KEY_FN),
91
92 KEY(1, 7, KEY_LEFTMETA),
93
94 KEY(2, 6, KEY_RIGHTALT),
95 KEY(2, 7, KEY_LEFTALT),
96
97 KEY(3, 0, KEY_5),
98 KEY(3, 1, KEY_4),
99 KEY(3, 2, KEY_R),
100 KEY(3, 3, KEY_E),
101 KEY(3, 4, KEY_F),
102 KEY(3, 5, KEY_D),
103 KEY(3, 6, KEY_X),
104
105 KEY(4, 0, KEY_7),
106 KEY(4, 1, KEY_6),
107 KEY(4, 2, KEY_T),
108 KEY(4, 3, KEY_H),
109 KEY(4, 4, KEY_G),
110 KEY(4, 5, KEY_V),
111 KEY(4, 6, KEY_C),
112 KEY(4, 7, KEY_SPACE),
113
114 KEY(5, 0, KEY_9),
115 KEY(5, 1, KEY_8),
116 KEY(5, 2, KEY_U),
117 KEY(5, 3, KEY_Y),
118 KEY(5, 4, KEY_J),
119 KEY(5, 5, KEY_N),
120 KEY(5, 6, KEY_B),
121 KEY(5, 7, KEY_BACKSLASH),
122
123 KEY(6, 0, KEY_MINUS),
124 KEY(6, 1, KEY_0),
125 KEY(6, 2, KEY_O),
126 KEY(6, 3, KEY_I),
127 KEY(6, 4, KEY_L),
128 KEY(6, 5, KEY_K),
129 KEY(6, 6, KEY_COMMA),
130 KEY(6, 7, KEY_M),
131
132 KEY(7, 1, KEY_EQUAL),
133 KEY(7, 2, KEY_RIGHTBRACE),
134 KEY(7, 3, KEY_ENTER),
135 KEY(7, 7, KEY_MENU),
136
137 KEY(8, 4, KEY_RIGHTSHIFT),
138 KEY(8, 5, KEY_LEFTSHIFT),
139
140 KEY(9, 5, KEY_RIGHTCTRL),
141 KEY(9, 7, KEY_LEFTCTRL),
142
143 KEY(11, 0, KEY_LEFTBRACE),
144 KEY(11, 1, KEY_P),
145 KEY(11, 2, KEY_APOSTROPHE),
146 KEY(11, 3, KEY_SEMICOLON),
147 KEY(11, 4, KEY_SLASH),
148 KEY(11, 5, KEY_DOT),
149
150 KEY(12, 0, KEY_F10),
151 KEY(12, 1, KEY_F9),
152 KEY(12, 2, KEY_BACKSPACE),
153 KEY(12, 3, KEY_3),
154 KEY(12, 4, KEY_2),
155 KEY(12, 5, KEY_UP),
156 KEY(12, 6, KEY_PRINT),
157 KEY(12, 7, KEY_PAUSE),
158
159 KEY(13, 0, KEY_INSERT),
160 KEY(13, 1, KEY_DELETE),
161 KEY(13, 3, KEY_PAGEUP),
162 KEY(13, 4, KEY_PAGEDOWN),
163 KEY(13, 5, KEY_RIGHT),
164 KEY(13, 6, KEY_DOWN),
165 KEY(13, 7, KEY_LEFT),
166
167 KEY(14, 0, KEY_F11),
168 KEY(14, 1, KEY_F12),
169 KEY(14, 2, KEY_F8),
170 KEY(14, 3, KEY_Q),
171 KEY(14, 4, KEY_F4),
172 KEY(14, 5, KEY_F3),
173 KEY(14, 6, KEY_1),
174 KEY(14, 7, KEY_F7),
175
176 KEY(15, 0, KEY_ESC),
177 KEY(15, 1, KEY_GRAVE),
178 KEY(15, 2, KEY_F5),
179 KEY(15, 3, KEY_TAB),
180 KEY(15, 4, KEY_F1),
181 KEY(15, 5, KEY_F2),
182 KEY(15, 6, KEY_CAPSLOCK),
183 KEY(15, 7, KEY_F6),
184
185 /* Software Handled Function Keys */
186 KEY(20, 0, KEY_KP7),
187
188 KEY(21, 0, KEY_KP9),
189 KEY(21, 1, KEY_KP8),
190 KEY(21, 2, KEY_KP4),
191 KEY(21, 4, KEY_KP1),
192
193 KEY(22, 1, KEY_KPSLASH),
194 KEY(22, 2, KEY_KP6),
195 KEY(22, 3, KEY_KP5),
196 KEY(22, 4, KEY_KP3),
197 KEY(22, 5, KEY_KP2),
198 KEY(22, 7, KEY_KP0),
199
200 KEY(27, 1, KEY_KPASTERISK),
201 KEY(27, 3, KEY_KPMINUS),
202 KEY(27, 4, KEY_KPPLUS),
203 KEY(27, 5, KEY_KPDOT),
204
205 KEY(28, 5, KEY_VOLUMEUP),
206
207 KEY(29, 3, KEY_HOME),
208 KEY(29, 4, KEY_END),
209 KEY(29, 5, KEY_BRIGHTNESSDOWN),
210 KEY(29, 6, KEY_VOLUMEDOWN),
211 KEY(29, 7, KEY_BRIGHTNESSUP),
212
213 KEY(30, 0, KEY_NUMLOCK),
214 KEY(30, 1, KEY_SCROLLLOCK),
215 KEY(30, 2, KEY_MUTE),
216
217 KEY(31, 4, KEY_HELP),
218 };
219
220 static const struct matrix_keymap_data tegra_kbc_default_keymap_data = {
221 .keymap = tegra_kbc_default_keymap,
222 .keymap_size = ARRAY_SIZE(tegra_kbc_default_keymap),
223 };
224
225 static void tegra_kbc_report_released_keys(struct input_dev *input,
226 unsigned short old_keycodes[],
227 unsigned int old_num_keys,
228 unsigned short new_keycodes[],
229 unsigned int new_num_keys)
230 {
231 unsigned int i, j;
232
233 for (i = 0; i < old_num_keys; i++) {
234 for (j = 0; j < new_num_keys; j++)
235 if (old_keycodes[i] == new_keycodes[j])
236 break;
237
238 if (j == new_num_keys)
239 input_report_key(input, old_keycodes[i], 0);
240 }
241 }
242
243 static void tegra_kbc_report_pressed_keys(struct input_dev *input,
244 unsigned char scancodes[],
245 unsigned short keycodes[],
246 unsigned int num_pressed_keys)
247 {
248 unsigned int i;
249
250 for (i = 0; i < num_pressed_keys; i++) {
251 input_event(input, EV_MSC, MSC_SCAN, scancodes[i]);
252 input_report_key(input, keycodes[i], 1);
253 }
254 }
255
256 static void tegra_kbc_report_keys(struct tegra_kbc *kbc)
257 {
258 unsigned char scancodes[KBC_MAX_KPENT];
259 unsigned short keycodes[KBC_MAX_KPENT];
260 u32 val = 0;
261 unsigned int i;
262 unsigned int num_down = 0;
263 bool fn_keypress = false;
264 bool key_in_same_row = false;
265 bool key_in_same_col = false;
266
267 for (i = 0; i < KBC_MAX_KPENT; i++) {
268 if ((i % 4) == 0)
269 val = readl(kbc->mmio + KBC_KP_ENT0_0 + i);
270
271 if (val & 0x80) {
272 unsigned int col = val & 0x07;
273 unsigned int row = (val >> 3) & 0x0f;
274 unsigned char scancode =
275 MATRIX_SCAN_CODE(row, col, KBC_ROW_SHIFT);
276
277 scancodes[num_down] = scancode;
278 keycodes[num_down] = kbc->keycode[scancode];
279 /* If driver uses Fn map, do not report the Fn key. */
280 if ((keycodes[num_down] == KEY_FN) && kbc->use_fn_map)
281 fn_keypress = true;
282 else
283 num_down++;
284 }
285
286 val >>= 8;
287 }
288
289 /*
290 * Matrix keyboard designs are prone to keyboard ghosting.
291 * Ghosting occurs if there are 3 keys such that -
292 * any 2 of the 3 keys share a row, and any 2 of them share a column.
293 * If so ignore the key presses for this iteration.
294 */
295 if (kbc->use_ghost_filter && num_down >= 3) {
296 for (i = 0; i < num_down; i++) {
297 unsigned int j;
298 u8 curr_col = scancodes[i] & 0x07;
299 u8 curr_row = scancodes[i] >> KBC_ROW_SHIFT;
300
301 /*
302 * Find 2 keys such that one key is in the same row
303 * and the other is in the same column as the i-th key.
304 */
305 for (j = i + 1; j < num_down; j++) {
306 u8 col = scancodes[j] & 0x07;
307 u8 row = scancodes[j] >> KBC_ROW_SHIFT;
308
309 if (col == curr_col)
310 key_in_same_col = true;
311 if (row == curr_row)
312 key_in_same_row = true;
313 }
314 }
315 }
316
317 /*
318 * If the platform uses Fn keymaps, translate keys on a Fn keypress.
319 * Function keycodes are KBC_MAX_KEY apart from the plain keycodes.
320 */
321 if (fn_keypress) {
322 for (i = 0; i < num_down; i++) {
323 scancodes[i] += KBC_MAX_KEY;
324 keycodes[i] = kbc->keycode[scancodes[i]];
325 }
326 }
327
328 /* Ignore the key presses for this iteration? */
329 if (key_in_same_col && key_in_same_row)
330 return;
331
332 tegra_kbc_report_released_keys(kbc->idev,
333 kbc->current_keys, kbc->num_pressed_keys,
334 keycodes, num_down);
335 tegra_kbc_report_pressed_keys(kbc->idev, scancodes, keycodes, num_down);
336 input_sync(kbc->idev);
337
338 memcpy(kbc->current_keys, keycodes, sizeof(kbc->current_keys));
339 kbc->num_pressed_keys = num_down;
340 }
341
342 static void tegra_kbc_set_fifo_interrupt(struct tegra_kbc *kbc, bool enable)
343 {
344 u32 val;
345
346 val = readl(kbc->mmio + KBC_CONTROL_0);
347 if (enable)
348 val |= KBC_CONTROL_FIFO_CNT_INT_EN;
349 else
350 val &= ~KBC_CONTROL_FIFO_CNT_INT_EN;
351 writel(val, kbc->mmio + KBC_CONTROL_0);
352 }
353
354 static void tegra_kbc_keypress_timer(unsigned long data)
355 {
356 struct tegra_kbc *kbc = (struct tegra_kbc *)data;
357 unsigned long flags;
358 u32 val;
359 unsigned int i;
360
361 spin_lock_irqsave(&kbc->lock, flags);
362
363 val = (readl(kbc->mmio + KBC_INT_0) >> 4) & 0xf;
364 if (val) {
365 unsigned long dly;
366
367 tegra_kbc_report_keys(kbc);
368
369 /*
370 * If more than one keys are pressed we need not wait
371 * for the repoll delay.
372 */
373 dly = (val == 1) ? kbc->repoll_dly : 1;
374 mod_timer(&kbc->timer, jiffies + msecs_to_jiffies(dly));
375 } else {
376 /* Release any pressed keys and exit the polling loop */
377 for (i = 0; i < kbc->num_pressed_keys; i++)
378 input_report_key(kbc->idev, kbc->current_keys[i], 0);
379 input_sync(kbc->idev);
380
381 kbc->num_pressed_keys = 0;
382
383 /* All keys are released so enable the keypress interrupt */
384 tegra_kbc_set_fifo_interrupt(kbc, true);
385 }
386
387 spin_unlock_irqrestore(&kbc->lock, flags);
388 }
389
390 static irqreturn_t tegra_kbc_isr(int irq, void *args)
391 {
392 struct tegra_kbc *kbc = args;
393 unsigned long flags;
394 u32 val;
395
396 spin_lock_irqsave(&kbc->lock, flags);
397
398 /*
399 * Quickly bail out & reenable interrupts if the fifo threshold
400 * count interrupt wasn't the interrupt source
401 */
402 val = readl(kbc->mmio + KBC_INT_0);
403 writel(val, kbc->mmio + KBC_INT_0);
404
405 if (val & KBC_INT_FIFO_CNT_INT_STATUS) {
406 /*
407 * Until all keys are released, defer further processing to
408 * the polling loop in tegra_kbc_keypress_timer.
409 */
410 tegra_kbc_set_fifo_interrupt(kbc, false);
411 mod_timer(&kbc->timer, jiffies + kbc->cp_dly_jiffies);
412 }
413
414 spin_unlock_irqrestore(&kbc->lock, flags);
415
416 return IRQ_HANDLED;
417 }
418
419 static void tegra_kbc_setup_wakekeys(struct tegra_kbc *kbc, bool filter)
420 {
421 const struct tegra_kbc_platform_data *pdata = kbc->pdata;
422 int i;
423 unsigned int rst_val;
424
425 /* Either mask all keys or none. */
426 rst_val = (filter && !pdata->wakeup) ? ~0 : 0;
427
428 for (i = 0; i < KBC_MAX_ROW; i++)
429 writel(rst_val, kbc->mmio + KBC_ROW0_MASK_0 + i * 4);
430 }
431
432 static void tegra_kbc_config_pins(struct tegra_kbc *kbc)
433 {
434 const struct tegra_kbc_platform_data *pdata = kbc->pdata;
435 int i;
436
437 for (i = 0; i < KBC_MAX_GPIO; i++) {
438 u32 r_shft = 5 * (i % 6);
439 u32 c_shft = 4 * (i % 8);
440 u32 r_mask = 0x1f << r_shft;
441 u32 c_mask = 0x0f << c_shft;
442 u32 r_offs = (i / 6) * 4 + KBC_ROW_CFG0_0;
443 u32 c_offs = (i / 8) * 4 + KBC_COL_CFG0_0;
444 u32 row_cfg = readl(kbc->mmio + r_offs);
445 u32 col_cfg = readl(kbc->mmio + c_offs);
446
447 row_cfg &= ~r_mask;
448 col_cfg &= ~c_mask;
449
450 if (pdata->pin_cfg[i].is_row)
451 row_cfg |= ((pdata->pin_cfg[i].num << 1) | 1) << r_shft;
452 else
453 col_cfg |= ((pdata->pin_cfg[i].num << 1) | 1) << c_shft;
454
455 writel(row_cfg, kbc->mmio + r_offs);
456 writel(col_cfg, kbc->mmio + c_offs);
457 }
458 }
459
460 static int tegra_kbc_start(struct tegra_kbc *kbc)
461 {
462 const struct tegra_kbc_platform_data *pdata = kbc->pdata;
463 unsigned int debounce_cnt;
464 u32 val = 0;
465
466 clk_enable(kbc->clk);
467
468 /* Reset the KBC controller to clear all previous status.*/
469 tegra_periph_reset_assert(kbc->clk);
470 udelay(100);
471 tegra_periph_reset_deassert(kbc->clk);
472 udelay(100);
473
474 tegra_kbc_config_pins(kbc);
475 tegra_kbc_setup_wakekeys(kbc, false);
476
477 writel(pdata->repeat_cnt, kbc->mmio + KBC_RPT_DLY_0);
478
479 /* Keyboard debounce count is maximum of 12 bits. */
480 debounce_cnt = min(pdata->debounce_cnt, KBC_MAX_DEBOUNCE_CNT);
481 val = KBC_DEBOUNCE_CNT_SHIFT(debounce_cnt);
482 val |= KBC_FIFO_TH_CNT_SHIFT(1); /* set fifo interrupt threshold to 1 */
483 val |= KBC_CONTROL_FIFO_CNT_INT_EN; /* interrupt on FIFO threshold */
484 val |= KBC_CONTROL_KBC_EN; /* enable */
485 writel(val, kbc->mmio + KBC_CONTROL_0);
486
487 /*
488 * Compute the delay(ns) from interrupt mode to continuous polling
489 * mode so the timer routine is scheduled appropriately.
490 */
491 val = readl(kbc->mmio + KBC_INIT_DLY_0);
492 kbc->cp_dly_jiffies = usecs_to_jiffies((val & 0xfffff) * 32);
493
494 kbc->num_pressed_keys = 0;
495
496 /*
497 * Atomically clear out any remaining entries in the key FIFO
498 * and enable keyboard interrupts.
499 */
500 while (1) {
501 val = readl(kbc->mmio + KBC_INT_0);
502 val >>= 4;
503 if (!val)
504 break;
505
506 val = readl(kbc->mmio + KBC_KP_ENT0_0);
507 val = readl(kbc->mmio + KBC_KP_ENT1_0);
508 }
509 writel(0x7, kbc->mmio + KBC_INT_0);
510
511 enable_irq(kbc->irq);
512
513 return 0;
514 }
515
516 static void tegra_kbc_stop(struct tegra_kbc *kbc)
517 {
518 unsigned long flags;
519 u32 val;
520
521 spin_lock_irqsave(&kbc->lock, flags);
522 val = readl(kbc->mmio + KBC_CONTROL_0);
523 val &= ~1;
524 writel(val, kbc->mmio + KBC_CONTROL_0);
525 spin_unlock_irqrestore(&kbc->lock, flags);
526
527 disable_irq(kbc->irq);
528 del_timer_sync(&kbc->timer);
529
530 clk_disable(kbc->clk);
531 }
532
533 static int tegra_kbc_open(struct input_dev *dev)
534 {
535 struct tegra_kbc *kbc = input_get_drvdata(dev);
536
537 return tegra_kbc_start(kbc);
538 }
539
540 static void tegra_kbc_close(struct input_dev *dev)
541 {
542 struct tegra_kbc *kbc = input_get_drvdata(dev);
543
544 return tegra_kbc_stop(kbc);
545 }
546
547 static bool __devinit
548 tegra_kbc_check_pin_cfg(const struct tegra_kbc_platform_data *pdata,
549 struct device *dev, unsigned int *num_rows)
550 {
551 int i;
552
553 *num_rows = 0;
554
555 for (i = 0; i < KBC_MAX_GPIO; i++) {
556 const struct tegra_kbc_pin_cfg *pin_cfg = &pdata->pin_cfg[i];
557
558 if (pin_cfg->is_row) {
559 if (pin_cfg->num >= KBC_MAX_ROW) {
560 dev_err(dev,
561 "pin_cfg[%d]: invalid row number %d\n",
562 i, pin_cfg->num);
563 return false;
564 }
565 (*num_rows)++;
566 } else {
567 if (pin_cfg->num >= KBC_MAX_COL) {
568 dev_err(dev,
569 "pin_cfg[%d]: invalid column number %d\n",
570 i, pin_cfg->num);
571 return false;
572 }
573 }
574 }
575
576 return true;
577 }
578
579 static int __devinit tegra_kbc_probe(struct platform_device *pdev)
580 {
581 const struct tegra_kbc_platform_data *pdata = pdev->dev.platform_data;
582 const struct matrix_keymap_data *keymap_data;
583 struct tegra_kbc *kbc;
584 struct input_dev *input_dev;
585 struct resource *res;
586 int irq;
587 int err;
588 int num_rows = 0;
589 unsigned int debounce_cnt;
590 unsigned int scan_time_rows;
591
592 if (!pdata)
593 return -EINVAL;
594
595 if (!tegra_kbc_check_pin_cfg(pdata, &pdev->dev, &num_rows))
596 return -EINVAL;
597
598 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
599 if (!res) {
600 dev_err(&pdev->dev, "failed to get I/O memory\n");
601 return -ENXIO;
602 }
603
604 irq = platform_get_irq(pdev, 0);
605 if (irq < 0) {
606 dev_err(&pdev->dev, "failed to get keyboard IRQ\n");
607 return -ENXIO;
608 }
609
610 kbc = kzalloc(sizeof(*kbc), GFP_KERNEL);
611 input_dev = input_allocate_device();
612 if (!kbc || !input_dev) {
613 err = -ENOMEM;
614 goto err_free_mem;
615 }
616
617 kbc->pdata = pdata;
618 kbc->idev = input_dev;
619 kbc->irq = irq;
620 spin_lock_init(&kbc->lock);
621 setup_timer(&kbc->timer, tegra_kbc_keypress_timer, (unsigned long)kbc);
622
623 res = request_mem_region(res->start, resource_size(res), pdev->name);
624 if (!res) {
625 dev_err(&pdev->dev, "failed to request I/O memory\n");
626 err = -EBUSY;
627 goto err_free_mem;
628 }
629
630 kbc->mmio = ioremap(res->start, resource_size(res));
631 if (!kbc->mmio) {
632 dev_err(&pdev->dev, "failed to remap I/O memory\n");
633 err = -ENXIO;
634 goto err_free_mem_region;
635 }
636
637 kbc->clk = clk_get(&pdev->dev, NULL);
638 if (IS_ERR(kbc->clk)) {
639 dev_err(&pdev->dev, "failed to get keyboard clock\n");
640 err = PTR_ERR(kbc->clk);
641 goto err_iounmap;
642 }
643
644 /*
645 * The time delay between two consecutive reads of the FIFO is
646 * the sum of the repeat time and the time taken for scanning
647 * the rows. There is an additional delay before the row scanning
648 * starts. The repoll delay is computed in milliseconds.
649 */
650 debounce_cnt = min(pdata->debounce_cnt, KBC_MAX_DEBOUNCE_CNT);
651 scan_time_rows = (KBC_ROW_SCAN_TIME + debounce_cnt) * num_rows;
652 kbc->repoll_dly = KBC_ROW_SCAN_DLY + scan_time_rows + pdata->repeat_cnt;
653 kbc->repoll_dly = DIV_ROUND_UP(kbc->repoll_dly, KBC_CYCLE_MS);
654
655 input_dev->name = pdev->name;
656 input_dev->id.bustype = BUS_HOST;
657 input_dev->dev.parent = &pdev->dev;
658 input_dev->open = tegra_kbc_open;
659 input_dev->close = tegra_kbc_close;
660
661 input_set_drvdata(input_dev, kbc);
662
663 input_dev->evbit[0] = BIT_MASK(EV_KEY) | BIT_MASK(EV_REP);
664 input_set_capability(input_dev, EV_MSC, MSC_SCAN);
665
666 input_dev->keycode = kbc->keycode;
667 input_dev->keycodesize = sizeof(kbc->keycode[0]);
668 input_dev->keycodemax = KBC_MAX_KEY;
669 if (pdata->use_fn_map)
670 input_dev->keycodemax *= 2;
671
672 kbc->use_fn_map = pdata->use_fn_map;
673 kbc->use_ghost_filter = pdata->use_ghost_filter;
674 keymap_data = pdata->keymap_data ?: &tegra_kbc_default_keymap_data;
675 matrix_keypad_build_keymap(keymap_data, KBC_ROW_SHIFT,
676 input_dev->keycode, input_dev->keybit);
677
678 err = request_irq(kbc->irq, tegra_kbc_isr, IRQF_TRIGGER_HIGH,
679 pdev->name, kbc);
680 if (err) {
681 dev_err(&pdev->dev, "failed to request keyboard IRQ\n");
682 goto err_put_clk;
683 }
684
685 disable_irq(kbc->irq);
686
687 err = input_register_device(kbc->idev);
688 if (err) {
689 dev_err(&pdev->dev, "failed to register input device\n");
690 goto err_free_irq;
691 }
692
693 platform_set_drvdata(pdev, kbc);
694 device_init_wakeup(&pdev->dev, pdata->wakeup);
695
696 return 0;
697
698 err_free_irq:
699 free_irq(kbc->irq, pdev);
700 err_put_clk:
701 clk_put(kbc->clk);
702 err_iounmap:
703 iounmap(kbc->mmio);
704 err_free_mem_region:
705 release_mem_region(res->start, resource_size(res));
706 err_free_mem:
707 input_free_device(input_dev);
708 kfree(kbc);
709
710 return err;
711 }
712
713 static int __devexit tegra_kbc_remove(struct platform_device *pdev)
714 {
715 struct tegra_kbc *kbc = platform_get_drvdata(pdev);
716 struct resource *res;
717
718 free_irq(kbc->irq, pdev);
719 clk_put(kbc->clk);
720
721 input_unregister_device(kbc->idev);
722 iounmap(kbc->mmio);
723 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
724 release_mem_region(res->start, resource_size(res));
725
726 kfree(kbc);
727
728 platform_set_drvdata(pdev, NULL);
729
730 return 0;
731 }
732
733 #ifdef CONFIG_PM_SLEEP
734 static int tegra_kbc_suspend(struct device *dev)
735 {
736 struct platform_device *pdev = to_platform_device(dev);
737 struct tegra_kbc *kbc = platform_get_drvdata(pdev);
738
739 mutex_lock(&kbc->idev->mutex);
740 if (device_may_wakeup(&pdev->dev)) {
741 disable_irq(kbc->irq);
742 del_timer_sync(&kbc->timer);
743 tegra_kbc_set_fifo_interrupt(kbc, false);
744
745 /* Forcefully clear the interrupt status */
746 writel(0x7, kbc->mmio + KBC_INT_0);
747 /*
748 * Store the previous resident time of continuous polling mode.
749 * Force the keyboard into interrupt mode.
750 */
751 kbc->cp_to_wkup_dly = readl(kbc->mmio + KBC_TO_CNT_0);
752 writel(0, kbc->mmio + KBC_TO_CNT_0);
753
754 tegra_kbc_setup_wakekeys(kbc, true);
755 msleep(30);
756
757 enable_irq_wake(kbc->irq);
758 } else {
759 if (kbc->idev->users)
760 tegra_kbc_stop(kbc);
761 }
762 mutex_unlock(&kbc->idev->mutex);
763
764 return 0;
765 }
766
767 static int tegra_kbc_resume(struct device *dev)
768 {
769 struct platform_device *pdev = to_platform_device(dev);
770 struct tegra_kbc *kbc = platform_get_drvdata(pdev);
771 int err = 0;
772
773 mutex_lock(&kbc->idev->mutex);
774 if (device_may_wakeup(&pdev->dev)) {
775 disable_irq_wake(kbc->irq);
776 tegra_kbc_setup_wakekeys(kbc, false);
777
778 /* Restore the resident time of continuous polling mode. */
779 writel(kbc->cp_to_wkup_dly, kbc->mmio + KBC_TO_CNT_0);
780
781 tegra_kbc_set_fifo_interrupt(kbc, true);
782
783 enable_irq(kbc->irq);
784 } else {
785 if (kbc->idev->users)
786 err = tegra_kbc_start(kbc);
787 }
788 mutex_unlock(&kbc->idev->mutex);
789
790 return err;
791 }
792 #endif
793
794 static SIMPLE_DEV_PM_OPS(tegra_kbc_pm_ops, tegra_kbc_suspend, tegra_kbc_resume);
795
796 static struct platform_driver tegra_kbc_driver = {
797 .probe = tegra_kbc_probe,
798 .remove = __devexit_p(tegra_kbc_remove),
799 .driver = {
800 .name = "tegra-kbc",
801 .owner = THIS_MODULE,
802 .pm = &tegra_kbc_pm_ops,
803 },
804 };
805
806 static void __exit tegra_kbc_exit(void)
807 {
808 platform_driver_unregister(&tegra_kbc_driver);
809 }
810 module_exit(tegra_kbc_exit);
811
812 static int __init tegra_kbc_init(void)
813 {
814 return platform_driver_register(&tegra_kbc_driver);
815 }
816 module_init(tegra_kbc_init);
817
818 MODULE_LICENSE("GPL");
819 MODULE_AUTHOR("Rakesh Iyer <riyer@nvidia.com>");
820 MODULE_DESCRIPTION("Tegra matrix keyboard controller driver");
821 MODULE_ALIAS("platform:tegra-kbc");