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dl2k: Clean up rio_ioctl
[zen-stable.git] / drivers / media / video / tm6000 / tm6000-core.c
blob22cc0116deb65e9f9e26f8b2ba844c778d6a5c57
1 /*
2 * tm6000-core.c - driver for TM5600/TM6000/TM6010 USB video capture devices
3 *
4 * Copyright (C) 2006-2007 Mauro Carvalho Chehab <mchehab@infradead.org>
5 *
6 * Copyright (C) 2007 Michel Ludwig <michel.ludwig@gmail.com>
7 * - DVB-T support
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation version 2
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
21 */
22
23 #include <linux/module.h>
24 #include <linux/kernel.h>
25 #include <linux/slab.h>
26 #include <linux/usb.h>
27 #include <linux/i2c.h>
28 #include "tm6000.h"
29 #include "tm6000-regs.h"
30 #include <media/v4l2-common.h>
31 #include <media/tuner.h>
32
33 #define USB_TIMEOUT (5 * HZ) /* ms */
34
35 int tm6000_read_write_usb(struct tm6000_core *dev, u8 req_type, u8 req,
36 u16 value, u16 index, u8 *buf, u16 len)
37 {
38 int ret, i;
39 unsigned int pipe;
40 u8 *data = NULL;
41 int delay = 5000;
42
43 mutex_lock(&dev->usb_lock);
44
45 if (len)
46 data = kzalloc(len, GFP_KERNEL);
47
48 if (req_type & USB_DIR_IN)
49 pipe = usb_rcvctrlpipe(dev->udev, 0);
50 else {
51 pipe = usb_sndctrlpipe(dev->udev, 0);
52 memcpy(data, buf, len);
53 }
54
55 if (tm6000_debug & V4L2_DEBUG_I2C) {
56 printk(KERN_DEBUG "(dev %p, pipe %08x): ", dev->udev, pipe);
57
58 printk(KERN_CONT "%s: %02x %02x %02x %02x %02x %02x %02x %02x ",
59 (req_type & USB_DIR_IN) ? " IN" : "OUT",
60 req_type, req, value&0xff, value>>8, index&0xff,
61 index>>8, len&0xff, len>>8);
62
63 if (!(req_type & USB_DIR_IN)) {
64 printk(KERN_CONT ">>> ");
65 for (i = 0; i < len; i++)
66 printk(KERN_CONT " %02x", buf[i]);
67 printk(KERN_CONT "\n");
68 }
69 }
70
71 ret = usb_control_msg(dev->udev, pipe, req, req_type, value, index,
72 data, len, USB_TIMEOUT);
73
74 if (req_type & USB_DIR_IN)
75 memcpy(buf, data, len);
76
77 if (tm6000_debug & V4L2_DEBUG_I2C) {
78 if (ret < 0) {
79 if (req_type & USB_DIR_IN)
80 printk(KERN_DEBUG "<<< (len=%d)\n", len);
81
82 printk(KERN_CONT "%s: Error #%d\n", __func__, ret);
83 } else if (req_type & USB_DIR_IN) {
84 printk(KERN_CONT "<<< ");
85 for (i = 0; i < len; i++)
86 printk(KERN_CONT " %02x", buf[i]);
87 printk(KERN_CONT "\n");
88 }
89 }
90
91 kfree(data);
92
93 if (dev->quirks & TM6000_QUIRK_NO_USB_DELAY)
94 delay = 0;
95
96 if (req == REQ_16_SET_GET_I2C_WR1_RDN && !(req_type & USB_DIR_IN)) {
97 unsigned int tsleep;
98 /* Calculate delay time, 14000us for 64 bytes */
99 tsleep = (len * 200) + 200;
100 if (tsleep < delay)
101 tsleep = delay;
102 usleep_range(tsleep, tsleep + 1000);
103 }
104 else if (delay)
105 usleep_range(delay, delay + 1000);
106
107 mutex_unlock(&dev->usb_lock);
108 return ret;
109 }
110
111 int tm6000_set_reg(struct tm6000_core *dev, u8 req, u16 value, u16 index)
112 {
113 return
114 tm6000_read_write_usb(dev, USB_DIR_OUT | USB_TYPE_VENDOR,
115 req, value, index, NULL, 0);
116 }
117 EXPORT_SYMBOL_GPL(tm6000_set_reg);
118
119 int tm6000_get_reg(struct tm6000_core *dev, u8 req, u16 value, u16 index)
120 {
121 int rc;
122 u8 buf[1];
123
124 rc = tm6000_read_write_usb(dev, USB_DIR_IN | USB_TYPE_VENDOR, req,
125 value, index, buf, 1);
126
127 if (rc < 0)
128 return rc;
129
130 return *buf;
131 }
132 EXPORT_SYMBOL_GPL(tm6000_get_reg);
133
134 int tm6000_set_reg_mask(struct tm6000_core *dev, u8 req, u16 value,
135 u16 index, u16 mask)
136 {
137 int rc;
138 u8 buf[1];
139 u8 new_index;
140
141 rc = tm6000_read_write_usb(dev, USB_DIR_IN | USB_TYPE_VENDOR, req,
142 value, 0, buf, 1);
143
144 if (rc < 0)
145 return rc;
146
147 new_index = (buf[0] & ~mask) | (index & mask);
148
149 if (new_index == buf[0])
150 return 0;
151
152 return tm6000_read_write_usb(dev, USB_DIR_OUT | USB_TYPE_VENDOR,
153 req, value, new_index, NULL, 0);
154 }
155 EXPORT_SYMBOL_GPL(tm6000_set_reg_mask);
156
157 int tm6000_get_reg16(struct tm6000_core *dev, u8 req, u16 value, u16 index)
158 {
159 int rc;
160 u8 buf[2];
161
162 rc = tm6000_read_write_usb(dev, USB_DIR_IN | USB_TYPE_VENDOR, req,
163 value, index, buf, 2);
164
165 if (rc < 0)
166 return rc;
167
168 return buf[1]|buf[0]<<8;
169 }
170
171 int tm6000_get_reg32(struct tm6000_core *dev, u8 req, u16 value, u16 index)
172 {
173 int rc;
174 u8 buf[4];
175
176 rc = tm6000_read_write_usb(dev, USB_DIR_IN | USB_TYPE_VENDOR, req,
177 value, index, buf, 4);
178
179 if (rc < 0)
180 return rc;
181
182 return buf[3] | buf[2] << 8 | buf[1] << 16 | buf[0] << 24;
183 }
184
185 int tm6000_i2c_reset(struct tm6000_core *dev, u16 tsleep)
186 {
187 int rc;
188
189 rc = tm6000_set_reg(dev, REQ_03_SET_GET_MCU_PIN, TM6000_GPIO_CLK, 0);
190 if (rc < 0)
191 return rc;
192
193 msleep(tsleep);
194
195 rc = tm6000_set_reg(dev, REQ_03_SET_GET_MCU_PIN, TM6000_GPIO_CLK, 1);
196 msleep(tsleep);
197
198 return rc;
199 }
200
201 void tm6000_set_fourcc_format(struct tm6000_core *dev)
202 {
203 if (dev->dev_type == TM6010) {
204 int val;
205
206 val = tm6000_get_reg(dev, TM6010_REQ07_RCC_ACTIVE_IF, 0) & 0xfc;
207 if (dev->fourcc == V4L2_PIX_FMT_UYVY)
208 tm6000_set_reg(dev, TM6010_REQ07_RCC_ACTIVE_IF, val);
209 else
210 tm6000_set_reg(dev, TM6010_REQ07_RCC_ACTIVE_IF, val | 1);
211 } else {
212 if (dev->fourcc == V4L2_PIX_FMT_UYVY)
213 tm6000_set_reg(dev, TM6010_REQ07_RC1_TRESHOLD, 0xd0);
214 else
215 tm6000_set_reg(dev, TM6010_REQ07_RC1_TRESHOLD, 0x90);
216 }
217 }
218
219 static void tm6000_set_vbi(struct tm6000_core *dev)
220 {
221 /*
222 * FIXME:
223 * VBI lines and start/end are different between 60Hz and 50Hz
224 * So, it is very likely that we need to change the config to
225 * something that takes it into account, doing something different
226 * if (dev->norm & V4L2_STD_525_60)
227 */
228
229 if (dev->dev_type == TM6010) {
230 tm6000_set_reg(dev, TM6010_REQ07_R3F_RESET, 0x01);
231 tm6000_set_reg(dev, TM6010_REQ07_R41_TELETEXT_VBI_CODE1, 0x27);
232 tm6000_set_reg(dev, TM6010_REQ07_R42_VBI_DATA_HIGH_LEVEL, 0x55);
233 tm6000_set_reg(dev, TM6010_REQ07_R43_VBI_DATA_TYPE_LINE7, 0x66);
234 tm6000_set_reg(dev, TM6010_REQ07_R44_VBI_DATA_TYPE_LINE8, 0x66);
235 tm6000_set_reg(dev, TM6010_REQ07_R45_VBI_DATA_TYPE_LINE9, 0x66);
236 tm6000_set_reg(dev,
237 TM6010_REQ07_R46_VBI_DATA_TYPE_LINE10, 0x66);
238 tm6000_set_reg(dev,
239 TM6010_REQ07_R47_VBI_DATA_TYPE_LINE11, 0x66);
240 tm6000_set_reg(dev,
241 TM6010_REQ07_R48_VBI_DATA_TYPE_LINE12, 0x66);
242 tm6000_set_reg(dev,
243 TM6010_REQ07_R49_VBI_DATA_TYPE_LINE13, 0x66);
244 tm6000_set_reg(dev,
245 TM6010_REQ07_R4A_VBI_DATA_TYPE_LINE14, 0x66);
246 tm6000_set_reg(dev,
247 TM6010_REQ07_R4B_VBI_DATA_TYPE_LINE15, 0x66);
248 tm6000_set_reg(dev,
249 TM6010_REQ07_R4C_VBI_DATA_TYPE_LINE16, 0x66);
250 tm6000_set_reg(dev,
251 TM6010_REQ07_R4D_VBI_DATA_TYPE_LINE17, 0x66);
252 tm6000_set_reg(dev,
253 TM6010_REQ07_R4E_VBI_DATA_TYPE_LINE18, 0x66);
254 tm6000_set_reg(dev,
255 TM6010_REQ07_R4F_VBI_DATA_TYPE_LINE19, 0x66);
256 tm6000_set_reg(dev,
257 TM6010_REQ07_R50_VBI_DATA_TYPE_LINE20, 0x66);
258 tm6000_set_reg(dev,
259 TM6010_REQ07_R51_VBI_DATA_TYPE_LINE21, 0x66);
260 tm6000_set_reg(dev,
261 TM6010_REQ07_R52_VBI_DATA_TYPE_LINE22, 0x66);
262 tm6000_set_reg(dev,
263 TM6010_REQ07_R53_VBI_DATA_TYPE_LINE23, 0x00);
264 tm6000_set_reg(dev,
265 TM6010_REQ07_R54_VBI_DATA_TYPE_RLINES, 0x00);
266 tm6000_set_reg(dev,
267 TM6010_REQ07_R55_VBI_LOOP_FILTER_GAIN, 0x01);
268 tm6000_set_reg(dev,
269 TM6010_REQ07_R56_VBI_LOOP_FILTER_I_GAIN, 0x00);
270 tm6000_set_reg(dev,
271 TM6010_REQ07_R57_VBI_LOOP_FILTER_P_GAIN, 0x02);
272 tm6000_set_reg(dev, TM6010_REQ07_R58_VBI_CAPTION_DTO1, 0x35);
273 tm6000_set_reg(dev, TM6010_REQ07_R59_VBI_CAPTION_DTO0, 0xa0);
274 tm6000_set_reg(dev, TM6010_REQ07_R5A_VBI_TELETEXT_DTO1, 0x11);
275 tm6000_set_reg(dev, TM6010_REQ07_R5B_VBI_TELETEXT_DTO0, 0x4c);
276 tm6000_set_reg(dev, TM6010_REQ07_R40_TELETEXT_VBI_CODE0, 0x01);
277 tm6000_set_reg(dev, TM6010_REQ07_R3F_RESET, 0x00);
278 }
279 }
280
281 int tm6000_init_analog_mode(struct tm6000_core *dev)
282 {
283 struct v4l2_frequency f;
284
285 if (dev->dev_type == TM6010) {
286 u8 active = TM6010_REQ07_RCC_ACTIVE_IF_AUDIO_ENABLE;
287
288 if (!dev->radio)
289 active |= TM6010_REQ07_RCC_ACTIVE_IF_VIDEO_ENABLE;
290
291 /* Enable video and audio */
292 tm6000_set_reg_mask(dev, TM6010_REQ07_RCC_ACTIVE_IF,
293 active, 0x60);
294 /* Disable TS input */
295 tm6000_set_reg_mask(dev, TM6010_REQ07_RC0_ACTIVE_VIDEO_SOURCE,
296 0x00, 0x40);
297 } else {
298 /* Enables soft reset */
299 tm6000_set_reg(dev, TM6010_REQ07_R3F_RESET, 0x01);
300
301 if (dev->scaler)
302 /* Disable Hfilter and Enable TS Drop err */
303 tm6000_set_reg(dev, TM6010_REQ07_RC0_ACTIVE_VIDEO_SOURCE, 0x20);
304 else /* Enable Hfilter and disable TS Drop err */
305 tm6000_set_reg(dev, TM6010_REQ07_RC0_ACTIVE_VIDEO_SOURCE, 0x80);
306
307 tm6000_set_reg(dev, TM6010_REQ07_RC3_HSTART1, 0x88);
308 tm6000_set_reg(dev, TM6000_REQ07_RDA_CLK_SEL, 0x23);
309 tm6000_set_reg(dev, TM6010_REQ07_RD1_ADDR_FOR_REQ1, 0xc0);
310 tm6000_set_reg(dev, TM6010_REQ07_RD2_ADDR_FOR_REQ2, 0xd8);
311 tm6000_set_reg(dev, TM6010_REQ07_RD6_ENDP_REQ1_REQ2, 0x06);
312 tm6000_set_reg(dev, TM6000_REQ07_RDF_PWDOWN_ACLK, 0x1f);
313
314 /* AP Software reset */
315 tm6000_set_reg(dev, TM6010_REQ07_RFF_SOFT_RESET, 0x08);
316 tm6000_set_reg(dev, TM6010_REQ07_RFF_SOFT_RESET, 0x00);
317
318 tm6000_set_fourcc_format(dev);
319
320 /* Disables soft reset */
321 tm6000_set_reg(dev, TM6010_REQ07_R3F_RESET, 0x00);
322 }
323 msleep(20);
324
325 /* Tuner firmware can now be loaded */
326
327 /*
328 * FIXME: This is a hack! xc3028 "sleeps" when no channel is detected
329 * for more than a few seconds. Not sure why, as this behavior does
330 * not happen on other devices with xc3028. So, I suspect that it
331 * is yet another bug at tm6000. After start sleeping, decoding
332 * doesn't start automatically. Instead, it requires some
333 * I2C commands to wake it up. As we want to have image at the
334 * beginning, we needed to add this hack. The better would be to
335 * discover some way to make tm6000 to wake up without this hack.
336 */
337 f.frequency = dev->freq;
338 v4l2_device_call_all(&dev->v4l2_dev, 0, tuner, s_frequency, &f);
339
340 msleep(100);
341 tm6000_set_standard(dev);
342 tm6000_set_vbi(dev);
343 tm6000_set_audio_bitrate(dev, 48000);
344
345 /* switch dvb led off */
346 if (dev->gpio.dvb_led) {
347 tm6000_set_reg(dev, REQ_03_SET_GET_MCU_PIN,
348 dev->gpio.dvb_led, 0x01);
349 }
350
351 return 0;
352 }
353
354 int tm6000_init_digital_mode(struct tm6000_core *dev)
355 {
356 if (dev->dev_type == TM6010) {
357 /* Disable video and audio */
358 tm6000_set_reg_mask(dev, TM6010_REQ07_RCC_ACTIVE_IF,
359 0x00, 0x60);
360 /* Enable TS input */
361 tm6000_set_reg_mask(dev, TM6010_REQ07_RC0_ACTIVE_VIDEO_SOURCE,
362 0x40, 0x40);
363 /* all power down, but not the digital data port */
364 tm6000_set_reg(dev, TM6010_REQ07_RFE_POWER_DOWN, 0x28);
365 tm6000_set_reg(dev, TM6010_REQ08_RE2_POWER_DOWN_CTRL1, 0xfc);
366 tm6000_set_reg(dev, TM6010_REQ08_RE6_POWER_DOWN_CTRL2, 0xff);
367 } else {
368 tm6000_set_reg(dev, TM6010_REQ07_RFF_SOFT_RESET, 0x08);
369 tm6000_set_reg(dev, TM6010_REQ07_RFF_SOFT_RESET, 0x00);
370 tm6000_set_reg(dev, TM6010_REQ07_R3F_RESET, 0x01);
371 tm6000_set_reg(dev, TM6000_REQ07_RDF_PWDOWN_ACLK, 0x08);
372 tm6000_set_reg(dev, TM6000_REQ07_RE2_VADC_STATUS_CTL, 0x0c);
373 tm6000_set_reg(dev, TM6000_REQ07_RE8_VADC_PWDOWN_CTL, 0xff);
374 tm6000_set_reg(dev, TM6000_REQ07_REB_VADC_AADC_MODE, 0xd8);
375 tm6000_set_reg(dev, TM6010_REQ07_RC0_ACTIVE_VIDEO_SOURCE, 0x40);
376 tm6000_set_reg(dev, TM6010_REQ07_RC1_TRESHOLD, 0xd0);
377 tm6000_set_reg(dev, TM6010_REQ07_RC3_HSTART1, 0x09);
378 tm6000_set_reg(dev, TM6000_REQ07_RDA_CLK_SEL, 0x37);
379 tm6000_set_reg(dev, TM6010_REQ07_RD1_ADDR_FOR_REQ1, 0xd8);
380 tm6000_set_reg(dev, TM6010_REQ07_RD2_ADDR_FOR_REQ2, 0xc0);
381 tm6000_set_reg(dev, TM6010_REQ07_RD6_ENDP_REQ1_REQ2, 0x60);
382
383 tm6000_set_reg(dev, TM6000_REQ07_RE2_VADC_STATUS_CTL, 0x0c);
384 tm6000_set_reg(dev, TM6000_REQ07_RE8_VADC_PWDOWN_CTL, 0xff);
385 tm6000_set_reg(dev, TM6000_REQ07_REB_VADC_AADC_MODE, 0x08);
386 msleep(50);
387
388 tm6000_set_reg(dev, REQ_04_EN_DISABLE_MCU_INT, 0x0020, 0x00);
389 msleep(50);
390 tm6000_set_reg(dev, REQ_04_EN_DISABLE_MCU_INT, 0x0020, 0x01);
391 msleep(50);
392 tm6000_set_reg(dev, REQ_04_EN_DISABLE_MCU_INT, 0x0020, 0x00);
393 msleep(100);
394 }
395
396 /* switch dvb led on */
397 if (dev->gpio.dvb_led) {
398 tm6000_set_reg(dev, REQ_03_SET_GET_MCU_PIN,
399 dev->gpio.dvb_led, 0x00);
400 }
401
402 return 0;
403 }
404 EXPORT_SYMBOL(tm6000_init_digital_mode);
405
406 struct reg_init {
407 u8 req;
408 u8 reg;
409 u8 val;
410 };
411
412 /* The meaning of those initializations are unknown */
413 static struct reg_init tm6000_init_tab[] = {
414 /* REG VALUE */
415 { TM6000_REQ07_RDF_PWDOWN_ACLK, 0x1f },
416 { TM6010_REQ07_RFF_SOFT_RESET, 0x08 },
417 { TM6010_REQ07_RFF_SOFT_RESET, 0x00 },
418 { TM6010_REQ07_RD5_POWERSAVE, 0x4f },
419 { TM6000_REQ07_RDA_CLK_SEL, 0x23 },
420 { TM6000_REQ07_RDB_OUT_SEL, 0x08 },
421 { TM6000_REQ07_RE2_VADC_STATUS_CTL, 0x00 },
422 { TM6000_REQ07_RE3_VADC_INP_LPF_SEL1, 0x10 },
423 { TM6000_REQ07_RE5_VADC_INP_LPF_SEL2, 0x00 },
424 { TM6000_REQ07_RE8_VADC_PWDOWN_CTL, 0x00 },
425 { TM6000_REQ07_REB_VADC_AADC_MODE, 0x64 }, /* 48000 bits/sample, external input */
426 { TM6000_REQ07_REE_VADC_CTRL_SEL_CONTROL, 0xc2 },
427
428 { TM6010_REQ07_R3F_RESET, 0x01 }, /* Start of soft reset */
429 { TM6010_REQ07_R00_VIDEO_CONTROL0, 0x00 },
430 { TM6010_REQ07_R01_VIDEO_CONTROL1, 0x07 },
431 { TM6010_REQ07_R02_VIDEO_CONTROL2, 0x5f },
432 { TM6010_REQ07_R03_YC_SEP_CONTROL, 0x00 },
433 { TM6010_REQ07_R05_NOISE_THRESHOLD, 0x64 },
434 { TM6010_REQ07_R07_OUTPUT_CONTROL, 0x01 },
435 { TM6010_REQ07_R08_LUMA_CONTRAST_ADJ, 0x82 },
436 { TM6010_REQ07_R09_LUMA_BRIGHTNESS_ADJ, 0x36 },
437 { TM6010_REQ07_R0A_CHROMA_SATURATION_ADJ, 0x50 },
438 { TM6010_REQ07_R0C_CHROMA_AGC_CONTROL, 0x6a },
439 { TM6010_REQ07_R11_AGC_PEAK_CONTROL, 0xc9 },
440 { TM6010_REQ07_R12_AGC_GATE_STARTH, 0x07 },
441 { TM6010_REQ07_R13_AGC_GATE_STARTL, 0x3b },
442 { TM6010_REQ07_R14_AGC_GATE_WIDTH, 0x47 },
443 { TM6010_REQ07_R15_AGC_BP_DELAY, 0x6f },
444 { TM6010_REQ07_R17_HLOOP_MAXSTATE, 0xcd },
445 { TM6010_REQ07_R18_CHROMA_DTO_INCREMENT3, 0x1e },
446 { TM6010_REQ07_R19_CHROMA_DTO_INCREMENT2, 0x8b },
447 { TM6010_REQ07_R1A_CHROMA_DTO_INCREMENT1, 0xa2 },
448 { TM6010_REQ07_R1B_CHROMA_DTO_INCREMENT0, 0xe9 },
449 { TM6010_REQ07_R1C_HSYNC_DTO_INCREMENT3, 0x1c },
450 { TM6010_REQ07_R1D_HSYNC_DTO_INCREMENT2, 0xcc },
451 { TM6010_REQ07_R1E_HSYNC_DTO_INCREMENT1, 0xcc },
452 { TM6010_REQ07_R1F_HSYNC_DTO_INCREMENT0, 0xcd },
453 { TM6010_REQ07_R20_HSYNC_RISING_EDGE_TIME, 0x3c },
454 { TM6010_REQ07_R21_HSYNC_PHASE_OFFSET, 0x3c },
455 { TM6010_REQ07_R2D_CHROMA_BURST_END, 0x48 },
456 { TM6010_REQ07_R2E_ACTIVE_VIDEO_HSTART, 0x88 },
457 { TM6010_REQ07_R30_ACTIVE_VIDEO_VSTART, 0x22 },
458 { TM6010_REQ07_R31_ACTIVE_VIDEO_VHIGHT, 0x61 },
459 { TM6010_REQ07_R32_VSYNC_HLOCK_MIN, 0x74 },
460 { TM6010_REQ07_R33_VSYNC_HLOCK_MAX, 0x1c },
461 { TM6010_REQ07_R34_VSYNC_AGC_MIN, 0x74 },
462 { TM6010_REQ07_R35_VSYNC_AGC_MAX, 0x1c },
463 { TM6010_REQ07_R36_VSYNC_VBI_MIN, 0x7a },
464 { TM6010_REQ07_R37_VSYNC_VBI_MAX, 0x26 },
465 { TM6010_REQ07_R38_VSYNC_THRESHOLD, 0x40 },
466 { TM6010_REQ07_R39_VSYNC_TIME_CONSTANT, 0x0a },
467 { TM6010_REQ07_R42_VBI_DATA_HIGH_LEVEL, 0x55 },
468 { TM6010_REQ07_R51_VBI_DATA_TYPE_LINE21, 0x11 },
469 { TM6010_REQ07_R55_VBI_LOOP_FILTER_GAIN, 0x01 },
470 { TM6010_REQ07_R57_VBI_LOOP_FILTER_P_GAIN, 0x02 },
471 { TM6010_REQ07_R58_VBI_CAPTION_DTO1, 0x35 },
472 { TM6010_REQ07_R59_VBI_CAPTION_DTO0, 0xa0 },
473 { TM6010_REQ07_R80_COMB_FILTER_TRESHOLD, 0x15 },
474 { TM6010_REQ07_R82_COMB_FILTER_CONFIG, 0x42 },
475 { TM6010_REQ07_RC1_TRESHOLD, 0xd0 },
476 { TM6010_REQ07_RC3_HSTART1, 0x88 },
477 { TM6010_REQ07_R3F_RESET, 0x00 }, /* End of the soft reset */
478 { TM6010_REQ05_R18_IMASK7, 0x00 },
479 };
480
481 static struct reg_init tm6010_init_tab[] = {
482 { TM6010_REQ07_RC0_ACTIVE_VIDEO_SOURCE, 0x00 },
483 { TM6010_REQ07_RC4_HSTART0, 0xa0 },
484 { TM6010_REQ07_RC6_HEND0, 0x40 },
485 { TM6010_REQ07_RCA_VEND0, 0x31 },
486 { TM6010_REQ07_RCC_ACTIVE_IF, 0xe1 },
487 { TM6010_REQ07_RE0_DVIDEO_SOURCE, 0x03 },
488 { TM6010_REQ07_RFE_POWER_DOWN, 0x7f },
489
490 { TM6010_REQ08_RE2_POWER_DOWN_CTRL1, 0xf0 },
491 { TM6010_REQ08_RE3_ADC_IN1_SEL, 0xf4 },
492 { TM6010_REQ08_RE4_ADC_IN2_SEL, 0xf8 },
493 { TM6010_REQ08_RE6_POWER_DOWN_CTRL2, 0x00 },
494 { TM6010_REQ08_REA_BUFF_DRV_CTRL, 0xf2 },
495 { TM6010_REQ08_REB_SIF_GAIN_CTRL, 0xf0 },
496 { TM6010_REQ08_REC_REVERSE_YC_CTRL, 0xc2 },
497 { TM6010_REQ08_RF0_DAUDIO_INPUT_CONFIG, 0x60 },
498 { TM6010_REQ08_RF1_AADC_POWER_DOWN, 0xfc },
499
500 { TM6010_REQ07_R3F_RESET, 0x01 },
501 { TM6010_REQ07_R00_VIDEO_CONTROL0, 0x00 },
502 { TM6010_REQ07_R01_VIDEO_CONTROL1, 0x07 },
503 { TM6010_REQ07_R02_VIDEO_CONTROL2, 0x5f },
504 { TM6010_REQ07_R03_YC_SEP_CONTROL, 0x00 },
505 { TM6010_REQ07_R05_NOISE_THRESHOLD, 0x64 },
506 { TM6010_REQ07_R07_OUTPUT_CONTROL, 0x01 },
507 { TM6010_REQ07_R08_LUMA_CONTRAST_ADJ, 0x82 },
508 { TM6010_REQ07_R09_LUMA_BRIGHTNESS_ADJ, 0x36 },
509 { TM6010_REQ07_R0A_CHROMA_SATURATION_ADJ, 0x50 },
510 { TM6010_REQ07_R0C_CHROMA_AGC_CONTROL, 0x6a },
511 { TM6010_REQ07_R11_AGC_PEAK_CONTROL, 0xc9 },
512 { TM6010_REQ07_R12_AGC_GATE_STARTH, 0x07 },
513 { TM6010_REQ07_R13_AGC_GATE_STARTL, 0x3b },
514 { TM6010_REQ07_R14_AGC_GATE_WIDTH, 0x47 },
515 { TM6010_REQ07_R15_AGC_BP_DELAY, 0x6f },
516 { TM6010_REQ07_R17_HLOOP_MAXSTATE, 0xcd },
517 { TM6010_REQ07_R18_CHROMA_DTO_INCREMENT3, 0x1e },
518 { TM6010_REQ07_R19_CHROMA_DTO_INCREMENT2, 0x8b },
519 { TM6010_REQ07_R1A_CHROMA_DTO_INCREMENT1, 0xa2 },
520 { TM6010_REQ07_R1B_CHROMA_DTO_INCREMENT0, 0xe9 },
521 { TM6010_REQ07_R1C_HSYNC_DTO_INCREMENT3, 0x1c },
522 { TM6010_REQ07_R1D_HSYNC_DTO_INCREMENT2, 0xcc },
523 { TM6010_REQ07_R1E_HSYNC_DTO_INCREMENT1, 0xcc },
524 { TM6010_REQ07_R1F_HSYNC_DTO_INCREMENT0, 0xcd },
525 { TM6010_REQ07_R20_HSYNC_RISING_EDGE_TIME, 0x3c },
526 { TM6010_REQ07_R21_HSYNC_PHASE_OFFSET, 0x3c },
527 { TM6010_REQ07_R2D_CHROMA_BURST_END, 0x48 },
528 { TM6010_REQ07_R2E_ACTIVE_VIDEO_HSTART, 0x88 },
529 { TM6010_REQ07_R30_ACTIVE_VIDEO_VSTART, 0x22 },
530 { TM6010_REQ07_R31_ACTIVE_VIDEO_VHIGHT, 0x61 },
531 { TM6010_REQ07_R32_VSYNC_HLOCK_MIN, 0x74 },
532 { TM6010_REQ07_R33_VSYNC_HLOCK_MAX, 0x1c },
533 { TM6010_REQ07_R34_VSYNC_AGC_MIN, 0x74 },
534 { TM6010_REQ07_R35_VSYNC_AGC_MAX, 0x1c },
535 { TM6010_REQ07_R36_VSYNC_VBI_MIN, 0x7a },
536 { TM6010_REQ07_R37_VSYNC_VBI_MAX, 0x26 },
537 { TM6010_REQ07_R38_VSYNC_THRESHOLD, 0x40 },
538 { TM6010_REQ07_R39_VSYNC_TIME_CONSTANT, 0x0a },
539 { TM6010_REQ07_R42_VBI_DATA_HIGH_LEVEL, 0x55 },
540 { TM6010_REQ07_R51_VBI_DATA_TYPE_LINE21, 0x11 },
541 { TM6010_REQ07_R55_VBI_LOOP_FILTER_GAIN, 0x01 },
542 { TM6010_REQ07_R57_VBI_LOOP_FILTER_P_GAIN, 0x02 },
543 { TM6010_REQ07_R58_VBI_CAPTION_DTO1, 0x35 },
544 { TM6010_REQ07_R59_VBI_CAPTION_DTO0, 0xa0 },
545 { TM6010_REQ07_R80_COMB_FILTER_TRESHOLD, 0x15 },
546 { TM6010_REQ07_R82_COMB_FILTER_CONFIG, 0x42 },
547 { TM6010_REQ07_RC1_TRESHOLD, 0xd0 },
548 { TM6010_REQ07_RC3_HSTART1, 0x88 },
549 { TM6010_REQ07_R3F_RESET, 0x00 },
550
551 { TM6010_REQ05_R18_IMASK7, 0x00 },
552
553 { TM6010_REQ07_RDC_IR_LEADER1, 0xaa },
554 { TM6010_REQ07_RDD_IR_LEADER0, 0x30 },
555 { TM6010_REQ07_RDE_IR_PULSE_CNT1, 0x20 },
556 { TM6010_REQ07_RDF_IR_PULSE_CNT0, 0xd0 },
557 { REQ_04_EN_DISABLE_MCU_INT, 0x02, 0x00 },
558 { TM6010_REQ07_RD8_IR, 0x0f },
559
560 /* set remote wakeup key:any key wakeup */
561 { TM6010_REQ07_RE5_REMOTE_WAKEUP, 0xfe },
562 { TM6010_REQ07_RDA_IR_WAKEUP_SEL, 0xff },
563 };
564
565 int tm6000_init(struct tm6000_core *dev)
566 {
567 int board, rc = 0, i, size;
568 struct reg_init *tab;
569
570 /* Check board revision */
571 board = tm6000_get_reg32(dev, REQ_40_GET_VERSION, 0, 0);
572 if (board >= 0) {
573 switch (board & 0xff) {
574 case 0xf3:
575 printk(KERN_INFO "Found tm6000\n");
576 if (dev->dev_type != TM6000)
577 dev->dev_type = TM6000;
578 break;
579 case 0xf4:
580 printk(KERN_INFO "Found tm6010\n");
581 if (dev->dev_type != TM6010)
582 dev->dev_type = TM6010;
583 break;
584 default:
585 printk(KERN_INFO "Unknown board version = 0x%08x\n", board);
586 }
587 } else
588 printk(KERN_ERR "Error %i while retrieving board version\n", board);
589
590 if (dev->dev_type == TM6010) {
591 tab = tm6010_init_tab;
592 size = ARRAY_SIZE(tm6010_init_tab);
593 } else {
594 tab = tm6000_init_tab;
595 size = ARRAY_SIZE(tm6000_init_tab);
596 }
597
598 /* Load board's initialization table */
599 for (i = 0; i < size; i++) {
600 rc = tm6000_set_reg(dev, tab[i].req, tab[i].reg, tab[i].val);
601 if (rc < 0) {
602 printk(KERN_ERR "Error %i while setting req %d, "
603 "reg %d to value %d\n", rc,
604 tab[i].req, tab[i].reg, tab[i].val);
605 return rc;
606 }
607 }
608
609 msleep(5); /* Just to be conservative */
610
611 rc = tm6000_cards_setup(dev);
612
613 return rc;
614 }
615
616
617 int tm6000_set_audio_bitrate(struct tm6000_core *dev, int bitrate)
618 {
619 int val = 0;
620 u8 areg_f0 = 0x60; /* ADC MCLK = 250 Fs */
621 u8 areg_0a = 0x91; /* SIF 48KHz */
622
623 switch (bitrate) {
624 case 48000:
625 areg_f0 = 0x60; /* ADC MCLK = 250 Fs */
626 areg_0a = 0x91; /* SIF 48KHz */
627 dev->audio_bitrate = bitrate;
628 break;
629 case 32000:
630 areg_f0 = 0x00; /* ADC MCLK = 375 Fs */
631 areg_0a = 0x90; /* SIF 32KHz */
632 dev->audio_bitrate = bitrate;
633 break;
634 default:
635 return -EINVAL;
636 }
637
638
639 /* enable I2S, if we use sif or external I2S device */
640 if (dev->dev_type == TM6010) {
641 val = tm6000_set_reg(dev, TM6010_REQ08_R0A_A_I2S_MOD, areg_0a);
642 if (val < 0)
643 return val;
644
645 val = tm6000_set_reg_mask(dev, TM6010_REQ08_RF0_DAUDIO_INPUT_CONFIG,
646 areg_f0, 0xf0);
647 if (val < 0)
648 return val;
649 } else {
650 val = tm6000_set_reg_mask(dev, TM6000_REQ07_REB_VADC_AADC_MODE,
651 areg_f0, 0xf0);
652 if (val < 0)
653 return val;
654 }
655 return 0;
656 }
657 EXPORT_SYMBOL_GPL(tm6000_set_audio_bitrate);
658
659 int tm6000_set_audio_rinput(struct tm6000_core *dev)
660 {
661 if (dev->dev_type == TM6010) {
662 /* Audio crossbar setting, default SIF1 */
663 u8 areg_f0;
664 u8 areg_07 = 0x10;
665
666 switch (dev->rinput.amux) {
667 case TM6000_AMUX_SIF1:
668 case TM6000_AMUX_SIF2:
669 areg_f0 = 0x03;
670 areg_07 = 0x30;
671 break;
672 case TM6000_AMUX_ADC1:
673 areg_f0 = 0x00;
674 break;
675 case TM6000_AMUX_ADC2:
676 areg_f0 = 0x08;
677 break;
678 case TM6000_AMUX_I2S:
679 areg_f0 = 0x04;
680 break;
681 default:
682 printk(KERN_INFO "%s: audio input dosn't support\n",
683 dev->name);
684 return 0;
685 break;
686 }
687 /* Set audio input crossbar */
688 tm6000_set_reg_mask(dev, TM6010_REQ08_RF0_DAUDIO_INPUT_CONFIG,
689 areg_f0, 0x0f);
690 /* Mux overflow workaround */
691 tm6000_set_reg_mask(dev, TM6010_REQ07_R07_OUTPUT_CONTROL,
692 areg_07, 0xf0);
693 } else {
694 u8 areg_eb;
695 /* Audio setting, default LINE1 */
696 switch (dev->rinput.amux) {
697 case TM6000_AMUX_ADC1:
698 areg_eb = 0x00;
699 break;
700 case TM6000_AMUX_ADC2:
701 areg_eb = 0x04;
702 break;
703 default:
704 printk(KERN_INFO "%s: audio input dosn't support\n",
705 dev->name);
706 return 0;
707 break;
708 }
709 /* Set audio input */
710 tm6000_set_reg_mask(dev, TM6000_REQ07_REB_VADC_AADC_MODE,
711 areg_eb, 0x0f);
712 }
713 return 0;
714 }
715
716 static void tm6010_set_mute_sif(struct tm6000_core *dev, u8 mute)
717 {
718 u8 mute_reg = 0;
719
720 if (mute)
721 mute_reg = 0x08;
722
723 tm6000_set_reg_mask(dev, TM6010_REQ08_R0A_A_I2S_MOD, mute_reg, 0x08);
724 }
725
726 static void tm6010_set_mute_adc(struct tm6000_core *dev, u8 mute)
727 {
728 u8 mute_reg = 0;
729
730 if (mute)
731 mute_reg = 0x20;
732
733 if (dev->dev_type == TM6010) {
734 tm6000_set_reg_mask(dev, TM6010_REQ08_RF2_LEFT_CHANNEL_VOL,
735 mute_reg, 0x20);
736 tm6000_set_reg_mask(dev, TM6010_REQ08_RF3_RIGHT_CHANNEL_VOL,
737 mute_reg, 0x20);
738 } else {
739 tm6000_set_reg_mask(dev, TM6000_REQ07_REC_VADC_AADC_LVOL,
740 mute_reg, 0x20);
741 tm6000_set_reg_mask(dev, TM6000_REQ07_RED_VADC_AADC_RVOL,
742 mute_reg, 0x20);
743 }
744 }
745
746 int tm6000_tvaudio_set_mute(struct tm6000_core *dev, u8 mute)
747 {
748 enum tm6000_mux mux;
749
750 if (dev->radio)
751 mux = dev->rinput.amux;
752 else
753 mux = dev->vinput[dev->input].amux;
754
755 switch (mux) {
756 case TM6000_AMUX_SIF1:
757 case TM6000_AMUX_SIF2:
758 if (dev->dev_type == TM6010)
759 tm6010_set_mute_sif(dev, mute);
760 else {
761 printk(KERN_INFO "ERROR: TM5600 and TM6000 don't has"
762 " SIF audio inputs. Please check the %s"
763 " configuration.\n", dev->name);
764 return -EINVAL;
765 }
766 break;
767 case TM6000_AMUX_ADC1:
768 case TM6000_AMUX_ADC2:
769 tm6010_set_mute_adc(dev, mute);
770 break;
771 default:
772 return -EINVAL;
773 break;
774 }
775 return 0;
776 }
777
778 static void tm6010_set_volume_sif(struct tm6000_core *dev, int vol)
779 {
780 u8 vol_reg;
781
782 vol_reg = vol & 0x0F;
783
784 if (vol < 0)
785 vol_reg |= 0x40;
786
787 tm6000_set_reg(dev, TM6010_REQ08_R07_A_LEFT_VOL, vol_reg);
788 tm6000_set_reg(dev, TM6010_REQ08_R08_A_RIGHT_VOL, vol_reg);
789 }
790
791 static void tm6010_set_volume_adc(struct tm6000_core *dev, int vol)
792 {
793 u8 vol_reg;
794
795 vol_reg = (vol + 0x10) & 0x1f;
796
797 if (dev->dev_type == TM6010) {
798 tm6000_set_reg(dev, TM6010_REQ08_RF2_LEFT_CHANNEL_VOL, vol_reg);
799 tm6000_set_reg(dev, TM6010_REQ08_RF3_RIGHT_CHANNEL_VOL, vol_reg);
800 } else {
801 tm6000_set_reg(dev, TM6000_REQ07_REC_VADC_AADC_LVOL, vol_reg);
802 tm6000_set_reg(dev, TM6000_REQ07_RED_VADC_AADC_RVOL, vol_reg);
803 }
804 }
805
806 void tm6000_set_volume(struct tm6000_core *dev, int vol)
807 {
808 enum tm6000_mux mux;
809
810 if (dev->radio) {
811 mux = dev->rinput.amux;
812 vol += 8; /* Offset to 0 dB */
813 } else
814 mux = dev->vinput[dev->input].amux;
815
816 switch (mux) {
817 case TM6000_AMUX_SIF1:
818 case TM6000_AMUX_SIF2:
819 if (dev->dev_type == TM6010)
820 tm6010_set_volume_sif(dev, vol);
821 else
822 printk(KERN_INFO "ERROR: TM5600 and TM6000 don't has"
823 " SIF audio inputs. Please check the %s"
824 " configuration.\n", dev->name);
825 break;
826 case TM6000_AMUX_ADC1:
827 case TM6000_AMUX_ADC2:
828 tm6010_set_volume_adc(dev, vol);
829 break;
830 default:
831 break;
832 }
833 }
834
835 static LIST_HEAD(tm6000_devlist);
836 static DEFINE_MUTEX(tm6000_devlist_mutex);
837
838 /*
839 * tm6000_realease_resource()
840 */
841
842 void tm6000_remove_from_devlist(struct tm6000_core *dev)
843 {
844 mutex_lock(&tm6000_devlist_mutex);
845 list_del(&dev->devlist);
846 mutex_unlock(&tm6000_devlist_mutex);
847 };
848
849 void tm6000_add_into_devlist(struct tm6000_core *dev)
850 {
851 mutex_lock(&tm6000_devlist_mutex);
852 list_add_tail(&dev->devlist, &tm6000_devlist);
853 mutex_unlock(&tm6000_devlist_mutex);
854 };
855
856 /*
857 * Extension interface
858 */
859
860 static LIST_HEAD(tm6000_extension_devlist);
861
862 int tm6000_call_fillbuf(struct tm6000_core *dev, enum tm6000_ops_type type,
863 char *buf, int size)
864 {
865 struct tm6000_ops *ops = NULL;
866
867 /* FIXME: tm6000_extension_devlist_lock should be a spinlock */
868
869 if (!list_empty(&tm6000_extension_devlist)) {
870 list_for_each_entry(ops, &tm6000_extension_devlist, next) {
871 if (ops->fillbuf && ops->type == type)
872 ops->fillbuf(dev, buf, size);
873 }
874 }
875
876 return 0;
877 }
878
879 int tm6000_register_extension(struct tm6000_ops *ops)
880 {
881 struct tm6000_core *dev = NULL;
882
883 mutex_lock(&tm6000_devlist_mutex);
884 list_add_tail(&ops->next, &tm6000_extension_devlist);
885 list_for_each_entry(dev, &tm6000_devlist, devlist) {
886 ops->init(dev);
887 printk(KERN_INFO "%s: Initialized (%s) extension\n",
888 dev->name, ops->name);
889 }
890 mutex_unlock(&tm6000_devlist_mutex);
891 return 0;
892 }
893 EXPORT_SYMBOL(tm6000_register_extension);
894
895 void tm6000_unregister_extension(struct tm6000_ops *ops)
896 {
897 struct tm6000_core *dev = NULL;
898
899 mutex_lock(&tm6000_devlist_mutex);
900 list_for_each_entry(dev, &tm6000_devlist, devlist)
901 ops->fini(dev);
902
903 printk(KERN_INFO "tm6000: Remove (%s) extension\n", ops->name);
904 list_del(&ops->next);
905 mutex_unlock(&tm6000_devlist_mutex);
906 }
907 EXPORT_SYMBOL(tm6000_unregister_extension);
908
909 void tm6000_init_extension(struct tm6000_core *dev)
910 {
911 struct tm6000_ops *ops = NULL;
912
913 mutex_lock(&tm6000_devlist_mutex);
914 if (!list_empty(&tm6000_extension_devlist)) {
915 list_for_each_entry(ops, &tm6000_extension_devlist, next) {
916 if (ops->init)
917 ops->init(dev);
918 }
919 }
920 mutex_unlock(&tm6000_devlist_mutex);
921 }
922
923 void tm6000_close_extension(struct tm6000_core *dev)
924 {
925 struct tm6000_ops *ops = NULL;
926
927 mutex_lock(&tm6000_devlist_mutex);
928 if (!list_empty(&tm6000_extension_devlist)) {
929 list_for_each_entry(ops, &tm6000_extension_devlist, next) {
930 if (ops->fini)
931 ops->fini(dev);
932 }
933 }
934 mutex_unlock(&tm6000_devlist_mutex);
935 }