drivers/ata/pata_icside.c

   1 #include <linux/kernel.h>
   2 #include <linux/module.h>
   3 #include <linux/init.h>
   4 #include <linux/blkdev.h>
   5 #include <linux/gfp.h>
   6 #include <scsi/scsi_host.h>
   7 #include <linux/ata.h>
   8 #include <linux/libata.h>
   9
  10 #include <asm/dma.h>
  11 #include <asm/ecard.h>
  12
  13 #define DRV_NAME        "pata_icside"
  14
  15 #define ICS_IDENT_OFFSET                0x2280
  16
  17 #define ICS_ARCIN_V5_INTRSTAT           0x0000
  18 #define ICS_ARCIN_V5_INTROFFSET         0x0004
  19
  20 #define ICS_ARCIN_V6_INTROFFSET_1       0x2200
  21 #define ICS_ARCIN_V6_INTRSTAT_1         0x2290
  22 #define ICS_ARCIN_V6_INTROFFSET_2       0x3200
  23 #define ICS_ARCIN_V6_INTRSTAT_2         0x3290
  24
  25 struct portinfo {
  26         unsigned int dataoffset;
  27         unsigned int ctrloffset;
  28         unsigned int stepping;
  29 };
  30
  31 static const struct portinfo pata_icside_portinfo_v5 = {
  32         .dataoffset     = 0x2800,
  33         .ctrloffset     = 0x2b80,
  34         .stepping       = 6,
  35 };
  36
  37 static const struct portinfo pata_icside_portinfo_v6_1 = {
  38         .dataoffset     = 0x2000,
  39         .ctrloffset     = 0x2380,
  40         .stepping       = 6,
  41 };
  42
  43 static const struct portinfo pata_icside_portinfo_v6_2 = {
  44         .dataoffset     = 0x3000,
  45         .ctrloffset     = 0x3380,
  46         .stepping       = 6,
  47 };
  48
  49 struct pata_icside_state {
  50         void __iomem *irq_port;
  51         void __iomem *ioc_base;
  52         unsigned int type;
  53         unsigned int dma;
  54         struct {
  55                 u8 port_sel;
  56                 u8 disabled;
  57                 unsigned int speed[ATA_MAX_DEVICES];
  58         } port[2];
  59 };
  60
  61 struct pata_icside_info {
  62         struct pata_icside_state *state;
  63         struct expansion_card   *ec;
  64         void __iomem            *base;
  65         void __iomem            *irqaddr;
  66         unsigned int            irqmask;
  67         const expansioncard_ops_t *irqops;
  68         unsigned int            mwdma_mask;
  69         unsigned int            nr_ports;
  70         const struct portinfo   *port[2];
  71         unsigned long           raw_base;
  72         unsigned long           raw_ioc_base;
  73 };
  74
  75 #define ICS_TYPE_A3IN   0
  76 #define ICS_TYPE_A3USER 1
  77 #define ICS_TYPE_V6     3
  78 #define ICS_TYPE_V5     15
  79 #define ICS_TYPE_NOTYPE ((unsigned int)-1)
  80
  81 /* ---------------- Version 5 PCB Support Functions --------------------- */
  82 /* Prototype: pata_icside_irqenable_arcin_v5 (struct expansion_card *ec, int irqnr)
  83  * Purpose  : enable interrupts from card
  84  */
  85 static void pata_icside_irqenable_arcin_v5 (struct expansion_card *ec, int irqnr)
  86 {
  87         struct pata_icside_state *state = ec->irq_data;
  88
  89         writeb(0, state->irq_port + ICS_ARCIN_V5_INTROFFSET);
  90 }
  91
  92 /* Prototype: pata_icside_irqdisable_arcin_v5 (struct expansion_card *ec, int irqnr)
  93  * Purpose  : disable interrupts from card
  94  */
  95 static void pata_icside_irqdisable_arcin_v5 (struct expansion_card *ec, int irqnr)
  96 {
  97         struct pata_icside_state *state = ec->irq_data;
  98
  99         readb(state->irq_port + ICS_ARCIN_V5_INTROFFSET);
 100 }
 101
 102 static const expansioncard_ops_t pata_icside_ops_arcin_v5 = {
 103         .irqenable      = pata_icside_irqenable_arcin_v5,
 104         .irqdisable     = pata_icside_irqdisable_arcin_v5,
 105 };
 106
 107
 108 /* ---------------- Version 6 PCB Support Functions --------------------- */
 109 /* Prototype: pata_icside_irqenable_arcin_v6 (struct expansion_card *ec, int irqnr)
 110  * Purpose  : enable interrupts from card
 111  */
 112 static void pata_icside_irqenable_arcin_v6 (struct expansion_card *ec, int irqnr)
 113 {
 114         struct pata_icside_state *state = ec->irq_data;
 115         void __iomem *base = state->irq_port;
 116
 117         if (!state->port[0].disabled)
 118                 writeb(0, base + ICS_ARCIN_V6_INTROFFSET_1);
 119         if (!state->port[1].disabled)
 120                 writeb(0, base + ICS_ARCIN_V6_INTROFFSET_2);
 121 }
 122
 123 /* Prototype: pata_icside_irqdisable_arcin_v6 (struct expansion_card *ec, int irqnr)
 124  * Purpose  : disable interrupts from card
 125  */
 126 static void pata_icside_irqdisable_arcin_v6 (struct expansion_card *ec, int irqnr)
 127 {
 128         struct pata_icside_state *state = ec->irq_data;
 129
 130         readb(state->irq_port + ICS_ARCIN_V6_INTROFFSET_1);
 131         readb(state->irq_port + ICS_ARCIN_V6_INTROFFSET_2);
 132 }
 133
 134 /* Prototype: pata_icside_irqprobe(struct expansion_card *ec)
 135  * Purpose  : detect an active interrupt from card
 136  */
 137 static int pata_icside_irqpending_arcin_v6(struct expansion_card *ec)
 138 {
 139         struct pata_icside_state *state = ec->irq_data;
 140
 141         return readb(state->irq_port + ICS_ARCIN_V6_INTRSTAT_1) & 1 ||
 142                readb(state->irq_port + ICS_ARCIN_V6_INTRSTAT_2) & 1;
 143 }
 144
 145 static const expansioncard_ops_t pata_icside_ops_arcin_v6 = {
 146         .irqenable      = pata_icside_irqenable_arcin_v6,
 147         .irqdisable     = pata_icside_irqdisable_arcin_v6,
 148         .irqpending     = pata_icside_irqpending_arcin_v6,
 149 };
 150
 151
 152 /*
 153  * SG-DMA support.
 154  *
 155  * Similar to the BM-DMA, but we use the RiscPCs IOMD DMA controllers.
 156  * There is only one DMA controller per card, which means that only
 157  * one drive can be accessed at one time.  NOTE! We do not enforce that
 158  * here, but we rely on the main IDE driver spotting that both
 159  * interfaces use the same IRQ, which should guarantee this.
 160  */
 161
 162 /*
 163  * Configure the IOMD to give the appropriate timings for the transfer
 164  * mode being requested.  We take the advice of the ATA standards, and
 165  * calculate the cycle time based on the transfer mode, and the EIDE
 166  * MW DMA specs that the drive provides in the IDENTIFY command.
 167  *
 168  * We have the following IOMD DMA modes to choose from:
 169  *
 170  *      Type    Active          Recovery        Cycle
 171  *      A       250 (250)       312 (550)       562 (800)
 172  *      B       187 (200)       250 (550)       437 (750)
 173  *      C       125 (125)       125 (375)       250 (500)
 174  *      D       62  (50)        125 (375)       187 (425)
 175  *
 176  * (figures in brackets are actual measured timings on DIOR/DIOW)
 177  *
 178  * However, we also need to take care of the read/write active and
 179  * recovery timings:
 180  *
 181  *                      Read    Write
 182  *      Mode    Active  -- Recovery --  Cycle   IOMD type
 183  *      MW0     215     50      215     480     A
 184  *      MW1     80      50      50      150     C
 185  *      MW2     70      25      25      120     C
 186  */
 187 static void pata_icside_set_dmamode(struct ata_port *ap, struct ata_device *adev)
 188 {
 189         struct pata_icside_state *state = ap->host->private_data;
 190         struct ata_timing t;
 191         unsigned int cycle;
 192         char iomd_type;
 193
 194         /*
 195          * DMA is based on a 16MHz clock
 196          */
 197         if (ata_timing_compute(adev, adev->dma_mode, &t, 1000, 1))
 198                 return;
 199
 200         /*
 201          * Choose the IOMD cycle timing which ensure that the interface
 202          * satisfies the measured active, recovery and cycle times.
 203          */
 204         if (t.active <= 50 && t.recover <= 375 && t.cycle <= 425)
 205                 iomd_type = 'D', cycle = 187;
 206         else if (t.active <= 125 && t.recover <= 375 && t.cycle <= 500)
 207                 iomd_type = 'C', cycle = 250;
 208         else if (t.active <= 200 && t.recover <= 550 && t.cycle <= 750)
 209                 iomd_type = 'B', cycle = 437;
 210         else
 211                 iomd_type = 'A', cycle = 562;
 212
 213         ata_dev_info(adev, "timings: act %dns rec %dns cyc %dns (%c)\n",
 214                      t.active, t.recover, t.cycle, iomd_type);
 215
 216         state->port[ap->port_no].speed[adev->devno] = cycle;
 217 }
 218
 219 static void pata_icside_bmdma_setup(struct ata_queued_cmd *qc)
 220 {
 221         struct ata_port *ap = qc->ap;
 222         struct pata_icside_state *state = ap->host->private_data;
 223         unsigned int write = qc->tf.flags & ATA_TFLAG_WRITE;
 224
 225         /*
 226          * We are simplex; BUG if we try to fiddle with DMA
 227          * while it's active.
 228          */
 229         BUG_ON(dma_channel_active(state->dma));
 230
 231         /*
 232          * Route the DMA signals to the correct interface
 233          */
 234         writeb(state->port[ap->port_no].port_sel, state->ioc_base);
 235
 236         set_dma_speed(state->dma, state->port[ap->port_no].speed[qc->dev->devno]);
 237         set_dma_sg(state->dma, qc->sg, qc->n_elem);
 238         set_dma_mode(state->dma, write ? DMA_MODE_WRITE : DMA_MODE_READ);
 239
 240         /* issue r/w command */
 241         ap->ops->sff_exec_command(ap, &qc->tf);
 242 }
 243
 244 static void pata_icside_bmdma_start(struct ata_queued_cmd *qc)
 245 {
 246         struct ata_port *ap = qc->ap;
 247         struct pata_icside_state *state = ap->host->private_data;
 248
 249         BUG_ON(dma_channel_active(state->dma));
 250         enable_dma(state->dma);
 251 }
 252
 253 static void pata_icside_bmdma_stop(struct ata_queued_cmd *qc)
 254 {
 255         struct ata_port *ap = qc->ap;
 256         struct pata_icside_state *state = ap->host->private_data;
 257
 258         disable_dma(state->dma);
 259
 260         /* see ata_bmdma_stop */
 261         ata_sff_dma_pause(ap);
 262 }
 263
 264 static u8 pata_icside_bmdma_status(struct ata_port *ap)
 265 {
 266         struct pata_icside_state *state = ap->host->private_data;
 267         void __iomem *irq_port;
 268
 269         irq_port = state->irq_port + (ap->port_no ? ICS_ARCIN_V6_INTRSTAT_2 :
 270                                                     ICS_ARCIN_V6_INTRSTAT_1);
 271
 272         return readb(irq_port) & 1 ? ATA_DMA_INTR : 0;
 273 }
 274
 275 static int icside_dma_init(struct pata_icside_info *info)
 276 {
 277         struct pata_icside_state *state = info->state;
 278         struct expansion_card *ec = info->ec;
 279         int i;
 280
 281         for (i = 0; i < ATA_MAX_DEVICES; i++) {
 282                 state->port[0].speed[i] = 480;
 283                 state->port[1].speed[i] = 480;
 284         }
 285
 286         if (ec->dma != NO_DMA && !request_dma(ec->dma, DRV_NAME)) {
 287                 state->dma = ec->dma;
 288                 info->mwdma_mask = ATA_MWDMA2;
 289         }
 290
 291         return 0;
 292 }
 293
 294
 295 static struct scsi_host_template pata_icside_sht = {
 296         ATA_BASE_SHT(DRV_NAME),
 297         .sg_tablesize           = SCSI_MAX_SG_CHAIN_SEGMENTS,
 298         .dma_boundary           = IOMD_DMA_BOUNDARY,
 299 };
 300
 301 static void pata_icside_postreset(struct ata_link *link, unsigned int *classes)
 302 {
 303         struct ata_port *ap = link->ap;
 304         struct pata_icside_state *state = ap->host->private_data;
 305
 306         if (classes[0] != ATA_DEV_NONE || classes[1] != ATA_DEV_NONE)
 307                 return ata_sff_postreset(link, classes);
 308
 309         state->port[ap->port_no].disabled = 1;
 310
 311         if (state->type == ICS_TYPE_V6) {
 312                 /*
 313                  * Disable interrupts from this port, otherwise we
 314                  * receive spurious interrupts from the floating
 315                  * interrupt line.
 316                  */
 317                 void __iomem *irq_port = state->irq_port +
 318                                 (ap->port_no ? ICS_ARCIN_V6_INTROFFSET_2 : ICS_ARCIN_V6_INTROFFSET_1);
 319                 readb(irq_port);
 320         }
 321 }
 322
 323 static struct ata_port_operations pata_icside_port_ops = {
 324         .inherits               = &ata_bmdma_port_ops,
 325         /* no need to build any PRD tables for DMA */
 326         .qc_prep                = ata_noop_qc_prep,
 327         .sff_data_xfer          = ata_sff_data_xfer_noirq,
 328         .bmdma_setup            = pata_icside_bmdma_setup,
 329         .bmdma_start            = pata_icside_bmdma_start,
 330         .bmdma_stop             = pata_icside_bmdma_stop,
 331         .bmdma_status           = pata_icside_bmdma_status,
 332
 333         .cable_detect           = ata_cable_40wire,
 334         .set_dmamode            = pata_icside_set_dmamode,
 335         .postreset              = pata_icside_postreset,
 336
 337         .port_start             = ATA_OP_NULL,  /* don't need PRD table */
 338 };
 339
 340 static void __devinit
 341 pata_icside_setup_ioaddr(struct ata_port *ap, void __iomem *base,
 342                          struct pata_icside_info *info,
 343                          const struct portinfo *port)
 344 {
 345         struct ata_ioports *ioaddr = &ap->ioaddr;
 346         void __iomem *cmd = base + port->dataoffset;
 347
 348         ioaddr->cmd_addr        = cmd;
 349         ioaddr->data_addr       = cmd + (ATA_REG_DATA    << port->stepping);
 350         ioaddr->error_addr      = cmd + (ATA_REG_ERR     << port->stepping);
 351         ioaddr->feature_addr    = cmd + (ATA_REG_FEATURE << port->stepping);
 352         ioaddr->nsect_addr      = cmd + (ATA_REG_NSECT   << port->stepping);
 353         ioaddr->lbal_addr       = cmd + (ATA_REG_LBAL    << port->stepping);
 354         ioaddr->lbam_addr       = cmd + (ATA_REG_LBAM    << port->stepping);
 355         ioaddr->lbah_addr       = cmd + (ATA_REG_LBAH    << port->stepping);
 356         ioaddr->device_addr     = cmd + (ATA_REG_DEVICE  << port->stepping);
 357         ioaddr->status_addr     = cmd + (ATA_REG_STATUS  << port->stepping);
 358         ioaddr->command_addr    = cmd + (ATA_REG_CMD     << port->stepping);
 359
 360         ioaddr->ctl_addr        = base + port->ctrloffset;
 361         ioaddr->altstatus_addr  = ioaddr->ctl_addr;
 362
 363         ata_port_desc(ap, "cmd 0x%lx ctl 0x%lx",
 364                       info->raw_base + port->dataoffset,
 365                       info->raw_base + port->ctrloffset);
 366
 367         if (info->raw_ioc_base)
 368                 ata_port_desc(ap, "iocbase 0x%lx", info->raw_ioc_base);
 369 }
 370
 371 static int __devinit pata_icside_register_v5(struct pata_icside_info *info)
 372 {
 373         struct pata_icside_state *state = info->state;
 374         void __iomem *base;
 375
 376         base = ecardm_iomap(info->ec, ECARD_RES_MEMC, 0, 0);
 377         if (!base)
 378                 return -ENOMEM;
 379
 380         state->irq_port = base;
 381
 382         info->base = base;
 383         info->irqaddr = base + ICS_ARCIN_V5_INTRSTAT;
 384         info->irqmask = 1;
 385         info->irqops = &pata_icside_ops_arcin_v5;
 386         info->nr_ports = 1;
 387         info->port[0] = &pata_icside_portinfo_v5;
 388
 389         info->raw_base = ecard_resource_start(info->ec, ECARD_RES_MEMC);
 390
 391         return 0;
 392 }
 393
 394 static int __devinit pata_icside_register_v6(struct pata_icside_info *info)
 395 {
 396         struct pata_icside_state *state = info->state;
 397         struct expansion_card *ec = info->ec;
 398         void __iomem *ioc_base, *easi_base;
 399         unsigned int sel = 0;
 400
 401         ioc_base = ecardm_iomap(ec, ECARD_RES_IOCFAST, 0, 0);
 402         if (!ioc_base)
 403                 return -ENOMEM;
 404
 405         easi_base = ioc_base;
 406
 407         if (ecard_resource_flags(ec, ECARD_RES_EASI)) {
 408                 easi_base = ecardm_iomap(ec, ECARD_RES_EASI, 0, 0);
 409                 if (!easi_base)
 410                         return -ENOMEM;
 411
 412                 /*
 413                  * Enable access to the EASI region.
 414                  */
 415                 sel = 1 << 5;
 416         }
 417
 418         writeb(sel, ioc_base);
 419
 420         state->irq_port = easi_base;
 421         state->ioc_base = ioc_base;
 422         state->port[0].port_sel = sel;
 423         state->port[1].port_sel = sel | 1;
 424
 425         info->base = easi_base;
 426         info->irqops = &pata_icside_ops_arcin_v6;
 427         info->nr_ports = 2;
 428         info->port[0] = &pata_icside_portinfo_v6_1;
 429         info->port[1] = &pata_icside_portinfo_v6_2;
 430
 431         info->raw_base = ecard_resource_start(ec, ECARD_RES_EASI);
 432         info->raw_ioc_base = ecard_resource_start(ec, ECARD_RES_IOCFAST);
 433
 434         return icside_dma_init(info);
 435 }
 436
 437 static int __devinit pata_icside_add_ports(struct pata_icside_info *info)
 438 {
 439         struct expansion_card *ec = info->ec;
 440         struct ata_host *host;
 441         int i;
 442
 443         if (info->irqaddr) {
 444                 ec->irqaddr = info->irqaddr;
 445                 ec->irqmask = info->irqmask;
 446         }
 447         if (info->irqops)
 448                 ecard_setirq(ec, info->irqops, info->state);
 449
 450         /*
 451          * Be on the safe side - disable interrupts
 452          */
 453         ec->ops->irqdisable(ec, ec->irq);
 454
 455         host = ata_host_alloc(&ec->dev, info->nr_ports);
 456         if (!host)
 457                 return -ENOMEM;
 458
 459         host->private_data = info->state;
 460         host->flags = ATA_HOST_SIMPLEX;
 461
 462         for (i = 0; i < info->nr_ports; i++) {
 463                 struct ata_port *ap = host->ports[i];
 464
 465                 ap->pio_mask = ATA_PIO4;
 466                 ap->mwdma_mask = info->mwdma_mask;
 467                 ap->flags |= ATA_FLAG_SLAVE_POSS;
 468                 ap->ops = &pata_icside_port_ops;
 469
 470                 pata_icside_setup_ioaddr(ap, info->base, info, info->port[i]);
 471         }
 472
 473         return ata_host_activate(host, ec->irq, ata_bmdma_interrupt, 0,
 474                                  &pata_icside_sht);
 475 }
 476
 477 static int __devinit
 478 pata_icside_probe(struct expansion_card *ec, const struct ecard_id *id)
 479 {
 480         struct pata_icside_state *state;
 481         struct pata_icside_info info;
 482         void __iomem *idmem;
 483         int ret;
 484
 485         ret = ecard_request_resources(ec);
 486         if (ret)
 487                 goto out;
 488
 489         state = devm_kzalloc(&ec->dev, sizeof(*state), GFP_KERNEL);
 490         if (!state) {
 491                 ret = -ENOMEM;
 492                 goto release;
 493         }
 494
 495         state->type = ICS_TYPE_NOTYPE;
 496         state->dma = NO_DMA;
 497
 498         idmem = ecardm_iomap(ec, ECARD_RES_IOCFAST, 0, 0);
 499         if (idmem) {
 500                 unsigned int type;
 501
 502                 type = readb(idmem + ICS_IDENT_OFFSET) & 1;
 503                 type |= (readb(idmem + ICS_IDENT_OFFSET + 4) & 1) << 1;
 504                 type |= (readb(idmem + ICS_IDENT_OFFSET + 8) & 1) << 2;
 505                 type |= (readb(idmem + ICS_IDENT_OFFSET + 12) & 1) << 3;
 506                 ecardm_iounmap(ec, idmem);
 507
 508                 state->type = type;
 509         }
 510
 511         memset(&info, 0, sizeof(info));
 512         info.state = state;
 513         info.ec = ec;
 514
 515         switch (state->type) {
 516         case ICS_TYPE_A3IN:
 517                 dev_warn(&ec->dev, "A3IN unsupported\n");
 518                 ret = -ENODEV;
 519                 break;
 520
 521         case ICS_TYPE_A3USER:
 522                 dev_warn(&ec->dev, "A3USER unsupported\n");
 523                 ret = -ENODEV;
 524                 break;
 525
 526         case ICS_TYPE_V5:
 527                 ret = pata_icside_register_v5(&info);
 528                 break;
 529
 530         case ICS_TYPE_V6:
 531                 ret = pata_icside_register_v6(&info);
 532                 break;
 533
 534         default:
 535                 dev_warn(&ec->dev, "unknown interface type\n");
 536                 ret = -ENODEV;
 537                 break;
 538         }
 539
 540         if (ret == 0)
 541                 ret = pata_icside_add_ports(&info);
 542
 543         if (ret == 0)
 544                 goto out;
 545
 546  release:
 547         ecard_release_resources(ec);
 548  out:
 549         return ret;
 550 }
 551
 552 static void pata_icside_shutdown(struct expansion_card *ec)
 553 {
 554         struct ata_host *host = ecard_get_drvdata(ec);
 555         unsigned long flags;
 556
 557         /*
 558          * Disable interrupts from this card.  We need to do
 559          * this before disabling EASI since we may be accessing
 560          * this register via that region.
 561          */
 562         local_irq_save(flags);
 563         ec->ops->irqdisable(ec, ec->irq);
 564         local_irq_restore(flags);
 565
 566         /*
 567          * Reset the ROM pointer so that we can read the ROM
 568          * after a soft reboot.  This also disables access to
 569          * the IDE taskfile via the EASI region.
 570          */
 571         if (host) {
 572                 struct pata_icside_state *state = host->private_data;
 573                 if (state->ioc_base)
 574                         writeb(0, state->ioc_base);
 575         }
 576 }
 577
 578 static void __devexit pata_icside_remove(struct expansion_card *ec)
 579 {
 580         struct ata_host *host = ecard_get_drvdata(ec);
 581         struct pata_icside_state *state = host->private_data;
 582
 583         ata_host_detach(host);
 584
 585         pata_icside_shutdown(ec);
 586
 587         /*
 588          * don't NULL out the drvdata - devres/libata wants it
 589          * to free the ata_host structure.
 590          */
 591         if (state->dma != NO_DMA)
 592                 free_dma(state->dma);
 593
 594         ecard_release_resources(ec);
 595 }
 596
 597 static const struct ecard_id pata_icside_ids[] = {
 598         { MANU_ICS,  PROD_ICS_IDE  },
 599         { MANU_ICS2, PROD_ICS2_IDE },
 600         { 0xffff, 0xffff }
 601 };
 602
 603 static struct ecard_driver pata_icside_driver = {
 604         .probe          = pata_icside_probe,
 605         .remove         = __devexit_p(pata_icside_remove),
 606         .shutdown       = pata_icside_shutdown,
 607         .id_table       = pata_icside_ids,
 608         .drv = {
 609                 .name   = DRV_NAME,
 610         },
 611 };
 612
 613 static int __init pata_icside_init(void)
 614 {
 615         return ecard_register_driver(&pata_icside_driver);
 616 }
 617
 618 static void __exit pata_icside_exit(void)
 619 {
 620         ecard_remove_driver(&pata_icside_driver);
 621 }
 622
 623 MODULE_AUTHOR("Russell King <rmk@arm.linux.org.uk>");
 624 MODULE_LICENSE("GPL");
 625 MODULE_DESCRIPTION("ICS PATA driver");
 626
 627 module_init(pata_icside_init);
 628 module_exit(pata_icside_exit);