drivers/gpu/drm/i915/intel_drv.h

   1 /*
   2  * Copyright (c) 2006 Dave Airlie <airlied@linux.ie>
   3  * Copyright (c) 2007-2008 Intel Corporation
   4  *   Jesse Barnes <jesse.barnes@intel.com>
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a
   7  * copy of this software and associated documentation files (the "Software"),
   8  * to deal in the Software without restriction, including without limitation
   9  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  10  * and/or sell copies of the Software, and to permit persons to whom the
  11  * Software is furnished to do so, subject to the following conditions:
  12  *
  13  * The above copyright notice and this permission notice (including the next
  14  * paragraph) shall be included in all copies or substantial portions of the
  15  * Software.
  16  *
  17  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  18  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  19  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  20  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  21  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  22  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  23  * IN THE SOFTWARE.
  24  */
  25 #ifndef __INTEL_DRV_H__
  26 #define __INTEL_DRV_H__
  27
  28 #include <linux/i2c.h>
  29 #include "i915_drm.h"
  30 #include "i915_drv.h"
  31 #include "drm_crtc.h"
  32 #include "drm_crtc_helper.h"
  33 #include "drm_fb_helper.h"
  34
  35 #define _wait_for(COND, MS, W) ({ \
  36         unsigned long timeout__ = jiffies + msecs_to_jiffies(MS);       \
  37         int ret__ = 0;                                                  \
  38         while (!(COND)) {                                               \
  39                 if (time_after(jiffies, timeout__)) {                   \
  40                         ret__ = -ETIMEDOUT;                             \
  41                         break;                                          \
  42                 }                                                       \
  43                 if (W && drm_can_sleep()) msleep(W);    \
  44         }                                                               \
  45         ret__;                                                          \
  46 })
  47
  48 #define wait_for(COND, MS) _wait_for(COND, MS, 1)
  49 #define wait_for_atomic(COND, MS) _wait_for(COND, MS, 0)
  50
  51 #define KHz(x) (1000*x)
  52 #define MHz(x) KHz(1000*x)
  53
  54 /*
  55  * Display related stuff
  56  */
  57
  58 /* store information about an Ixxx DVO */
  59 /* The i830->i865 use multiple DVOs with multiple i2cs */
  60 /* the i915, i945 have a single sDVO i2c bus - which is different */
  61 #define MAX_OUTPUTS 6
  62 /* maximum connectors per crtcs in the mode set */
  63 #define INTELFB_CONN_LIMIT 4
  64
  65 #define INTEL_I2C_BUS_DVO 1
  66 #define INTEL_I2C_BUS_SDVO 2
  67
  68 /* these are outputs from the chip - integrated only
  69    external chips are via DVO or SDVO output */
  70 #define INTEL_OUTPUT_UNUSED 0
  71 #define INTEL_OUTPUT_ANALOG 1
  72 #define INTEL_OUTPUT_DVO 2
  73 #define INTEL_OUTPUT_SDVO 3
  74 #define INTEL_OUTPUT_LVDS 4
  75 #define INTEL_OUTPUT_TVOUT 5
  76 #define INTEL_OUTPUT_HDMI 6
  77 #define INTEL_OUTPUT_DISPLAYPORT 7
  78 #define INTEL_OUTPUT_EDP 8
  79
  80 /* Intel Pipe Clone Bit */
  81 #define INTEL_HDMIB_CLONE_BIT 1
  82 #define INTEL_HDMIC_CLONE_BIT 2
  83 #define INTEL_HDMID_CLONE_BIT 3
  84 #define INTEL_HDMIE_CLONE_BIT 4
  85 #define INTEL_HDMIF_CLONE_BIT 5
  86 #define INTEL_SDVO_NON_TV_CLONE_BIT 6
  87 #define INTEL_SDVO_TV_CLONE_BIT 7
  88 #define INTEL_SDVO_LVDS_CLONE_BIT 8
  89 #define INTEL_ANALOG_CLONE_BIT 9
  90 #define INTEL_TV_CLONE_BIT 10
  91 #define INTEL_DP_B_CLONE_BIT 11
  92 #define INTEL_DP_C_CLONE_BIT 12
  93 #define INTEL_DP_D_CLONE_BIT 13
  94 #define INTEL_LVDS_CLONE_BIT 14
  95 #define INTEL_DVO_TMDS_CLONE_BIT 15
  96 #define INTEL_DVO_LVDS_CLONE_BIT 16
  97 #define INTEL_EDP_CLONE_BIT 17
  98
  99 #define INTEL_DVO_CHIP_NONE 0
 100 #define INTEL_DVO_CHIP_LVDS 1
 101 #define INTEL_DVO_CHIP_TMDS 2
 102 #define INTEL_DVO_CHIP_TVOUT 4
 103
 104 /* drm_display_mode->private_flags */
 105 #define INTEL_MODE_PIXEL_MULTIPLIER_SHIFT (0x0)
 106 #define INTEL_MODE_PIXEL_MULTIPLIER_MASK (0xf << INTEL_MODE_PIXEL_MULTIPLIER_SHIFT)
 107 #define INTEL_MODE_DP_FORCE_6BPC (0x10)
 108
 109 static inline void
 110 intel_mode_set_pixel_multiplier(struct drm_display_mode *mode,
 111                                 int multiplier)
 112 {
 113         mode->clock *= multiplier;
 114         mode->private_flags |= multiplier;
 115 }
 116
 117 static inline int
 118 intel_mode_get_pixel_multiplier(const struct drm_display_mode *mode)
 119 {
 120         return (mode->private_flags & INTEL_MODE_PIXEL_MULTIPLIER_MASK) >> INTEL_MODE_PIXEL_MULTIPLIER_SHIFT;
 121 }
 122
 123 struct intel_framebuffer {
 124         struct drm_framebuffer base;
 125         struct drm_i915_gem_object *obj;
 126 };
 127
 128 struct intel_fbdev {
 129         struct drm_fb_helper helper;
 130         struct intel_framebuffer ifb;
 131         struct list_head fbdev_list;
 132         struct drm_display_mode *our_mode;
 133 };
 134
 135 struct intel_encoder {
 136         struct drm_encoder base;
 137         int type;
 138         bool needs_tv_clock;
 139         void (*hot_plug)(struct intel_encoder *);
 140         int crtc_mask;
 141         int clone_mask;
 142 };
 143
 144 struct intel_connector {
 145         struct drm_connector base;
 146         struct intel_encoder *encoder;
 147 };
 148
 149 struct intel_crtc {
 150         struct drm_crtc base;
 151         enum pipe pipe;
 152         enum plane plane;
 153         u8 lut_r[256], lut_g[256], lut_b[256];
 154         int dpms_mode;
 155         bool active; /* is the crtc on? independent of the dpms mode */
 156         bool busy; /* is scanout buffer being updated frequently? */
 157         struct timer_list idle_timer;
 158         bool lowfreq_avail;
 159         struct intel_overlay *overlay;
 160         struct intel_unpin_work *unpin_work;
 161         int fdi_lanes;
 162
 163         struct drm_i915_gem_object *cursor_bo;
 164         uint32_t cursor_addr;
 165         int16_t cursor_x, cursor_y;
 166         int16_t cursor_width, cursor_height;
 167         bool cursor_visible;
 168         unsigned int bpp;
 169
 170         bool no_pll; /* tertiary pipe for IVB */
 171         bool use_pll_a;
 172 };
 173
 174 struct intel_plane {
 175         struct drm_plane base;
 176         enum pipe pipe;
 177         struct drm_i915_gem_object *obj;
 178         bool primary_disabled;
 179         int max_downscale;
 180         u32 lut_r[1024], lut_g[1024], lut_b[1024];
 181         void (*update_plane)(struct drm_plane *plane,
 182                              struct drm_framebuffer *fb,
 183                              struct drm_i915_gem_object *obj,
 184                              int crtc_x, int crtc_y,
 185                              unsigned int crtc_w, unsigned int crtc_h,
 186                              uint32_t x, uint32_t y,
 187                              uint32_t src_w, uint32_t src_h);
 188         void (*disable_plane)(struct drm_plane *plane);
 189         int (*update_colorkey)(struct drm_plane *plane,
 190                                struct drm_intel_sprite_colorkey *key);
 191         void (*get_colorkey)(struct drm_plane *plane,
 192                              struct drm_intel_sprite_colorkey *key);
 193 };
 194
 195 #define to_intel_crtc(x) container_of(x, struct intel_crtc, base)
 196 #define to_intel_connector(x) container_of(x, struct intel_connector, base)
 197 #define to_intel_encoder(x) container_of(x, struct intel_encoder, base)
 198 #define to_intel_framebuffer(x) container_of(x, struct intel_framebuffer, base)
 199 #define to_intel_plane(x) container_of(x, struct intel_plane, base)
 200
 201 #define DIP_HEADER_SIZE 5
 202
 203 #define DIP_TYPE_AVI    0x82
 204 #define DIP_VERSION_AVI 0x2
 205 #define DIP_LEN_AVI     13
 206
 207 #define DIP_TYPE_SPD    0x83
 208 #define DIP_VERSION_SPD 0x1
 209 #define DIP_LEN_SPD     25
 210 #define DIP_SPD_UNKNOWN 0
 211 #define DIP_SPD_DSTB    0x1
 212 #define DIP_SPD_DVDP    0x2
 213 #define DIP_SPD_DVHS    0x3
 214 #define DIP_SPD_HDDVR   0x4
 215 #define DIP_SPD_DVC     0x5
 216 #define DIP_SPD_DSC     0x6
 217 #define DIP_SPD_VCD     0x7
 218 #define DIP_SPD_GAME    0x8
 219 #define DIP_SPD_PC      0x9
 220 #define DIP_SPD_BD      0xa
 221 #define DIP_SPD_SCD     0xb
 222
 223 struct dip_infoframe {
 224         uint8_t type;           /* HB0 */
 225         uint8_t ver;            /* HB1 */
 226         uint8_t len;            /* HB2 - body len, not including checksum */
 227         uint8_t ecc;            /* Header ECC */
 228         uint8_t checksum;       /* PB0 */
 229         union {
 230                 struct {
 231                         /* PB1 - Y 6:5, A 4:4, B 3:2, S 1:0 */
 232                         uint8_t Y_A_B_S;
 233                         /* PB2 - C 7:6, M 5:4, R 3:0 */
 234                         uint8_t C_M_R;
 235                         /* PB3 - ITC 7:7, EC 6:4, Q 3:2, SC 1:0 */
 236                         uint8_t ITC_EC_Q_SC;
 237                         /* PB4 - VIC 6:0 */
 238                         uint8_t VIC;
 239                         /* PB5 - PR 3:0 */
 240                         uint8_t PR;
 241                         /* PB6 to PB13 */
 242                         uint16_t top_bar_end;
 243                         uint16_t bottom_bar_start;
 244                         uint16_t left_bar_end;
 245                         uint16_t right_bar_start;
 246                 } avi;
 247                 struct {
 248                         uint8_t vn[8];
 249                         uint8_t pd[16];
 250                         uint8_t sdi;
 251                 } spd;
 252                 uint8_t payload[27];
 253         } __attribute__ ((packed)) body;
 254 } __attribute__((packed));
 255
 256 static inline struct drm_crtc *
 257 intel_get_crtc_for_pipe(struct drm_device *dev, int pipe)
 258 {
 259         struct drm_i915_private *dev_priv = dev->dev_private;
 260         return dev_priv->pipe_to_crtc_mapping[pipe];
 261 }
 262
 263 static inline struct drm_crtc *
 264 intel_get_crtc_for_plane(struct drm_device *dev, int plane)
 265 {
 266         struct drm_i915_private *dev_priv = dev->dev_private;
 267         return dev_priv->plane_to_crtc_mapping[plane];
 268 }
 269
 270 struct intel_unpin_work {
 271         struct work_struct work;
 272         struct drm_device *dev;
 273         struct drm_i915_gem_object *old_fb_obj;
 274         struct drm_i915_gem_object *pending_flip_obj;
 275         struct drm_pending_vblank_event *event;
 276         int pending;
 277         bool enable_stall_check;
 278 };
 279
 280 struct intel_fbc_work {
 281         struct delayed_work work;
 282         struct drm_crtc *crtc;
 283         struct drm_framebuffer *fb;
 284         int interval;
 285 };
 286
 287 int intel_ddc_get_modes(struct drm_connector *c, struct i2c_adapter *adapter);
 288 extern bool intel_ddc_probe(struct intel_encoder *intel_encoder, int ddc_bus);
 289
 290 extern void intel_attach_force_audio_property(struct drm_connector *connector);
 291 extern void intel_attach_broadcast_rgb_property(struct drm_connector *connector);
 292
 293 extern void intel_crt_init(struct drm_device *dev);
 294 extern void intel_hdmi_init(struct drm_device *dev, int sdvox_reg);
 295 void intel_dip_infoframe_csum(struct dip_infoframe *avi_if);
 296 extern bool intel_sdvo_init(struct drm_device *dev, int output_device);
 297 extern void intel_dvo_init(struct drm_device *dev);
 298 extern void intel_tv_init(struct drm_device *dev);
 299 extern void intel_mark_busy(struct drm_device *dev,
 300                             struct drm_i915_gem_object *obj);
 301 extern bool intel_lvds_init(struct drm_device *dev);
 302 extern void intel_dp_init(struct drm_device *dev, int dp_reg);
 303 void
 304 intel_dp_set_m_n(struct drm_crtc *crtc, struct drm_display_mode *mode,
 305                  struct drm_display_mode *adjusted_mode);
 306 extern bool intel_dpd_is_edp(struct drm_device *dev);
 307 extern void intel_edp_link_config(struct intel_encoder *, int *, int *);
 308 extern bool intel_encoder_is_pch_edp(struct drm_encoder *encoder);
 309 extern int intel_plane_init(struct drm_device *dev, enum pipe pipe);
 310
 311 /* intel_panel.c */
 312 extern void intel_fixed_panel_mode(struct drm_display_mode *fixed_mode,
 313                                    struct drm_display_mode *adjusted_mode);
 314 extern void intel_pch_panel_fitting(struct drm_device *dev,
 315                                     int fitting_mode,
 316                                     struct drm_display_mode *mode,
 317                                     struct drm_display_mode *adjusted_mode);
 318 extern u32 intel_panel_get_max_backlight(struct drm_device *dev);
 319 extern u32 intel_panel_get_backlight(struct drm_device *dev);
 320 extern void intel_panel_set_backlight(struct drm_device *dev, u32 level);
 321 extern int intel_panel_setup_backlight(struct drm_device *dev);
 322 extern void intel_panel_enable_backlight(struct drm_device *dev);
 323 extern void intel_panel_disable_backlight(struct drm_device *dev);
 324 extern void intel_panel_destroy_backlight(struct drm_device *dev);
 325 extern enum drm_connector_status intel_panel_detect(struct drm_device *dev);
 326
 327 extern void intel_crtc_load_lut(struct drm_crtc *crtc);
 328 extern void intel_encoder_prepare(struct drm_encoder *encoder);
 329 extern void intel_encoder_commit(struct drm_encoder *encoder);
 330 extern void intel_encoder_destroy(struct drm_encoder *encoder);
 331
 332 static inline struct intel_encoder *intel_attached_encoder(struct drm_connector *connector)
 333 {
 334         return to_intel_connector(connector)->encoder;
 335 }
 336
 337 extern void intel_connector_attach_encoder(struct intel_connector *connector,
 338                                            struct intel_encoder *encoder);
 339 extern struct drm_encoder *intel_best_encoder(struct drm_connector *connector);
 340
 341 extern struct drm_display_mode *intel_crtc_mode_get(struct drm_device *dev,
 342                                                     struct drm_crtc *crtc);
 343 int intel_get_pipe_from_crtc_id(struct drm_device *dev, void *data,
 344                                 struct drm_file *file_priv);
 345 extern void intel_wait_for_vblank(struct drm_device *dev, int pipe);
 346 extern void intel_wait_for_pipe_off(struct drm_device *dev, int pipe);
 347
 348 struct intel_load_detect_pipe {
 349         struct drm_framebuffer *release_fb;
 350         bool load_detect_temp;
 351         int dpms_mode;
 352 };
 353 extern bool intel_get_load_detect_pipe(struct intel_encoder *intel_encoder,
 354                                        struct drm_connector *connector,
 355                                        struct drm_display_mode *mode,
 356                                        struct intel_load_detect_pipe *old);
 357 extern void intel_release_load_detect_pipe(struct intel_encoder *intel_encoder,
 358                                            struct drm_connector *connector,
 359                                            struct intel_load_detect_pipe *old);
 360
 361 extern void intelfb_restore(void);
 362 extern void intel_crtc_fb_gamma_set(struct drm_crtc *crtc, u16 red, u16 green,
 363                                     u16 blue, int regno);
 364 extern void intel_crtc_fb_gamma_get(struct drm_crtc *crtc, u16 *red, u16 *green,
 365                                     u16 *blue, int regno);
 366 extern void intel_enable_clock_gating(struct drm_device *dev);
 367 extern void ironlake_enable_drps(struct drm_device *dev);
 368 extern void ironlake_disable_drps(struct drm_device *dev);
 369 extern void gen6_enable_rps(struct drm_i915_private *dev_priv);
 370 extern void gen6_update_ring_freq(struct drm_i915_private *dev_priv);
 371 extern void gen6_disable_rps(struct drm_device *dev);
 372 extern void intel_init_emon(struct drm_device *dev);
 373
 374 extern int intel_pin_and_fence_fb_obj(struct drm_device *dev,
 375                                       struct drm_i915_gem_object *obj,
 376                                       struct intel_ring_buffer *pipelined);
 377
 378 extern int intel_framebuffer_init(struct drm_device *dev,
 379                                   struct intel_framebuffer *ifb,
 380                                   struct drm_mode_fb_cmd2 *mode_cmd,
 381                                   struct drm_i915_gem_object *obj);
 382 extern int intel_fbdev_init(struct drm_device *dev);
 383 extern void intel_fbdev_fini(struct drm_device *dev);
 384 extern void intel_fbdev_set_suspend(struct drm_device *dev, int state);
 385 extern void intel_prepare_page_flip(struct drm_device *dev, int plane);
 386 extern void intel_finish_page_flip(struct drm_device *dev, int pipe);
 387 extern void intel_finish_page_flip_plane(struct drm_device *dev, int plane);
 388
 389 extern void intel_setup_overlay(struct drm_device *dev);
 390 extern void intel_cleanup_overlay(struct drm_device *dev);
 391 extern int intel_overlay_switch_off(struct intel_overlay *overlay);
 392 extern int intel_overlay_put_image(struct drm_device *dev, void *data,
 393                                    struct drm_file *file_priv);
 394 extern int intel_overlay_attrs(struct drm_device *dev, void *data,
 395                                struct drm_file *file_priv);
 396
 397 extern void intel_fb_output_poll_changed(struct drm_device *dev);
 398 extern void intel_fb_restore_mode(struct drm_device *dev);
 399
 400 extern void assert_pipe(struct drm_i915_private *dev_priv, enum pipe pipe,
 401                         bool state);
 402 #define assert_pipe_enabled(d, p) assert_pipe(d, p, true)
 403 #define assert_pipe_disabled(d, p) assert_pipe(d, p, false)
 404
 405 extern void intel_init_clock_gating(struct drm_device *dev);
 406 extern void intel_write_eld(struct drm_encoder *encoder,
 407                             struct drm_display_mode *mode);
 408 extern void intel_cpt_verify_modeset(struct drm_device *dev, int pipe);
 409
 410 /* For use by IVB LP watermark workaround in intel_sprite.c */
 411 extern void sandybridge_update_wm(struct drm_device *dev);
 412 extern void intel_update_sprite_watermarks(struct drm_device *dev, int pipe,
 413                                            uint32_t sprite_width,
 414                                            int pixel_size);
 415
 416 extern int intel_sprite_set_colorkey(struct drm_device *dev, void *data,
 417                                      struct drm_file *file_priv);
 418 extern int intel_sprite_get_colorkey(struct drm_device *dev, void *data,
 419                                      struct drm_file *file_priv);
 420
 421 #endif /* __INTEL_DRV_H__ */