drivers/sbus/char/uctrl.c

   1 /* uctrl.c: TS102 Microcontroller interface on Tadpole Sparcbook 3
   2  *
   3  * Copyright 1999 Derrick J Brashear (shadow@dementia.org)
   4  * Copyright 2008 David S. Miller (davem@davemloft.net)
   5  */
   6
   7 #include <linux/module.h>
   8 #include <linux/errno.h>
   9 #include <linux/delay.h>
  10 #include <linux/interrupt.h>
  11 #include <linux/slab.h>
  12 #include <linux/mutex.h>
  13 #include <linux/ioport.h>
  14 #include <linux/init.h>
  15 #include <linux/miscdevice.h>
  16 #include <linux/mm.h>
  17 #include <linux/of.h>
  18 #include <linux/of_device.h>
  19
  20 #include <asm/openprom.h>
  21 #include <asm/oplib.h>
  22 #include <asm/system.h>
  23 #include <asm/irq.h>
  24 #include <asm/io.h>
  25 #include <asm/pgtable.h>
  26
  27 #define UCTRL_MINOR     174
  28
  29 #define DEBUG 1
  30 #ifdef DEBUG
  31 #define dprintk(x) printk x
  32 #else
  33 #define dprintk(x)
  34 #endif
  35
  36 struct uctrl_regs {
  37         u32 uctrl_intr;
  38         u32 uctrl_data;
  39         u32 uctrl_stat;
  40         u32 uctrl_xxx[5];
  41 };
  42
  43 struct ts102_regs {
  44         u32 card_a_intr;
  45         u32 card_a_stat;
  46         u32 card_a_ctrl;
  47         u32 card_a_xxx;
  48         u32 card_b_intr;
  49         u32 card_b_stat;
  50         u32 card_b_ctrl;
  51         u32 card_b_xxx;
  52         u32 uctrl_intr;
  53         u32 uctrl_data;
  54         u32 uctrl_stat;
  55         u32 uctrl_xxx;
  56         u32 ts102_xxx[4];
  57 };
  58
  59 /* Bits for uctrl_intr register */
  60 #define UCTRL_INTR_TXE_REQ         0x01    /* transmit FIFO empty int req */
  61 #define UCTRL_INTR_TXNF_REQ        0x02    /* transmit FIFO not full int req */
  62 #define UCTRL_INTR_RXNE_REQ        0x04    /* receive FIFO not empty int req */
  63 #define UCTRL_INTR_RXO_REQ         0x08    /* receive FIFO overflow int req */
  64 #define UCTRL_INTR_TXE_MSK         0x10    /* transmit FIFO empty mask */
  65 #define UCTRL_INTR_TXNF_MSK        0x20    /* transmit FIFO not full mask */
  66 #define UCTRL_INTR_RXNE_MSK        0x40    /* receive FIFO not empty mask */
  67 #define UCTRL_INTR_RXO_MSK         0x80    /* receive FIFO overflow mask */
  68
  69 /* Bits for uctrl_stat register */
  70 #define UCTRL_STAT_TXE_STA         0x01    /* transmit FIFO empty status */
  71 #define UCTRL_STAT_TXNF_STA        0x02    /* transmit FIFO not full status */
  72 #define UCTRL_STAT_RXNE_STA        0x04    /* receive FIFO not empty status */
  73 #define UCTRL_STAT_RXO_STA         0x08    /* receive FIFO overflow status */
  74
  75 static DEFINE_MUTEX(uctrl_mutex);
  76 static const char *uctrl_extstatus[16] = {
  77         "main power available",
  78         "internal battery attached",
  79         "external battery attached",
  80         "external VGA attached",
  81         "external keyboard attached",
  82         "external mouse attached",
  83         "lid down",
  84         "internal battery currently charging",
  85         "external battery currently charging",
  86         "internal battery currently discharging",
  87         "external battery currently discharging",
  88 };
  89
  90 /* Everything required for one transaction with the uctrl */
  91 struct uctrl_txn {
  92         u8 opcode;
  93         u8 inbits;
  94         u8 outbits;
  95         u8 *inbuf;
  96         u8 *outbuf;
  97 };
  98
  99 struct uctrl_status {
 100         u8 current_temp; /* 0x07 */
 101         u8 reset_status; /* 0x0b */
 102         u16 event_status; /* 0x0c */
 103         u16 error_status; /* 0x10 */
 104         u16 external_status; /* 0x11, 0x1b */
 105         u8 internal_charge; /* 0x18 */
 106         u8 external_charge; /* 0x19 */
 107         u16 control_lcd; /* 0x20 */
 108         u8 control_bitport; /* 0x21 */
 109         u8 speaker_volume; /* 0x23 */
 110         u8 control_tft_brightness; /* 0x24 */
 111         u8 control_kbd_repeat_delay; /* 0x28 */
 112         u8 control_kbd_repeat_period; /* 0x29 */
 113         u8 control_screen_contrast; /* 0x2F */
 114 };
 115
 116 enum uctrl_opcode {
 117   READ_SERIAL_NUMBER=0x1,
 118   READ_ETHERNET_ADDRESS=0x2,
 119   READ_HARDWARE_VERSION=0x3,
 120   READ_MICROCONTROLLER_VERSION=0x4,
 121   READ_MAX_TEMPERATURE=0x5,
 122   READ_MIN_TEMPERATURE=0x6,
 123   READ_CURRENT_TEMPERATURE=0x7,
 124   READ_SYSTEM_VARIANT=0x8,
 125   READ_POWERON_CYCLES=0x9,
 126   READ_POWERON_SECONDS=0xA,
 127   READ_RESET_STATUS=0xB,
 128   READ_EVENT_STATUS=0xC,
 129   READ_REAL_TIME_CLOCK=0xD,
 130   READ_EXTERNAL_VGA_PORT=0xE,
 131   READ_MICROCONTROLLER_ROM_CHECKSUM=0xF,
 132   READ_ERROR_STATUS=0x10,
 133   READ_EXTERNAL_STATUS=0x11,
 134   READ_USER_CONFIGURATION_AREA=0x12,
 135   READ_MICROCONTROLLER_VOLTAGE=0x13,
 136   READ_INTERNAL_BATTERY_VOLTAGE=0x14,
 137   READ_DCIN_VOLTAGE=0x15,
 138   READ_HORIZONTAL_POINTER_VOLTAGE=0x16,
 139   READ_VERTICAL_POINTER_VOLTAGE=0x17,
 140   READ_INTERNAL_BATTERY_CHARGE_LEVEL=0x18,
 141   READ_EXTERNAL_BATTERY_CHARGE_LEVEL=0x19,
 142   READ_REAL_TIME_CLOCK_ALARM=0x1A,
 143   READ_EVENT_STATUS_NO_RESET=0x1B,
 144   READ_INTERNAL_KEYBOARD_LAYOUT=0x1C,
 145   READ_EXTERNAL_KEYBOARD_LAYOUT=0x1D,
 146   READ_EEPROM_STATUS=0x1E,
 147   CONTROL_LCD=0x20,
 148   CONTROL_BITPORT=0x21,
 149   SPEAKER_VOLUME=0x23,
 150   CONTROL_TFT_BRIGHTNESS=0x24,
 151   CONTROL_WATCHDOG=0x25,
 152   CONTROL_FACTORY_EEPROM_AREA=0x26,
 153   CONTROL_KBD_TIME_UNTIL_REPEAT=0x28,
 154   CONTROL_KBD_TIME_BETWEEN_REPEATS=0x29,
 155   CONTROL_TIMEZONE=0x2A,
 156   CONTROL_MARK_SPACE_RATIO=0x2B,
 157   CONTROL_DIAGNOSTIC_MODE=0x2E,
 158   CONTROL_SCREEN_CONTRAST=0x2F,
 159   RING_BELL=0x30,
 160   SET_DIAGNOSTIC_STATUS=0x32,
 161   CLEAR_KEY_COMBINATION_TABLE=0x33,
 162   PERFORM_SOFTWARE_RESET=0x34,
 163   SET_REAL_TIME_CLOCK=0x35,
 164   RECALIBRATE_POINTING_STICK=0x36,
 165   SET_BELL_FREQUENCY=0x37,
 166   SET_INTERNAL_BATTERY_CHARGE_RATE=0x39,
 167   SET_EXTERNAL_BATTERY_CHARGE_RATE=0x3A,
 168   SET_REAL_TIME_CLOCK_ALARM=0x3B,
 169   READ_EEPROM=0x40,
 170   WRITE_EEPROM=0x41,
 171   WRITE_TO_STATUS_DISPLAY=0x42,
 172   DEFINE_SPECIAL_CHARACTER=0x43,
 173   DEFINE_KEY_COMBINATION_ENTRY=0x50,
 174   DEFINE_STRING_TABLE_ENTRY=0x51,
 175   DEFINE_STATUS_SCREEN_DISPLAY=0x52,
 176   PERFORM_EMU_COMMANDS=0x64,
 177   READ_EMU_REGISTER=0x65,
 178   WRITE_EMU_REGISTER=0x66,
 179   READ_EMU_RAM=0x67,
 180   WRITE_EMU_RAM=0x68,
 181   READ_BQ_REGISTER=0x69,
 182   WRITE_BQ_REGISTER=0x6A,
 183   SET_USER_PASSWORD=0x70,
 184   VERIFY_USER_PASSWORD=0x71,
 185   GET_SYSTEM_PASSWORD_KEY=0x72,
 186   VERIFY_SYSTEM_PASSWORD=0x73,
 187   POWER_OFF=0x82,
 188   POWER_RESTART=0x83,
 189 };
 190
 191 static struct uctrl_driver {
 192         struct uctrl_regs __iomem *regs;
 193         int irq;
 194         int pending;
 195         struct uctrl_status status;
 196 } *global_driver;
 197
 198 static void uctrl_get_event_status(struct uctrl_driver *);
 199 static void uctrl_get_external_status(struct uctrl_driver *);
 200
 201 static long
 202 uctrl_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
 203 {
 204         switch (cmd) {
 205                 default:
 206                         return -EINVAL;
 207         }
 208         return 0;
 209 }
 210
 211 static int
 212 uctrl_open(struct inode *inode, struct file *file)
 213 {
 214         mutex_lock(&uctrl_mutex);
 215         uctrl_get_event_status(global_driver);
 216         uctrl_get_external_status(global_driver);
 217         mutex_unlock(&uctrl_mutex);
 218         return 0;
 219 }
 220
 221 static irqreturn_t uctrl_interrupt(int irq, void *dev_id)
 222 {
 223         return IRQ_HANDLED;
 224 }
 225
 226 static const struct file_operations uctrl_fops = {
 227         .owner =        THIS_MODULE,
 228         .llseek =       no_llseek,
 229         .unlocked_ioctl =       uctrl_ioctl,
 230         .open =         uctrl_open,
 231 };
 232
 233 static struct miscdevice uctrl_dev = {
 234         UCTRL_MINOR,
 235         "uctrl",
 236         &uctrl_fops
 237 };
 238
 239 /* Wait for space to write, then write to it */
 240 #define WRITEUCTLDATA(value) \
 241 { \
 242   unsigned int i; \
 243   for (i = 0; i < 10000; i++) { \
 244       if (UCTRL_STAT_TXNF_STA & sbus_readl(&driver->regs->uctrl_stat)) \
 245       break; \
 246   } \
 247   dprintk(("write data 0x%02x\n", value)); \
 248   sbus_writel(value, &driver->regs->uctrl_data); \
 249 }
 250
 251 /* Wait for something to read, read it, then clear the bit */
 252 #define READUCTLDATA(value) \
 253 { \
 254   unsigned int i; \
 255   value = 0; \
 256   for (i = 0; i < 10000; i++) { \
 257       if ((UCTRL_STAT_RXNE_STA & sbus_readl(&driver->regs->uctrl_stat)) == 0) \
 258       break; \
 259     udelay(1); \
 260   } \
 261   value = sbus_readl(&driver->regs->uctrl_data); \
 262   dprintk(("read data 0x%02x\n", value)); \
 263   sbus_writel(UCTRL_STAT_RXNE_STA, &driver->regs->uctrl_stat); \
 264 }
 265
 266 static void uctrl_do_txn(struct uctrl_driver *driver, struct uctrl_txn *txn)
 267 {
 268         int stat, incnt, outcnt, bytecnt, intr;
 269         u32 byte;
 270
 271         stat = sbus_readl(&driver->regs->uctrl_stat);
 272         intr = sbus_readl(&driver->regs->uctrl_intr);
 273         sbus_writel(stat, &driver->regs->uctrl_stat);
 274
 275         dprintk(("interrupt stat 0x%x int 0x%x\n", stat, intr));
 276
 277         incnt = txn->inbits;
 278         outcnt = txn->outbits;
 279         byte = (txn->opcode << 8);
 280         WRITEUCTLDATA(byte);
 281
 282         bytecnt = 0;
 283         while (incnt > 0) {
 284                 byte = (txn->inbuf[bytecnt] << 8);
 285                 WRITEUCTLDATA(byte);
 286                 incnt--;
 287                 bytecnt++;
 288         }
 289
 290         /* Get the ack */
 291         READUCTLDATA(byte);
 292         dprintk(("ack was %x\n", (byte >> 8)));
 293
 294         bytecnt = 0;
 295         while (outcnt > 0) {
 296                 READUCTLDATA(byte);
 297                 txn->outbuf[bytecnt] = (byte >> 8);
 298                 dprintk(("set byte to %02x\n", byte));
 299                 outcnt--;
 300                 bytecnt++;
 301         }
 302 }
 303
 304 static void uctrl_get_event_status(struct uctrl_driver *driver)
 305 {
 306         struct uctrl_txn txn;
 307         u8 outbits[2];
 308
 309         txn.opcode = READ_EVENT_STATUS;
 310         txn.inbits = 0;
 311         txn.outbits = 2;
 312         txn.inbuf = NULL;
 313         txn.outbuf = outbits;
 314
 315         uctrl_do_txn(driver, &txn);
 316
 317         dprintk(("bytes %x %x\n", (outbits[0] & 0xff), (outbits[1] & 0xff)));
 318         driver->status.event_status =
 319                 ((outbits[0] & 0xff) << 8) | (outbits[1] & 0xff);
 320         dprintk(("ev is %x\n", driver->status.event_status));
 321 }
 322
 323 static void uctrl_get_external_status(struct uctrl_driver *driver)
 324 {
 325         struct uctrl_txn txn;
 326         u8 outbits[2];
 327         int i, v;
 328
 329         txn.opcode = READ_EXTERNAL_STATUS;
 330         txn.inbits = 0;
 331         txn.outbits = 2;
 332         txn.inbuf = NULL;
 333         txn.outbuf = outbits;
 334
 335         uctrl_do_txn(driver, &txn);
 336
 337         dprintk(("bytes %x %x\n", (outbits[0] & 0xff), (outbits[1] & 0xff)));
 338         driver->status.external_status =
 339                 ((outbits[0] * 256) + (outbits[1]));
 340         dprintk(("ex is %x\n", driver->status.external_status));
 341         v = driver->status.external_status;
 342         for (i = 0; v != 0; i++, v >>= 1) {
 343                 if (v & 1) {
 344                         dprintk(("%s%s", " ", uctrl_extstatus[i]));
 345                 }
 346         }
 347         dprintk(("\n"));
 348
 349 }
 350
 351 static int __devinit uctrl_probe(struct platform_device *op)
 352 {
 353         struct uctrl_driver *p;
 354         int err = -ENOMEM;
 355
 356         p = kzalloc(sizeof(*p), GFP_KERNEL);
 357         if (!p) {
 358                 printk(KERN_ERR "uctrl: Unable to allocate device struct.\n");
 359                 goto out;
 360         }
 361
 362         p->regs = of_ioremap(&op->resource[0], 0,
 363                              resource_size(&op->resource[0]),
 364                              "uctrl");
 365         if (!p->regs) {
 366                 printk(KERN_ERR "uctrl: Unable to map registers.\n");
 367                 goto out_free;
 368         }
 369
 370         p->irq = op->archdata.irqs[0];
 371         err = request_irq(p->irq, uctrl_interrupt, 0, "uctrl", p);
 372         if (err) {
 373                 printk(KERN_ERR "uctrl: Unable to register irq.\n");
 374                 goto out_iounmap;
 375         }
 376
 377         err = misc_register(&uctrl_dev);
 378         if (err) {
 379                 printk(KERN_ERR "uctrl: Unable to register misc device.\n");
 380                 goto out_free_irq;
 381         }
 382
 383         sbus_writel(UCTRL_INTR_RXNE_REQ|UCTRL_INTR_RXNE_MSK, &p->regs->uctrl_intr);
 384         printk(KERN_INFO "%s: uctrl regs[0x%p] (irq %d)\n",
 385                op->dev.of_node->full_name, p->regs, p->irq);
 386         uctrl_get_event_status(p);
 387         uctrl_get_external_status(p);
 388
 389         dev_set_drvdata(&op->dev, p);
 390         global_driver = p;
 391
 392 out:
 393         return err;
 394
 395 out_free_irq:
 396         free_irq(p->irq, p);
 397
 398 out_iounmap:
 399         of_iounmap(&op->resource[0], p->regs, resource_size(&op->resource[0]));
 400
 401 out_free:
 402         kfree(p);
 403         goto out;
 404 }
 405
 406 static int __devexit uctrl_remove(struct platform_device *op)
 407 {
 408         struct uctrl_driver *p = dev_get_drvdata(&op->dev);
 409
 410         if (p) {
 411                 misc_deregister(&uctrl_dev);
 412                 free_irq(p->irq, p);
 413                 of_iounmap(&op->resource[0], p->regs, resource_size(&op->resource[0]));
 414                 kfree(p);
 415         }
 416         return 0;
 417 }
 418
 419 static const struct of_device_id uctrl_match[] = {
 420         {
 421                 .name = "uctrl",
 422         },
 423         {},
 424 };
 425 MODULE_DEVICE_TABLE(of, uctrl_match);
 426
 427 static struct platform_driver uctrl_driver = {
 428         .driver = {
 429                 .name = "uctrl",
 430                 .owner = THIS_MODULE,
 431                 .of_match_table = uctrl_match,
 432         },
 433         .probe          = uctrl_probe,
 434         .remove         = __devexit_p(uctrl_remove),
 435 };
 436
 437
 438 module_platform_driver(uctrl_driver);
 439
 440 MODULE_LICENSE("GPL");