drivers/staging/iio/adc/ad7192.h

   1 /*
   2  * AD7190 AD7192 AD7195 SPI ADC driver
   3  *
   4  * Copyright 2011 Analog Devices Inc.
   5  *
   6  * Licensed under the GPL-2.
   7  */
   8 #ifndef IIO_ADC_AD7192_H_
   9 #define IIO_ADC_AD7192_H_
  10
  11 /*
  12  * TODO: struct ad7192_platform_data needs to go into include/linux/iio
  13  */
  14
  15 /**
  16  * struct ad7192_platform_data - platform/board specific information
  17  * @vref_mv:            the external reference voltage in millivolt
  18  * @clock_source_sel:   [0..3]
  19  *                      0 External 4.92 MHz clock connected from MCLK1 to MCLK2
  20  *                      1 External Clock applied to MCLK2
  21  *                      2 Internal 4.92 MHz Clock not available at the MCLK2 pin
  22  *                      3 Internal 4.92 MHz Clock available at the MCLK2 pin
  23  * @ext_clk_Hz:         the external clock frequency in Hz, if not set
  24  *                      the driver uses the internal clock (16.776 MHz)
  25  * @refin2_en:          REFIN1/REFIN2 Reference Select (AD7190/2 only)
  26  * @rej60_en:           50/60Hz notch filter enable
  27  * @sinc3_en:           SINC3 filter enable (default SINC4)
  28  * @chop_en:            CHOP mode enable
  29  * @buf_en:             buffered input mode enable
  30  * @unipolar_en:        unipolar mode enable
  31  * @burnout_curr_en:    constant current generators on AIN(+|-) enable
  32  */
  33
  34 struct ad7192_platform_data {
  35         u16             vref_mv;
  36         u8              clock_source_sel;
  37         u32             ext_clk_Hz;
  38         bool            refin2_en;
  39         bool            rej60_en;
  40         bool            sinc3_en;
  41         bool            chop_en;
  42         bool            buf_en;
  43         bool            unipolar_en;
  44         bool            burnout_curr_en;
  45 };
  46
  47 #endif /* IIO_ADC_AD7192_H_ */