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i2c-eg20t: change timeout value 50msec to 1000msec
[zen-stable.git] / drivers / staging / sm7xx / smtcfb.c
blobae0035f327e77e3debadd960d876931b4d309862
1 /*
2 * Silicon Motion SM7XX frame buffer device
3 *
4 * Copyright (C) 2006 Silicon Motion Technology Corp.
5 * Authors: Ge Wang, gewang@siliconmotion.com
6 * Boyod boyod.yang@siliconmotion.com.cn
7 *
8 * Copyright (C) 2009 Lemote, Inc.
9 * Author: Wu Zhangjin, wuzhangjin@gmail.com
10 *
11 * Copyright (C) 2011 Igalia, S.L.
12 * Author: Javier M. Mellid <jmunhoz@igalia.com>
13 *
14 * This file is subject to the terms and conditions of the GNU General Public
15 * License. See the file COPYING in the main directory of this archive for
16 * more details.
17 *
18 * Version 0.10.26192.21.01
19 * - Add PowerPC/Big endian support
20 * - Verified on 2.6.19.2
21 * Boyod.yang <boyod.yang@siliconmotion.com.cn>
22 *
23 * Version 0.09.2621.00.01
24 * - Only support Linux Kernel's version 2.6.21
25 * Boyod.yang <boyod.yang@siliconmotion.com.cn>
26 *
27 * Version 0.09
28 * - Only support Linux Kernel's version 2.6.12
29 * Boyod.yang <boyod.yang@siliconmotion.com.cn>
30 */
31
32 #include <linux/io.h>
33 #include <linux/fb.h>
34 #include <linux/pci.h>
35 #include <linux/init.h>
36 #include <linux/slab.h>
37 #include <linux/uaccess.h>
38 #include <linux/module.h>
39 #include <linux/console.h>
40 #include <linux/screen_info.h>
41
42 #ifdef CONFIG_PM
43 #include <linux/pm.h>
44 #include <linux/module.h>
45 #endif
46
47 #include "smtcfb.h"
48
49 #ifdef DEBUG
50 #define smdbg(format, arg...) printk(KERN_DEBUG format , ## arg)
51 #else
52 #define smdbg(format, arg...)
53 #endif
54
55 struct screen_info smtc_screen_info;
56
57 /*
58 * Private structure
59 */
60 struct smtcfb_info {
61 /*
62 * The following is a pointer to be passed into the
63 * functions below. The modules outside the main
64 * voyager.c driver have no knowledge as to what
65 * is within this structure.
66 */
67 struct fb_info fb;
68 struct display_switch *dispsw;
69 struct pci_dev *dev;
70 signed int currcon;
71
72 struct {
73 u8 red, green, blue;
74 } palette[NR_RGB];
75
76 u_int palette_size;
77 };
78
79 struct par_info {
80 /*
81 * Hardware
82 */
83 u16 chipID;
84 unsigned char __iomem *m_pMMIO;
85 char __iomem *m_pLFB;
86 char *m_pDPR;
87 char *m_pVPR;
88 char *m_pCPR;
89
90 u_int width;
91 u_int height;
92 u_int hz;
93 u_long BaseAddressInVRAM;
94 u8 chipRevID;
95 };
96
97 struct vesa_mode_table {
98 char mode_index[6];
99 u16 lfb_width;
100 u16 lfb_height;
101 u16 lfb_depth;
102 };
103
104 static struct vesa_mode_table vesa_mode[] = {
105 {"0x301", 640, 480, 8},
106 {"0x303", 800, 600, 8},
107 {"0x305", 1024, 768, 8},
108 {"0x307", 1280, 1024, 8},
109
110 {"0x311", 640, 480, 16},
111 {"0x314", 800, 600, 16},
112 {"0x317", 1024, 768, 16},
113 {"0x31A", 1280, 1024, 16},
114
115 {"0x312", 640, 480, 24},
116 {"0x315", 800, 600, 24},
117 {"0x318", 1024, 768, 24},
118 {"0x31B", 1280, 1024, 24},
119 };
120
121 char __iomem *smtc_RegBaseAddress; /* Memory Map IO starting address */
122 char __iomem *smtc_VRAMBaseAddress; /* video memory starting address */
123
124 static u32 colreg[17];
125 static struct par_info hw; /* hardware information */
126
127 u16 smtc_ChipIDs[] = {
128 0x710,
129 0x712,
130 0x720
131 };
132
133 #define numSMTCchipIDs ARRAY_SIZE(smtc_ChipIDs)
134
135 static struct fb_var_screeninfo smtcfb_var = {
136 .xres = 1024,
137 .yres = 600,
138 .xres_virtual = 1024,
139 .yres_virtual = 600,
140 .bits_per_pixel = 16,
141 .red = {16, 8, 0},
142 .green = {8, 8, 0},
143 .blue = {0, 8, 0},
144 .activate = FB_ACTIVATE_NOW,
145 .height = -1,
146 .width = -1,
147 .vmode = FB_VMODE_NONINTERLACED,
148 };
149
150 static struct fb_fix_screeninfo smtcfb_fix = {
151 .id = "sm712fb",
152 .type = FB_TYPE_PACKED_PIXELS,
153 .visual = FB_VISUAL_TRUECOLOR,
154 .line_length = 800 * 3,
155 .accel = FB_ACCEL_SMI_LYNX,
156 };
157
158 static void sm712_set_timing(struct smtcfb_info *sfb,
159 struct par_info *ppar_info)
160 {
161 int i = 0, j = 0;
162 u32 m_nScreenStride;
163
164 smdbg("\nppar_info->width = %d ppar_info->height = %d"
165 "sfb->fb.var.bits_per_pixel = %d ppar_info->hz = %d\n",
166 ppar_info->width, ppar_info->height,
167 sfb->fb.var.bits_per_pixel, ppar_info->hz);
168
169 for (j = 0; j < numVGAModes; j++) {
170 if (VGAMode[j].mmSizeX == ppar_info->width &&
171 VGAMode[j].mmSizeY == ppar_info->height &&
172 VGAMode[j].bpp == sfb->fb.var.bits_per_pixel &&
173 VGAMode[j].hz == ppar_info->hz) {
174
175 smdbg("\nVGAMode[j].mmSizeX = %d VGAMode[j].mmSizeY ="
176 "%d VGAMode[j].bpp = %d"
177 "VGAMode[j].hz=%d\n",
178 VGAMode[j].mmSizeX, VGAMode[j].mmSizeY,
179 VGAMode[j].bpp, VGAMode[j].hz);
180
181 smdbg("VGAMode index=%d\n", j);
182
183 smtc_mmiowb(0x0, 0x3c6);
184
185 smtc_seqw(0, 0x1);
186
187 smtc_mmiowb(VGAMode[j].Init_MISC, 0x3c2);
188
189 /* init SEQ register SR00 - SR04 */
190 for (i = 0; i < SIZE_SR00_SR04; i++)
191 smtc_seqw(i, VGAMode[j].Init_SR00_SR04[i]);
192
193 /* init SEQ register SR10 - SR24 */
194 for (i = 0; i < SIZE_SR10_SR24; i++)
195 smtc_seqw(i + 0x10,
196 VGAMode[j].Init_SR10_SR24[i]);
197
198 /* init SEQ register SR30 - SR75 */
199 for (i = 0; i < SIZE_SR30_SR75; i++)
200 if (((i + 0x30) != 0x62) \
201 && ((i + 0x30) != 0x6a) \
202 && ((i + 0x30) != 0x6b))
203 smtc_seqw(i + 0x30,
204 VGAMode[j].Init_SR30_SR75[i]);
205
206 /* init SEQ register SR80 - SR93 */
207 for (i = 0; i < SIZE_SR80_SR93; i++)
208 smtc_seqw(i + 0x80,
209 VGAMode[j].Init_SR80_SR93[i]);
210
211 /* init SEQ register SRA0 - SRAF */
212 for (i = 0; i < SIZE_SRA0_SRAF; i++)
213 smtc_seqw(i + 0xa0,
214 VGAMode[j].Init_SRA0_SRAF[i]);
215
216 /* init Graphic register GR00 - GR08 */
217 for (i = 0; i < SIZE_GR00_GR08; i++)
218 smtc_grphw(i, VGAMode[j].Init_GR00_GR08[i]);
219
220 /* init Attribute register AR00 - AR14 */
221 for (i = 0; i < SIZE_AR00_AR14; i++)
222 smtc_attrw(i, VGAMode[j].Init_AR00_AR14[i]);
223
224 /* init CRTC register CR00 - CR18 */
225 for (i = 0; i < SIZE_CR00_CR18; i++)
226 smtc_crtcw(i, VGAMode[j].Init_CR00_CR18[i]);
227
228 /* init CRTC register CR30 - CR4D */
229 for (i = 0; i < SIZE_CR30_CR4D; i++)
230 smtc_crtcw(i + 0x30,
231 VGAMode[j].Init_CR30_CR4D[i]);
232
233 /* init CRTC register CR90 - CRA7 */
234 for (i = 0; i < SIZE_CR90_CRA7; i++)
235 smtc_crtcw(i + 0x90,
236 VGAMode[j].Init_CR90_CRA7[i]);
237 }
238 }
239 smtc_mmiowb(0x67, 0x3c2);
240
241 /* set VPR registers */
242 writel(0x0, ppar_info->m_pVPR + 0x0C);
243 writel(0x0, ppar_info->m_pVPR + 0x40);
244
245 /* set data width */
246 m_nScreenStride =
247 (ppar_info->width * sfb->fb.var.bits_per_pixel) / 64;
248 switch (sfb->fb.var.bits_per_pixel) {
249 case 8:
250 writel(0x0, ppar_info->m_pVPR + 0x0);
251 break;
252 case 16:
253 writel(0x00020000, ppar_info->m_pVPR + 0x0);
254 break;
255 case 24:
256 writel(0x00040000, ppar_info->m_pVPR + 0x0);
257 break;
258 case 32:
259 writel(0x00030000, ppar_info->m_pVPR + 0x0);
260 break;
261 }
262 writel((u32) (((m_nScreenStride + 2) << 16) | m_nScreenStride),
263 ppar_info->m_pVPR + 0x10);
264
265 }
266
267 static void sm712_setpalette(int regno, unsigned red, unsigned green,
268 unsigned blue, struct fb_info *info)
269 {
270 struct par_info *cur_par = (struct par_info *)info->par;
271
272 if (cur_par->BaseAddressInVRAM)
273 /*
274 * second display palette for dual head. Enable CRT RAM, 6-bit
275 * RAM
276 */
277 smtc_seqw(0x66, (smtc_seqr(0x66) & 0xC3) | 0x20);
278 else
279 /* primary display palette. Enable LCD RAM only, 6-bit RAM */
280 smtc_seqw(0x66, (smtc_seqr(0x66) & 0xC3) | 0x10);
281 smtc_mmiowb(regno, dac_reg);
282 smtc_mmiowb(red >> 10, dac_val);
283 smtc_mmiowb(green >> 10, dac_val);
284 smtc_mmiowb(blue >> 10, dac_val);
285 }
286
287 static void smtc_set_timing(struct smtcfb_info *sfb, struct par_info
288 *ppar_info)
289 {
290 switch (ppar_info->chipID) {
291 case 0x710:
292 case 0x712:
293 case 0x720:
294 sm712_set_timing(sfb, ppar_info);
295 break;
296 }
297 }
298
299 /* chan_to_field
300 *
301 * convert a colour value into a field position
302 *
303 * from pxafb.c
304 */
305
306 static inline unsigned int chan_to_field(unsigned int chan,
307 struct fb_bitfield *bf)
308 {
309 chan &= 0xffff;
310 chan >>= 16 - bf->length;
311 return chan << bf->offset;
312 }
313
314 static int cfb_blank(int blank_mode, struct fb_info *info)
315 {
316 /* clear DPMS setting */
317 switch (blank_mode) {
318 case FB_BLANK_UNBLANK:
319 /* Screen On: HSync: On, VSync : On */
320 smtc_seqw(0x01, (smtc_seqr(0x01) & (~0x20)));
321 smtc_seqw(0x6a, 0x16);
322 smtc_seqw(0x6b, 0x02);
323 smtc_seqw(0x21, (smtc_seqr(0x21) & 0x77));
324 smtc_seqw(0x22, (smtc_seqr(0x22) & (~0x30)));
325 smtc_seqw(0x23, (smtc_seqr(0x23) & (~0xc0)));
326 smtc_seqw(0x24, (smtc_seqr(0x24) | 0x01));
327 smtc_seqw(0x31, (smtc_seqr(0x31) | 0x03));
328 break;
329 case FB_BLANK_NORMAL:
330 /* Screen Off: HSync: On, VSync : On Soft blank */
331 smtc_seqw(0x01, (smtc_seqr(0x01) & (~0x20)));
332 smtc_seqw(0x6a, 0x16);
333 smtc_seqw(0x6b, 0x02);
334 smtc_seqw(0x22, (smtc_seqr(0x22) & (~0x30)));
335 smtc_seqw(0x23, (smtc_seqr(0x23) & (~0xc0)));
336 smtc_seqw(0x24, (smtc_seqr(0x24) | 0x01));
337 smtc_seqw(0x31, ((smtc_seqr(0x31) & (~0x07)) | 0x00));
338 break;
339 case FB_BLANK_VSYNC_SUSPEND:
340 /* Screen On: HSync: On, VSync : Off */
341 smtc_seqw(0x01, (smtc_seqr(0x01) | 0x20));
342 smtc_seqw(0x20, (smtc_seqr(0x20) & (~0xB0)));
343 smtc_seqw(0x6a, 0x0c);
344 smtc_seqw(0x6b, 0x02);
345 smtc_seqw(0x21, (smtc_seqr(0x21) | 0x88));
346 smtc_seqw(0x22, ((smtc_seqr(0x22) & (~0x30)) | 0x20));
347 smtc_seqw(0x23, ((smtc_seqr(0x23) & (~0xc0)) | 0x20));
348 smtc_seqw(0x24, (smtc_seqr(0x24) & (~0x01)));
349 smtc_seqw(0x31, ((smtc_seqr(0x31) & (~0x07)) | 0x00));
350 smtc_seqw(0x34, (smtc_seqr(0x34) | 0x80));
351 break;
352 case FB_BLANK_HSYNC_SUSPEND:
353 /* Screen On: HSync: Off, VSync : On */
354 smtc_seqw(0x01, (smtc_seqr(0x01) | 0x20));
355 smtc_seqw(0x20, (smtc_seqr(0x20) & (~0xB0)));
356 smtc_seqw(0x6a, 0x0c);
357 smtc_seqw(0x6b, 0x02);
358 smtc_seqw(0x21, (smtc_seqr(0x21) | 0x88));
359 smtc_seqw(0x22, ((smtc_seqr(0x22) & (~0x30)) | 0x10));
360 smtc_seqw(0x23, ((smtc_seqr(0x23) & (~0xc0)) | 0xD8));
361 smtc_seqw(0x24, (smtc_seqr(0x24) & (~0x01)));
362 smtc_seqw(0x31, ((smtc_seqr(0x31) & (~0x07)) | 0x00));
363 smtc_seqw(0x34, (smtc_seqr(0x34) | 0x80));
364 break;
365 case FB_BLANK_POWERDOWN:
366 /* Screen On: HSync: Off, VSync : Off */
367 smtc_seqw(0x01, (smtc_seqr(0x01) | 0x20));
368 smtc_seqw(0x20, (smtc_seqr(0x20) & (~0xB0)));
369 smtc_seqw(0x6a, 0x0c);
370 smtc_seqw(0x6b, 0x02);
371 smtc_seqw(0x21, (smtc_seqr(0x21) | 0x88));
372 smtc_seqw(0x22, ((smtc_seqr(0x22) & (~0x30)) | 0x30));
373 smtc_seqw(0x23, ((smtc_seqr(0x23) & (~0xc0)) | 0xD8));
374 smtc_seqw(0x24, (smtc_seqr(0x24) & (~0x01)));
375 smtc_seqw(0x31, ((smtc_seqr(0x31) & (~0x07)) | 0x00));
376 smtc_seqw(0x34, (smtc_seqr(0x34) | 0x80));
377 break;
378 default:
379 return -EINVAL;
380 }
381
382 return 0;
383 }
384
385 static int smtc_setcolreg(unsigned regno, unsigned red, unsigned green,
386 unsigned blue, unsigned trans, struct fb_info *info)
387 {
388 struct smtcfb_info *sfb = (struct smtcfb_info *)info;
389 u32 val;
390
391 if (regno > 255)
392 return 1;
393
394 switch (sfb->fb.fix.visual) {
395 case FB_VISUAL_DIRECTCOLOR:
396 case FB_VISUAL_TRUECOLOR:
397 /*
398 * 16/32 bit true-colour, use pseuo-palette for 16 base color
399 */
400 if (regno < 16) {
401 if (sfb->fb.var.bits_per_pixel == 16) {
402 u32 *pal = sfb->fb.pseudo_palette;
403 val = chan_to_field(red, &sfb->fb.var.red);
404 val |= chan_to_field(green, \
405 &sfb->fb.var.green);
406 val |= chan_to_field(blue, &sfb->fb.var.blue);
407 #ifdef __BIG_ENDIAN
408 pal[regno] =
409 ((red & 0xf800) >> 8) |
410 ((green & 0xe000) >> 13) |
411 ((green & 0x1c00) << 3) |
412 ((blue & 0xf800) >> 3);
413 #else
414 pal[regno] = val;
415 #endif
416 } else {
417 u32 *pal = sfb->fb.pseudo_palette;
418 val = chan_to_field(red, &sfb->fb.var.red);
419 val |= chan_to_field(green, \
420 &sfb->fb.var.green);
421 val |= chan_to_field(blue, &sfb->fb.var.blue);
422 #ifdef __BIG_ENDIAN
423 val =
424 (val & 0xff00ff00 >> 8) |
425 (val & 0x00ff00ff << 8);
426 #endif
427 pal[regno] = val;
428 }
429 }
430 break;
431
432 case FB_VISUAL_PSEUDOCOLOR:
433 /* color depth 8 bit */
434 sm712_setpalette(regno, red, green, blue, info);
435 break;
436
437 default:
438 return 1; /* unknown type */
439 }
440
441 return 0;
442
443 }
444
445 #ifdef __BIG_ENDIAN
446 static ssize_t smtcfb_read(struct fb_info *info, char __user * buf, size_t
447 count, loff_t *ppos)
448 {
449 unsigned long p = *ppos;
450
451 u32 *buffer, *dst;
452 u32 __iomem *src;
453 int c, i, cnt = 0, err = 0;
454 unsigned long total_size;
455
456 if (!info || !info->screen_base)
457 return -ENODEV;
458
459 if (info->state != FBINFO_STATE_RUNNING)
460 return -EPERM;
461
462 total_size = info->screen_size;
463
464 if (total_size == 0)
465 total_size = info->fix.smem_len;
466
467 if (p >= total_size)
468 return 0;
469
470 if (count >= total_size)
471 count = total_size;
472
473 if (count + p > total_size)
474 count = total_size - p;
475
476 buffer = kmalloc((count > PAGE_SIZE) ? PAGE_SIZE : count, GFP_KERNEL);
477 if (!buffer)
478 return -ENOMEM;
479
480 src = (u32 __iomem *) (info->screen_base + p);
481
482 if (info->fbops->fb_sync)
483 info->fbops->fb_sync(info);
484
485 while (count) {
486 c = (count > PAGE_SIZE) ? PAGE_SIZE : count;
487 dst = buffer;
488 for (i = c >> 2; i--;) {
489 *dst = fb_readl(src++);
490 *dst =
491 (*dst & 0xff00ff00 >> 8) |
492 (*dst & 0x00ff00ff << 8);
493 dst++;
494 }
495 if (c & 3) {
496 u8 *dst8 = (u8 *) dst;
497 u8 __iomem *src8 = (u8 __iomem *) src;
498
499 for (i = c & 3; i--;) {
500 if (i & 1) {
501 *dst8++ = fb_readb(++src8);
502 } else {
503 *dst8++ = fb_readb(--src8);
504 src8 += 2;
505 }
506 }
507 src = (u32 __iomem *) src8;
508 }
509
510 if (copy_to_user(buf, buffer, c)) {
511 err = -EFAULT;
512 break;
513 }
514 *ppos += c;
515 buf += c;
516 cnt += c;
517 count -= c;
518 }
519
520 kfree(buffer);
521
522 return (err) ? err : cnt;
523 }
524
525 static ssize_t
526 smtcfb_write(struct fb_info *info, const char __user *buf, size_t count,
527 loff_t *ppos)
528 {
529 unsigned long p = *ppos;
530
531 u32 *buffer, *src;
532 u32 __iomem *dst;
533 int c, i, cnt = 0, err = 0;
534 unsigned long total_size;
535
536 if (!info || !info->screen_base)
537 return -ENODEV;
538
539 if (info->state != FBINFO_STATE_RUNNING)
540 return -EPERM;
541
542 total_size = info->screen_size;
543
544 if (total_size == 0)
545 total_size = info->fix.smem_len;
546
547 if (p > total_size)
548 return -EFBIG;
549
550 if (count > total_size) {
551 err = -EFBIG;
552 count = total_size;
553 }
554
555 if (count + p > total_size) {
556 if (!err)
557 err = -ENOSPC;
558
559 count = total_size - p;
560 }
561
562 buffer = kmalloc((count > PAGE_SIZE) ? PAGE_SIZE : count, GFP_KERNEL);
563 if (!buffer)
564 return -ENOMEM;
565
566 dst = (u32 __iomem *) (info->screen_base + p);
567
568 if (info->fbops->fb_sync)
569 info->fbops->fb_sync(info);
570
571 while (count) {
572 c = (count > PAGE_SIZE) ? PAGE_SIZE : count;
573 src = buffer;
574
575 if (copy_from_user(src, buf, c)) {
576 err = -EFAULT;
577 break;
578 }
579
580 for (i = c >> 2; i--;) {
581 fb_writel((*src & 0xff00ff00 >> 8) |
582 (*src & 0x00ff00ff << 8), dst++);
583 src++;
584 }
585 if (c & 3) {
586 u8 *src8 = (u8 *) src;
587 u8 __iomem *dst8 = (u8 __iomem *) dst;
588
589 for (i = c & 3; i--;) {
590 if (i & 1) {
591 fb_writeb(*src8++, ++dst8);
592 } else {
593 fb_writeb(*src8++, --dst8);
594 dst8 += 2;
595 }
596 }
597 dst = (u32 __iomem *) dst8;
598 }
599
600 *ppos += c;
601 buf += c;
602 cnt += c;
603 count -= c;
604 }
605
606 kfree(buffer);
607
608 return (cnt) ? cnt : err;
609 }
610 #endif /* ! __BIG_ENDIAN */
611
612 void smtcfb_setmode(struct smtcfb_info *sfb)
613 {
614 switch (sfb->fb.var.bits_per_pixel) {
615 case 32:
616 sfb->fb.fix.visual = FB_VISUAL_TRUECOLOR;
617 sfb->fb.fix.line_length = sfb->fb.var.xres * 4;
618 sfb->fb.var.red.length = 8;
619 sfb->fb.var.green.length = 8;
620 sfb->fb.var.blue.length = 8;
621 sfb->fb.var.red.offset = 16;
622 sfb->fb.var.green.offset = 8;
623 sfb->fb.var.blue.offset = 0;
624
625 break;
626 case 8:
627 sfb->fb.fix.visual = FB_VISUAL_PSEUDOCOLOR;
628 sfb->fb.fix.line_length = sfb->fb.var.xres;
629 sfb->fb.var.red.offset = 5;
630 sfb->fb.var.red.length = 3;
631 sfb->fb.var.green.offset = 2;
632 sfb->fb.var.green.length = 3;
633 sfb->fb.var.blue.offset = 0;
634 sfb->fb.var.blue.length = 2;
635 break;
636 case 24:
637 sfb->fb.fix.visual = FB_VISUAL_TRUECOLOR;
638 sfb->fb.fix.line_length = sfb->fb.var.xres * 3;
639 sfb->fb.var.red.length = 8;
640 sfb->fb.var.green.length = 8;
641 sfb->fb.var.blue.length = 8;
642
643 sfb->fb.var.red.offset = 16;
644 sfb->fb.var.green.offset = 8;
645 sfb->fb.var.blue.offset = 0;
646
647 break;
648 case 16:
649 default:
650 sfb->fb.fix.visual = FB_VISUAL_TRUECOLOR;
651 sfb->fb.fix.line_length = sfb->fb.var.xres * 2;
652
653 sfb->fb.var.red.length = 5;
654 sfb->fb.var.green.length = 6;
655 sfb->fb.var.blue.length = 5;
656
657 sfb->fb.var.red.offset = 11;
658 sfb->fb.var.green.offset = 5;
659 sfb->fb.var.blue.offset = 0;
660
661 break;
662 }
663
664 hw.width = sfb->fb.var.xres;
665 hw.height = sfb->fb.var.yres;
666 hw.hz = 60;
667 smtc_set_timing(sfb, &hw);
668 }
669
670 static int smtc_check_var(struct fb_var_screeninfo *var, struct fb_info *info)
671 {
672 /* sanity checks */
673 if (var->xres_virtual < var->xres)
674 var->xres_virtual = var->xres;
675
676 if (var->yres_virtual < var->yres)
677 var->yres_virtual = var->yres;
678
679 /* set valid default bpp */
680 if ((var->bits_per_pixel != 8) && (var->bits_per_pixel != 16) &&
681 (var->bits_per_pixel != 24) && (var->bits_per_pixel != 32))
682 var->bits_per_pixel = 16;
683
684 return 0;
685 }
686
687 static int smtc_set_par(struct fb_info *info)
688 {
689 struct smtcfb_info *sfb = (struct smtcfb_info *)info;
690
691 smtcfb_setmode(sfb);
692
693 return 0;
694 }
695
696 static struct fb_ops smtcfb_ops = {
697 .owner = THIS_MODULE,
698 .fb_check_var = smtc_check_var,
699 .fb_set_par = smtc_set_par,
700 .fb_setcolreg = smtc_setcolreg,
701 .fb_blank = cfb_blank,
702 .fb_fillrect = cfb_fillrect,
703 .fb_imageblit = cfb_imageblit,
704 .fb_copyarea = cfb_copyarea,
705 #ifdef __BIG_ENDIAN
706 .fb_read = smtcfb_read,
707 .fb_write = smtcfb_write,
708 #endif
709 };
710
711 /*
712 * Alloc struct smtcfb_info and assign the default value
713 */
714 static struct smtcfb_info *smtc_alloc_fb_info(struct pci_dev *dev,
715 char *name)
716 {
717 struct smtcfb_info *sfb;
718
719 sfb = kzalloc(sizeof(*sfb), GFP_KERNEL);
720
721 if (!sfb)
722 return NULL;
723
724 sfb->currcon = -1;
725 sfb->dev = dev;
726
727 /*** Init sfb->fb with default value ***/
728 sfb->fb.flags = FBINFO_FLAG_DEFAULT;
729 sfb->fb.fbops = &smtcfb_ops;
730 sfb->fb.var = smtcfb_var;
731 sfb->fb.fix = smtcfb_fix;
732
733 strcpy(sfb->fb.fix.id, name);
734
735 sfb->fb.fix.type = FB_TYPE_PACKED_PIXELS;
736 sfb->fb.fix.type_aux = 0;
737 sfb->fb.fix.xpanstep = 0;
738 sfb->fb.fix.ypanstep = 0;
739 sfb->fb.fix.ywrapstep = 0;
740 sfb->fb.fix.accel = FB_ACCEL_SMI_LYNX;
741
742 sfb->fb.var.nonstd = 0;
743 sfb->fb.var.activate = FB_ACTIVATE_NOW;
744 sfb->fb.var.height = -1;
745 sfb->fb.var.width = -1;
746 /* text mode acceleration */
747 sfb->fb.var.accel_flags = FB_ACCELF_TEXT;
748 sfb->fb.var.vmode = FB_VMODE_NONINTERLACED;
749 sfb->fb.par = &hw;
750 sfb->fb.pseudo_palette = colreg;
751
752 return sfb;
753 }
754
755 /*
756 * Unmap in the memory mapped IO registers
757 */
758
759 static void smtc_unmap_mmio(struct smtcfb_info *sfb)
760 {
761 if (sfb && smtc_RegBaseAddress)
762 smtc_RegBaseAddress = NULL;
763 }
764
765 /*
766 * Map in the screen memory
767 */
768
769 static int smtc_map_smem(struct smtcfb_info *sfb,
770 struct pci_dev *dev, u_long smem_len)
771 {
772 if (sfb->fb.var.bits_per_pixel == 32) {
773 #ifdef __BIG_ENDIAN
774 sfb->fb.fix.smem_start = pci_resource_start(dev, 0)
775 + 0x800000;
776 #else
777 sfb->fb.fix.smem_start = pci_resource_start(dev, 0);
778 #endif
779 } else {
780 sfb->fb.fix.smem_start = pci_resource_start(dev, 0);
781 }
782
783 sfb->fb.fix.smem_len = smem_len;
784
785 sfb->fb.screen_base = smtc_VRAMBaseAddress;
786
787 if (!sfb->fb.screen_base) {
788 printk(KERN_ERR "%s: unable to map screen memory\n",
789 sfb->fb.fix.id);
790 return -ENOMEM;
791 }
792
793 return 0;
794 }
795
796 /*
797 * Unmap in the screen memory
798 *
799 */
800 static void smtc_unmap_smem(struct smtcfb_info *sfb)
801 {
802 if (sfb && sfb->fb.screen_base) {
803 iounmap(sfb->fb.screen_base);
804 sfb->fb.screen_base = NULL;
805 }
806 }
807
808 /*
809 * We need to wake up the LynxEM+, and make sure its in linear memory mode.
810 */
811 static inline void sm7xx_init_hw(void)
812 {
813 outb_p(0x18, 0x3c4);
814 outb_p(0x11, 0x3c5);
815 }
816
817 static void smtc_free_fb_info(struct smtcfb_info *sfb)
818 {
819 if (sfb) {
820 fb_alloc_cmap(&sfb->fb.cmap, 0, 0);
821 kfree(sfb);
822 }
823 }
824
825 /*
826 * sm712vga_setup - process command line options, get vga parameter
827 * @options: string of options
828 * Returns zero.
829 *
830 */
831 static int __init sm712vga_setup(char *options)
832 {
833 int index;
834
835 if (!options || !*options) {
836 smdbg("\n No vga parameter\n");
837 return -EINVAL;
838 }
839
840 smtc_screen_info.lfb_width = 0;
841 smtc_screen_info.lfb_height = 0;
842 smtc_screen_info.lfb_depth = 0;
843
844 smdbg("\nsm712vga_setup = %s\n", options);
845
846 for (index = 0;
847 index < ARRAY_SIZE(vesa_mode);
848 index++) {
849 if (strstr(options, vesa_mode[index].mode_index)) {
850 smtc_screen_info.lfb_width = vesa_mode[index].lfb_width;
851 smtc_screen_info.lfb_height =
852 vesa_mode[index].lfb_height;
853 smtc_screen_info.lfb_depth = vesa_mode[index].lfb_depth;
854 return 0;
855 }
856 }
857
858 return -1;
859 }
860 __setup("vga=", sm712vga_setup);
861
862 /* Jason (08/13/2009)
863 * Original init function changed to probe method to be used by pci_drv
864 * process used to detect chips replaced with kernel process in pci_drv
865 */
866 static int __devinit smtcfb_pci_probe(struct pci_dev *pdev,
867 const struct pci_device_id *ent)
868 {
869 struct smtcfb_info *sfb;
870 u_long smem_size = 0x00800000; /* default 8MB */
871 char name[16];
872 int err;
873 unsigned long pFramebufferPhysical;
874
875 printk(KERN_INFO
876 "Silicon Motion display driver " SMTC_LINUX_FB_VERSION "\n");
877
878 err = pci_enable_device(pdev); /* enable SMTC chip */
879 if (err)
880 return err;
881
882 hw.chipID = ent->device;
883 sprintf(name, "sm%Xfb", hw.chipID);
884
885 sfb = smtc_alloc_fb_info(pdev, name);
886
887 if (!sfb)
888 goto failed_free;
889 /* Jason (08/13/2009)
890 * Store fb_info to be further used when suspending and resuming
891 */
892 pci_set_drvdata(pdev, sfb);
893
894 sm7xx_init_hw();
895
896 /*get mode parameter from smtc_screen_info */
897 if (smtc_screen_info.lfb_width != 0) {
898 sfb->fb.var.xres = smtc_screen_info.lfb_width;
899 sfb->fb.var.yres = smtc_screen_info.lfb_height;
900 sfb->fb.var.bits_per_pixel = smtc_screen_info.lfb_depth;
901 } else {
902 /* default resolution 1024x600 16bit mode */
903 sfb->fb.var.xres = SCREEN_X_RES;
904 sfb->fb.var.yres = SCREEN_Y_RES;
905 sfb->fb.var.bits_per_pixel = SCREEN_BPP;
906 }
907
908 #ifdef __BIG_ENDIAN
909 if (sfb->fb.var.bits_per_pixel == 24)
910 sfb->fb.var.bits_per_pixel = (smtc_screen_info.lfb_depth = 32);
911 #endif
912 /* Map address and memory detection */
913 pFramebufferPhysical = pci_resource_start(pdev, 0);
914 pci_read_config_byte(pdev, PCI_REVISION_ID, &hw.chipRevID);
915
916 switch (hw.chipID) {
917 case 0x710:
918 case 0x712:
919 sfb->fb.fix.mmio_start = pFramebufferPhysical + 0x00400000;
920 sfb->fb.fix.mmio_len = 0x00400000;
921 smem_size = SM712_VIDEOMEMORYSIZE;
922 #ifdef __BIG_ENDIAN
923 hw.m_pLFB = (smtc_VRAMBaseAddress =
924 ioremap(pFramebufferPhysical, 0x00c00000));
925 #else
926 hw.m_pLFB = (smtc_VRAMBaseAddress =
927 ioremap(pFramebufferPhysical, 0x00800000));
928 #endif
929 hw.m_pMMIO = (smtc_RegBaseAddress =
930 smtc_VRAMBaseAddress + 0x00700000);
931 hw.m_pDPR = smtc_VRAMBaseAddress + 0x00408000;
932 hw.m_pVPR = hw.m_pLFB + 0x0040c000;
933 #ifdef __BIG_ENDIAN
934 if (sfb->fb.var.bits_per_pixel == 32) {
935 smtc_VRAMBaseAddress += 0x800000;
936 hw.m_pLFB += 0x800000;
937 printk(KERN_INFO
938 "\nsmtc_VRAMBaseAddress=%p hw.m_pLFB=%p\n",
939 smtc_VRAMBaseAddress, hw.m_pLFB);
940 }
941 #endif
942 if (!smtc_RegBaseAddress) {
943 printk(KERN_ERR
944 "%s: unable to map memory mapped IO\n",
945 sfb->fb.fix.id);
946 err = -ENOMEM;
947 goto failed_fb;
948 }
949
950 /* set MCLK = 14.31818 * (0x16 / 0x2) */
951 smtc_seqw(0x6a, 0x16);
952 smtc_seqw(0x6b, 0x02);
953 smtc_seqw(0x62, 0x3e);
954 /* enable PCI burst */
955 smtc_seqw(0x17, 0x20);
956 /* enable word swap */
957 #ifdef __BIG_ENDIAN
958 if (sfb->fb.var.bits_per_pixel == 32)
959 smtc_seqw(0x17, 0x30);
960 #endif
961 break;
962 case 0x720:
963 sfb->fb.fix.mmio_start = pFramebufferPhysical;
964 sfb->fb.fix.mmio_len = 0x00200000;
965 smem_size = SM722_VIDEOMEMORYSIZE;
966 hw.m_pDPR = ioremap(pFramebufferPhysical, 0x00a00000);
967 hw.m_pLFB = (smtc_VRAMBaseAddress =
968 hw.m_pDPR + 0x00200000);
969 hw.m_pMMIO = (smtc_RegBaseAddress =
970 hw.m_pDPR + 0x000c0000);
971 hw.m_pVPR = hw.m_pDPR + 0x800;
972
973 smtc_seqw(0x62, 0xff);
974 smtc_seqw(0x6a, 0x0d);
975 smtc_seqw(0x6b, 0x02);
976 break;
977 default:
978 printk(KERN_ERR
979 "No valid Silicon Motion display chip was detected!\n");
980
981 goto failed_fb;
982 }
983
984 /* can support 32 bpp */
985 if (15 == sfb->fb.var.bits_per_pixel)
986 sfb->fb.var.bits_per_pixel = 16;
987
988 sfb->fb.var.xres_virtual = sfb->fb.var.xres;
989 sfb->fb.var.yres_virtual = sfb->fb.var.yres;
990 err = smtc_map_smem(sfb, pdev, smem_size);
991 if (err)
992 goto failed;
993
994 smtcfb_setmode(sfb);
995 /* Primary display starting from 0 position */
996 hw.BaseAddressInVRAM = 0;
997 sfb->fb.par = &hw;
998
999 err = register_framebuffer(&sfb->fb);
1000 if (err < 0)
1001 goto failed;
1002
1003 printk(KERN_INFO "Silicon Motion SM%X Rev%X primary display mode"
1004 "%dx%d-%d Init Complete.\n", hw.chipID, hw.chipRevID,
1005 sfb->fb.var.xres, sfb->fb.var.yres,
1006 sfb->fb.var.bits_per_pixel);
1007
1008 return 0;
1009
1010 failed:
1011 printk(KERN_ERR "Silicon Motion, Inc. primary display init fail\n");
1012
1013 smtc_unmap_smem(sfb);
1014 smtc_unmap_mmio(sfb);
1015 failed_fb:
1016 smtc_free_fb_info(sfb);
1017
1018 failed_free:
1019 pci_disable_device(pdev);
1020
1021 return err;
1022 }
1023
1024
1025 /* Jason (08/11/2009) PCI_DRV wrapper essential structs */
1026 static DEFINE_PCI_DEVICE_TABLE(smtcfb_pci_table) = {
1027 { PCI_DEVICE(0x126f, 0x710), },
1028 { PCI_DEVICE(0x126f, 0x712), },
1029 { PCI_DEVICE(0x126f, 0x720), },
1030 {0,}
1031 };
1032
1033
1034 /* Jason (08/14/2009)
1035 * do some clean up when the driver module is removed
1036 */
1037 static void __devexit smtcfb_pci_remove(struct pci_dev *pdev)
1038 {
1039 struct smtcfb_info *sfb;
1040
1041 sfb = pci_get_drvdata(pdev);
1042 pci_set_drvdata(pdev, NULL);
1043 smtc_unmap_smem(sfb);
1044 smtc_unmap_mmio(sfb);
1045 unregister_framebuffer(&sfb->fb);
1046 smtc_free_fb_info(sfb);
1047 }
1048
1049 #ifdef CONFIG_PM
1050 static int smtcfb_pci_suspend(struct device *device)
1051 {
1052 struct pci_dev *pdev = to_pci_dev(device);
1053 struct smtcfb_info *sfb;
1054
1055 sfb = pci_get_drvdata(pdev);
1056
1057 /* set the hw in sleep mode use externel clock and self memory refresh
1058 * so that we can turn off internal PLLs later on
1059 */
1060 smtc_seqw(0x20, (smtc_seqr(0x20) | 0xc0));
1061 smtc_seqw(0x69, (smtc_seqr(0x69) & 0xf7));
1062
1063 console_lock();
1064 fb_set_suspend(&sfb->fb, 1);
1065 console_unlock();
1066
1067 /* additionally turn off all function blocks including internal PLLs */
1068 smtc_seqw(0x21, 0xff);
1069
1070 return 0;
1071 }
1072
1073 static int smtcfb_pci_resume(struct device *device)
1074 {
1075 struct pci_dev *pdev = to_pci_dev(device);
1076 struct smtcfb_info *sfb;
1077
1078 sfb = pci_get_drvdata(pdev);
1079
1080 /* reinit hardware */
1081 sm7xx_init_hw();
1082 switch (hw.chipID) {
1083 case 0x710:
1084 case 0x712:
1085 /* set MCLK = 14.31818 * (0x16 / 0x2) */
1086 smtc_seqw(0x6a, 0x16);
1087 smtc_seqw(0x6b, 0x02);
1088 smtc_seqw(0x62, 0x3e);
1089 /* enable PCI burst */
1090 smtc_seqw(0x17, 0x20);
1091 #ifdef __BIG_ENDIAN
1092 if (sfb->fb.var.bits_per_pixel == 32)
1093 smtc_seqw(0x17, 0x30);
1094 #endif
1095 break;
1096 case 0x720:
1097 smtc_seqw(0x62, 0xff);
1098 smtc_seqw(0x6a, 0x0d);
1099 smtc_seqw(0x6b, 0x02);
1100 break;
1101 }
1102
1103 smtc_seqw(0x34, (smtc_seqr(0x34) | 0xc0));
1104 smtc_seqw(0x33, ((smtc_seqr(0x33) | 0x08) & 0xfb));
1105
1106 smtcfb_setmode(sfb);
1107
1108 console_lock();
1109 fb_set_suspend(&sfb->fb, 0);
1110 console_unlock();
1111
1112 return 0;
1113 }
1114
1115 static const struct dev_pm_ops sm7xx_pm_ops = {
1116 .suspend = smtcfb_pci_suspend,
1117 .resume = smtcfb_pci_resume,
1118 .freeze = smtcfb_pci_suspend,
1119 .thaw = smtcfb_pci_resume,
1120 .poweroff = smtcfb_pci_suspend,
1121 .restore = smtcfb_pci_resume,
1122 };
1123
1124 #define SM7XX_PM_OPS (&sm7xx_pm_ops)
1125
1126 #else /* !CONFIG_PM */
1127
1128 #define SM7XX_PM_OPS NULL
1129
1130 #endif /* !CONFIG_PM */
1131
1132 static struct pci_driver smtcfb_driver = {
1133 .name = "smtcfb",
1134 .id_table = smtcfb_pci_table,
1135 .probe = smtcfb_pci_probe,
1136 .remove = __devexit_p(smtcfb_pci_remove),
1137 .driver.pm = SM7XX_PM_OPS,
1138 };
1139
1140 static int __init smtcfb_init(void)
1141 {
1142 return pci_register_driver(&smtcfb_driver);
1143 }
1144
1145 static void __exit smtcfb_exit(void)
1146 {
1147 pci_unregister_driver(&smtcfb_driver);
1148 }
1149
1150 module_init(smtcfb_init);
1151 module_exit(smtcfb_exit);
1152
1153 MODULE_AUTHOR("Siliconmotion ");
1154 MODULE_DESCRIPTION("Framebuffer driver for SMI Graphic Cards");
1155 MODULE_LICENSE("GPL");