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i2c-eg20t: change timeout value 50msec to 1000msec
[zen-stable.git] / drivers / tty / serial / bfin_uart.c
blob26953bfa6922f4ffbebc8da4bb7a2ac60f672695
1 /*
2 * Blackfin On-Chip Serial Driver
3 *
4 * Copyright 2006-2010 Analog Devices Inc.
5 *
6 * Enter bugs at http://blackfin.uclinux.org/
7 *
8 * Licensed under the GPL-2 or later.
9 */
10
11 #if defined(CONFIG_SERIAL_BFIN_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
12 #define SUPPORT_SYSRQ
13 #endif
14
15 #define DRIVER_NAME "bfin-uart"
16 #define pr_fmt(fmt) DRIVER_NAME ": " fmt
17
18 #include <linux/module.h>
19 #include <linux/ioport.h>
20 #include <linux/gfp.h>
21 #include <linux/io.h>
22 #include <linux/init.h>
23 #include <linux/console.h>
24 #include <linux/sysrq.h>
25 #include <linux/platform_device.h>
26 #include <linux/tty.h>
27 #include <linux/tty_flip.h>
28 #include <linux/serial_core.h>
29 #include <linux/gpio.h>
30 #include <linux/irq.h>
31 #include <linux/kgdb.h>
32 #include <linux/slab.h>
33 #include <linux/dma-mapping.h>
34
35 #include <asm/portmux.h>
36 #include <asm/cacheflush.h>
37 #include <asm/dma.h>
38
39 #define port_membase(uart) (((struct bfin_serial_port *)(uart))->port.membase)
40 #define get_lsr_cache(uart) (((struct bfin_serial_port *)(uart))->lsr)
41 #define put_lsr_cache(uart, v) (((struct bfin_serial_port *)(uart))->lsr = (v))
42 #include <asm/bfin_serial.h>
43
44 #ifdef CONFIG_SERIAL_BFIN_MODULE
45 # undef CONFIG_EARLY_PRINTK
46 #endif
47
48 #ifdef CONFIG_SERIAL_BFIN_MODULE
49 # undef CONFIG_EARLY_PRINTK
50 #endif
51
52 /* UART name and device definitions */
53 #define BFIN_SERIAL_DEV_NAME "ttyBF"
54 #define BFIN_SERIAL_MAJOR 204
55 #define BFIN_SERIAL_MINOR 64
56
57 static struct bfin_serial_port *bfin_serial_ports[BFIN_UART_NR_PORTS];
58
59 #if defined(CONFIG_KGDB_SERIAL_CONSOLE) || \
60 defined(CONFIG_KGDB_SERIAL_CONSOLE_MODULE)
61
62 # ifndef CONFIG_SERIAL_BFIN_PIO
63 # error KGDB only support UART in PIO mode.
64 # endif
65
66 static int kgdboc_port_line;
67 static int kgdboc_break_enabled;
68 #endif
69 /*
70 * Setup for console. Argument comes from the menuconfig
71 */
72 #define DMA_RX_XCOUNT 512
73 #define DMA_RX_YCOUNT (PAGE_SIZE / DMA_RX_XCOUNT)
74
75 #define DMA_RX_FLUSH_JIFFIES (HZ / 50)
76
77 #ifdef CONFIG_SERIAL_BFIN_DMA
78 static void bfin_serial_dma_tx_chars(struct bfin_serial_port *uart);
79 #else
80 static void bfin_serial_tx_chars(struct bfin_serial_port *uart);
81 #endif
82
83 static void bfin_serial_reset_irda(struct uart_port *port);
84
85 #if defined(CONFIG_SERIAL_BFIN_CTSRTS) || \
86 defined(CONFIG_SERIAL_BFIN_HARD_CTSRTS)
87 static unsigned int bfin_serial_get_mctrl(struct uart_port *port)
88 {
89 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
90 if (uart->cts_pin < 0)
91 return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
92
93 /* CTS PIN is negative assertive. */
94 if (UART_GET_CTS(uart))
95 return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
96 else
97 return TIOCM_DSR | TIOCM_CAR;
98 }
99
100 static void bfin_serial_set_mctrl(struct uart_port *port, unsigned int mctrl)
101 {
102 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
103 if (uart->rts_pin < 0)
104 return;
105
106 /* RTS PIN is negative assertive. */
107 if (mctrl & TIOCM_RTS)
108 UART_ENABLE_RTS(uart);
109 else
110 UART_DISABLE_RTS(uart);
111 }
112
113 /*
114 * Handle any change of modem status signal.
115 */
116 static irqreturn_t bfin_serial_mctrl_cts_int(int irq, void *dev_id)
117 {
118 struct bfin_serial_port *uart = dev_id;
119 unsigned int status = bfin_serial_get_mctrl(&uart->port);
120 #ifdef CONFIG_SERIAL_BFIN_HARD_CTSRTS
121 struct tty_struct *tty = uart->port.state->port.tty;
122
123 UART_CLEAR_SCTS(uart);
124 if (tty->hw_stopped) {
125 if (status) {
126 tty->hw_stopped = 0;
127 uart_write_wakeup(&uart->port);
128 }
129 } else {
130 if (!status)
131 tty->hw_stopped = 1;
132 }
133 #endif
134 uart_handle_cts_change(&uart->port, status & TIOCM_CTS);
135
136 return IRQ_HANDLED;
137 }
138 #else
139 static unsigned int bfin_serial_get_mctrl(struct uart_port *port)
140 {
141 return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
142 }
143
144 static void bfin_serial_set_mctrl(struct uart_port *port, unsigned int mctrl)
145 {
146 }
147 #endif
148
149 /*
150 * interrupts are disabled on entry
151 */
152 static void bfin_serial_stop_tx(struct uart_port *port)
153 {
154 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
155 #ifdef CONFIG_SERIAL_BFIN_DMA
156 struct circ_buf *xmit = &uart->port.state->xmit;
157 #endif
158
159 while (!(UART_GET_LSR(uart) & TEMT))
160 cpu_relax();
161
162 #ifdef CONFIG_SERIAL_BFIN_DMA
163 disable_dma(uart->tx_dma_channel);
164 xmit->tail = (xmit->tail + uart->tx_count) & (UART_XMIT_SIZE - 1);
165 uart->port.icount.tx += uart->tx_count;
166 uart->tx_count = 0;
167 uart->tx_done = 1;
168 #else
169 #ifdef CONFIG_BF54x
170 /* Clear TFI bit */
171 UART_PUT_LSR(uart, TFI);
172 #endif
173 UART_CLEAR_IER(uart, ETBEI);
174 #endif
175 }
176
177 /*
178 * port is locked and interrupts are disabled
179 */
180 static void bfin_serial_start_tx(struct uart_port *port)
181 {
182 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
183 struct tty_struct *tty = uart->port.state->port.tty;
184
185 /*
186 * To avoid losting RX interrupt, we reset IR function
187 * before sending data.
188 */
189 if (tty->termios->c_line == N_IRDA)
190 bfin_serial_reset_irda(port);
191
192 #ifdef CONFIG_SERIAL_BFIN_DMA
193 if (uart->tx_done)
194 bfin_serial_dma_tx_chars(uart);
195 #else
196 UART_SET_IER(uart, ETBEI);
197 bfin_serial_tx_chars(uart);
198 #endif
199 }
200
201 /*
202 * Interrupts are enabled
203 */
204 static void bfin_serial_stop_rx(struct uart_port *port)
205 {
206 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
207
208 UART_CLEAR_IER(uart, ERBFI);
209 }
210
211 /*
212 * Set the modem control timer to fire immediately.
213 */
214 static void bfin_serial_enable_ms(struct uart_port *port)
215 {
216 }
217
218
219 #if ANOMALY_05000363 && defined(CONFIG_SERIAL_BFIN_PIO)
220 # define UART_GET_ANOMALY_THRESHOLD(uart) ((uart)->anomaly_threshold)
221 # define UART_SET_ANOMALY_THRESHOLD(uart, v) ((uart)->anomaly_threshold = (v))
222 #else
223 # define UART_GET_ANOMALY_THRESHOLD(uart) 0
224 # define UART_SET_ANOMALY_THRESHOLD(uart, v)
225 #endif
226
227 #ifdef CONFIG_SERIAL_BFIN_PIO
228 static void bfin_serial_rx_chars(struct bfin_serial_port *uart)
229 {
230 struct tty_struct *tty = NULL;
231 unsigned int status, ch, flg;
232 static struct timeval anomaly_start = { .tv_sec = 0 };
233
234 status = UART_GET_LSR(uart);
235 UART_CLEAR_LSR(uart);
236
237 ch = UART_GET_CHAR(uart);
238 uart->port.icount.rx++;
239
240 #if defined(CONFIG_KGDB_SERIAL_CONSOLE) || \
241 defined(CONFIG_KGDB_SERIAL_CONSOLE_MODULE)
242 if (kgdb_connected && kgdboc_port_line == uart->port.line
243 && kgdboc_break_enabled)
244 if (ch == 0x3) {/* Ctrl + C */
245 kgdb_breakpoint();
246 return;
247 }
248
249 if (!uart->port.state || !uart->port.state->port.tty)
250 return;
251 #endif
252 tty = uart->port.state->port.tty;
253
254 if (ANOMALY_05000363) {
255 /* The BF533 (and BF561) family of processors have a nice anomaly
256 * where they continuously generate characters for a "single" break.
257 * We have to basically ignore this flood until the "next" valid
258 * character comes across. Due to the nature of the flood, it is
259 * not possible to reliably catch bytes that are sent too quickly
260 * after this break. So application code talking to the Blackfin
261 * which sends a break signal must allow at least 1.5 character
262 * times after the end of the break for things to stabilize. This
263 * timeout was picked as it must absolutely be larger than 1
264 * character time +/- some percent. So 1.5 sounds good. All other
265 * Blackfin families operate properly. Woo.
266 */
267 if (anomaly_start.tv_sec) {
268 struct timeval curr;
269 suseconds_t usecs;
270
271 if ((~ch & (~ch + 1)) & 0xff)
272 goto known_good_char;
273
274 do_gettimeofday(&curr);
275 if (curr.tv_sec - anomaly_start.tv_sec > 1)
276 goto known_good_char;
277
278 usecs = 0;
279 if (curr.tv_sec != anomaly_start.tv_sec)
280 usecs += USEC_PER_SEC;
281 usecs += curr.tv_usec - anomaly_start.tv_usec;
282
283 if (usecs > UART_GET_ANOMALY_THRESHOLD(uart))
284 goto known_good_char;
285
286 if (ch)
287 anomaly_start.tv_sec = 0;
288 else
289 anomaly_start = curr;
290
291 return;
292
293 known_good_char:
294 status &= ~BI;
295 anomaly_start.tv_sec = 0;
296 }
297 }
298
299 if (status & BI) {
300 if (ANOMALY_05000363)
301 if (bfin_revid() < 5)
302 do_gettimeofday(&anomaly_start);
303 uart->port.icount.brk++;
304 if (uart_handle_break(&uart->port))
305 goto ignore_char;
306 status &= ~(PE | FE);
307 }
308 if (status & PE)
309 uart->port.icount.parity++;
310 if (status & OE)
311 uart->port.icount.overrun++;
312 if (status & FE)
313 uart->port.icount.frame++;
314
315 status &= uart->port.read_status_mask;
316
317 if (status & BI)
318 flg = TTY_BREAK;
319 else if (status & PE)
320 flg = TTY_PARITY;
321 else if (status & FE)
322 flg = TTY_FRAME;
323 else
324 flg = TTY_NORMAL;
325
326 if (uart_handle_sysrq_char(&uart->port, ch))
327 goto ignore_char;
328
329 uart_insert_char(&uart->port, status, OE, ch, flg);
330
331 ignore_char:
332 tty_flip_buffer_push(tty);
333 }
334
335 static void bfin_serial_tx_chars(struct bfin_serial_port *uart)
336 {
337 struct circ_buf *xmit = &uart->port.state->xmit;
338
339 if (uart_circ_empty(xmit) || uart_tx_stopped(&uart->port)) {
340 #ifdef CONFIG_BF54x
341 /* Clear TFI bit */
342 UART_PUT_LSR(uart, TFI);
343 #endif
344 /* Anomaly notes:
345 * 05000215 - we always clear ETBEI within last UART TX
346 * interrupt to end a string. It is always set
347 * when start a new tx.
348 */
349 UART_CLEAR_IER(uart, ETBEI);
350 return;
351 }
352
353 if (uart->port.x_char) {
354 UART_PUT_CHAR(uart, uart->port.x_char);
355 uart->port.icount.tx++;
356 uart->port.x_char = 0;
357 }
358
359 while ((UART_GET_LSR(uart) & THRE) && xmit->tail != xmit->head) {
360 UART_PUT_CHAR(uart, xmit->buf[xmit->tail]);
361 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
362 uart->port.icount.tx++;
363 }
364
365 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
366 uart_write_wakeup(&uart->port);
367 }
368
369 static irqreturn_t bfin_serial_rx_int(int irq, void *dev_id)
370 {
371 struct bfin_serial_port *uart = dev_id;
372
373 while (UART_GET_LSR(uart) & DR)
374 bfin_serial_rx_chars(uart);
375
376 return IRQ_HANDLED;
377 }
378
379 static irqreturn_t bfin_serial_tx_int(int irq, void *dev_id)
380 {
381 struct bfin_serial_port *uart = dev_id;
382
383 spin_lock(&uart->port.lock);
384 if (UART_GET_LSR(uart) & THRE)
385 bfin_serial_tx_chars(uart);
386 spin_unlock(&uart->port.lock);
387
388 return IRQ_HANDLED;
389 }
390 #endif
391
392 #ifdef CONFIG_SERIAL_BFIN_DMA
393 static void bfin_serial_dma_tx_chars(struct bfin_serial_port *uart)
394 {
395 struct circ_buf *xmit = &uart->port.state->xmit;
396
397 uart->tx_done = 0;
398
399 if (uart_circ_empty(xmit) || uart_tx_stopped(&uart->port)) {
400 uart->tx_count = 0;
401 uart->tx_done = 1;
402 return;
403 }
404
405 if (uart->port.x_char) {
406 UART_PUT_CHAR(uart, uart->port.x_char);
407 uart->port.icount.tx++;
408 uart->port.x_char = 0;
409 }
410
411 uart->tx_count = CIRC_CNT(xmit->head, xmit->tail, UART_XMIT_SIZE);
412 if (uart->tx_count > (UART_XMIT_SIZE - xmit->tail))
413 uart->tx_count = UART_XMIT_SIZE - xmit->tail;
414 blackfin_dcache_flush_range((unsigned long)(xmit->buf+xmit->tail),
415 (unsigned long)(xmit->buf+xmit->tail+uart->tx_count));
416 set_dma_config(uart->tx_dma_channel,
417 set_bfin_dma_config(DIR_READ, DMA_FLOW_STOP,
418 INTR_ON_BUF,
419 DIMENSION_LINEAR,
420 DATA_SIZE_8,
421 DMA_SYNC_RESTART));
422 set_dma_start_addr(uart->tx_dma_channel, (unsigned long)(xmit->buf+xmit->tail));
423 set_dma_x_count(uart->tx_dma_channel, uart->tx_count);
424 set_dma_x_modify(uart->tx_dma_channel, 1);
425 SSYNC();
426 enable_dma(uart->tx_dma_channel);
427
428 UART_SET_IER(uart, ETBEI);
429 }
430
431 static void bfin_serial_dma_rx_chars(struct bfin_serial_port *uart)
432 {
433 struct tty_struct *tty = uart->port.state->port.tty;
434 int i, flg, status;
435
436 status = UART_GET_LSR(uart);
437 UART_CLEAR_LSR(uart);
438
439 uart->port.icount.rx +=
440 CIRC_CNT(uart->rx_dma_buf.head, uart->rx_dma_buf.tail,
441 UART_XMIT_SIZE);
442
443 if (status & BI) {
444 uart->port.icount.brk++;
445 if (uart_handle_break(&uart->port))
446 goto dma_ignore_char;
447 status &= ~(PE | FE);
448 }
449 if (status & PE)
450 uart->port.icount.parity++;
451 if (status & OE)
452 uart->port.icount.overrun++;
453 if (status & FE)
454 uart->port.icount.frame++;
455
456 status &= uart->port.read_status_mask;
457
458 if (status & BI)
459 flg = TTY_BREAK;
460 else if (status & PE)
461 flg = TTY_PARITY;
462 else if (status & FE)
463 flg = TTY_FRAME;
464 else
465 flg = TTY_NORMAL;
466
467 for (i = uart->rx_dma_buf.tail; ; i++) {
468 if (i >= UART_XMIT_SIZE)
469 i = 0;
470 if (i == uart->rx_dma_buf.head)
471 break;
472 if (!uart_handle_sysrq_char(&uart->port, uart->rx_dma_buf.buf[i]))
473 uart_insert_char(&uart->port, status, OE,
474 uart->rx_dma_buf.buf[i], flg);
475 }
476
477 dma_ignore_char:
478 tty_flip_buffer_push(tty);
479 }
480
481 void bfin_serial_rx_dma_timeout(struct bfin_serial_port *uart)
482 {
483 int x_pos, pos;
484
485 dma_disable_irq_nosync(uart->rx_dma_channel);
486 spin_lock_bh(&uart->rx_lock);
487
488 /* 2D DMA RX buffer ring is used. Because curr_y_count and
489 * curr_x_count can't be read as an atomic operation,
490 * curr_y_count should be read before curr_x_count. When
491 * curr_x_count is read, curr_y_count may already indicate
492 * next buffer line. But, the position calculated here is
493 * still indicate the old line. The wrong position data may
494 * be smaller than current buffer tail, which cause garbages
495 * are received if it is not prohibit.
496 */
497 uart->rx_dma_nrows = get_dma_curr_ycount(uart->rx_dma_channel);
498 x_pos = get_dma_curr_xcount(uart->rx_dma_channel);
499 uart->rx_dma_nrows = DMA_RX_YCOUNT - uart->rx_dma_nrows;
500 if (uart->rx_dma_nrows == DMA_RX_YCOUNT || x_pos == 0)
501 uart->rx_dma_nrows = 0;
502 x_pos = DMA_RX_XCOUNT - x_pos;
503 if (x_pos == DMA_RX_XCOUNT)
504 x_pos = 0;
505
506 pos = uart->rx_dma_nrows * DMA_RX_XCOUNT + x_pos;
507 /* Ignore receiving data if new position is in the same line of
508 * current buffer tail and small.
509 */
510 if (pos > uart->rx_dma_buf.tail ||
511 uart->rx_dma_nrows < (uart->rx_dma_buf.tail/DMA_RX_XCOUNT)) {
512 uart->rx_dma_buf.head = pos;
513 bfin_serial_dma_rx_chars(uart);
514 uart->rx_dma_buf.tail = uart->rx_dma_buf.head;
515 }
516
517 spin_unlock_bh(&uart->rx_lock);
518 dma_enable_irq(uart->rx_dma_channel);
519
520 mod_timer(&(uart->rx_dma_timer), jiffies + DMA_RX_FLUSH_JIFFIES);
521 }
522
523 static irqreturn_t bfin_serial_dma_tx_int(int irq, void *dev_id)
524 {
525 struct bfin_serial_port *uart = dev_id;
526 struct circ_buf *xmit = &uart->port.state->xmit;
527
528 spin_lock(&uart->port.lock);
529 if (!(get_dma_curr_irqstat(uart->tx_dma_channel)&DMA_RUN)) {
530 disable_dma(uart->tx_dma_channel);
531 clear_dma_irqstat(uart->tx_dma_channel);
532 /* Anomaly notes:
533 * 05000215 - we always clear ETBEI within last UART TX
534 * interrupt to end a string. It is always set
535 * when start a new tx.
536 */
537 UART_CLEAR_IER(uart, ETBEI);
538 xmit->tail = (xmit->tail + uart->tx_count) & (UART_XMIT_SIZE - 1);
539 uart->port.icount.tx += uart->tx_count;
540
541 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
542 uart_write_wakeup(&uart->port);
543
544 bfin_serial_dma_tx_chars(uart);
545 }
546
547 spin_unlock(&uart->port.lock);
548 return IRQ_HANDLED;
549 }
550
551 static irqreturn_t bfin_serial_dma_rx_int(int irq, void *dev_id)
552 {
553 struct bfin_serial_port *uart = dev_id;
554 unsigned short irqstat;
555 int x_pos, pos;
556
557 spin_lock(&uart->rx_lock);
558 irqstat = get_dma_curr_irqstat(uart->rx_dma_channel);
559 clear_dma_irqstat(uart->rx_dma_channel);
560
561 uart->rx_dma_nrows = get_dma_curr_ycount(uart->rx_dma_channel);
562 x_pos = get_dma_curr_xcount(uart->rx_dma_channel);
563 uart->rx_dma_nrows = DMA_RX_YCOUNT - uart->rx_dma_nrows;
564 if (uart->rx_dma_nrows == DMA_RX_YCOUNT || x_pos == 0)
565 uart->rx_dma_nrows = 0;
566
567 pos = uart->rx_dma_nrows * DMA_RX_XCOUNT;
568 if (pos > uart->rx_dma_buf.tail ||
569 uart->rx_dma_nrows < (uart->rx_dma_buf.tail/DMA_RX_XCOUNT)) {
570 uart->rx_dma_buf.head = pos;
571 bfin_serial_dma_rx_chars(uart);
572 uart->rx_dma_buf.tail = uart->rx_dma_buf.head;
573 }
574
575 spin_unlock(&uart->rx_lock);
576
577 return IRQ_HANDLED;
578 }
579 #endif
580
581 /*
582 * Return TIOCSER_TEMT when transmitter is not busy.
583 */
584 static unsigned int bfin_serial_tx_empty(struct uart_port *port)
585 {
586 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
587 unsigned short lsr;
588
589 lsr = UART_GET_LSR(uart);
590 if (lsr & TEMT)
591 return TIOCSER_TEMT;
592 else
593 return 0;
594 }
595
596 static void bfin_serial_break_ctl(struct uart_port *port, int break_state)
597 {
598 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
599 u16 lcr = UART_GET_LCR(uart);
600 if (break_state)
601 lcr |= SB;
602 else
603 lcr &= ~SB;
604 UART_PUT_LCR(uart, lcr);
605 SSYNC();
606 }
607
608 static int bfin_serial_startup(struct uart_port *port)
609 {
610 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
611
612 #ifdef CONFIG_SERIAL_BFIN_DMA
613 dma_addr_t dma_handle;
614
615 if (request_dma(uart->rx_dma_channel, "BFIN_UART_RX") < 0) {
616 printk(KERN_NOTICE "Unable to attach Blackfin UART RX DMA channel\n");
617 return -EBUSY;
618 }
619
620 if (request_dma(uart->tx_dma_channel, "BFIN_UART_TX") < 0) {
621 printk(KERN_NOTICE "Unable to attach Blackfin UART TX DMA channel\n");
622 free_dma(uart->rx_dma_channel);
623 return -EBUSY;
624 }
625
626 set_dma_callback(uart->rx_dma_channel, bfin_serial_dma_rx_int, uart);
627 set_dma_callback(uart->tx_dma_channel, bfin_serial_dma_tx_int, uart);
628
629 uart->rx_dma_buf.buf = (unsigned char *)dma_alloc_coherent(NULL, PAGE_SIZE, &dma_handle, GFP_DMA);
630 uart->rx_dma_buf.head = 0;
631 uart->rx_dma_buf.tail = 0;
632 uart->rx_dma_nrows = 0;
633
634 set_dma_config(uart->rx_dma_channel,
635 set_bfin_dma_config(DIR_WRITE, DMA_FLOW_AUTO,
636 INTR_ON_ROW, DIMENSION_2D,
637 DATA_SIZE_8,
638 DMA_SYNC_RESTART));
639 set_dma_x_count(uart->rx_dma_channel, DMA_RX_XCOUNT);
640 set_dma_x_modify(uart->rx_dma_channel, 1);
641 set_dma_y_count(uart->rx_dma_channel, DMA_RX_YCOUNT);
642 set_dma_y_modify(uart->rx_dma_channel, 1);
643 set_dma_start_addr(uart->rx_dma_channel, (unsigned long)uart->rx_dma_buf.buf);
644 enable_dma(uart->rx_dma_channel);
645
646 uart->rx_dma_timer.data = (unsigned long)(uart);
647 uart->rx_dma_timer.function = (void *)bfin_serial_rx_dma_timeout;
648 uart->rx_dma_timer.expires = jiffies + DMA_RX_FLUSH_JIFFIES;
649 add_timer(&(uart->rx_dma_timer));
650 #else
651 # if defined(CONFIG_KGDB_SERIAL_CONSOLE) || \
652 defined(CONFIG_KGDB_SERIAL_CONSOLE_MODULE)
653 if (kgdboc_port_line == uart->port.line && kgdboc_break_enabled)
654 kgdboc_break_enabled = 0;
655 else {
656 # endif
657 if (request_irq(uart->rx_irq, bfin_serial_rx_int, 0,
658 "BFIN_UART_RX", uart)) {
659 printk(KERN_NOTICE "Unable to attach BlackFin UART RX interrupt\n");
660 return -EBUSY;
661 }
662
663 if (request_irq
664 (uart->tx_irq, bfin_serial_tx_int, 0,
665 "BFIN_UART_TX", uart)) {
666 printk(KERN_NOTICE "Unable to attach BlackFin UART TX interrupt\n");
667 free_irq(uart->rx_irq, uart);
668 return -EBUSY;
669 }
670
671 # ifdef CONFIG_BF54x
672 {
673 /*
674 * UART2 and UART3 on BF548 share interrupt PINs and DMA
675 * controllers with SPORT2 and SPORT3. UART rx and tx
676 * interrupts are generated in PIO mode only when configure
677 * their peripheral mapping registers properly, which means
678 * request corresponding DMA channels in PIO mode as well.
679 */
680 unsigned uart_dma_ch_rx, uart_dma_ch_tx;
681
682 switch (uart->rx_irq) {
683 case IRQ_UART3_RX:
684 uart_dma_ch_rx = CH_UART3_RX;
685 uart_dma_ch_tx = CH_UART3_TX;
686 break;
687 case IRQ_UART2_RX:
688 uart_dma_ch_rx = CH_UART2_RX;
689 uart_dma_ch_tx = CH_UART2_TX;
690 break;
691 default:
692 uart_dma_ch_rx = uart_dma_ch_tx = 0;
693 break;
694 };
695
696 if (uart_dma_ch_rx &&
697 request_dma(uart_dma_ch_rx, "BFIN_UART_RX") < 0) {
698 printk(KERN_NOTICE"Fail to attach UART interrupt\n");
699 free_irq(uart->rx_irq, uart);
700 free_irq(uart->tx_irq, uart);
701 return -EBUSY;
702 }
703 if (uart_dma_ch_tx &&
704 request_dma(uart_dma_ch_tx, "BFIN_UART_TX") < 0) {
705 printk(KERN_NOTICE "Fail to attach UART interrupt\n");
706 free_dma(uart_dma_ch_rx);
707 free_irq(uart->rx_irq, uart);
708 free_irq(uart->tx_irq, uart);
709 return -EBUSY;
710 }
711 }
712 # endif
713 # if defined(CONFIG_KGDB_SERIAL_CONSOLE) || \
714 defined(CONFIG_KGDB_SERIAL_CONSOLE_MODULE)
715 }
716 # endif
717 #endif
718
719 #ifdef CONFIG_SERIAL_BFIN_CTSRTS
720 if (uart->cts_pin >= 0) {
721 if (request_irq(gpio_to_irq(uart->cts_pin),
722 bfin_serial_mctrl_cts_int,
723 IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING |
724 0, "BFIN_UART_CTS", uart)) {
725 uart->cts_pin = -1;
726 pr_info("Unable to attach BlackFin UART CTS interrupt. So, disable it.\n");
727 }
728 }
729 if (uart->rts_pin >= 0) {
730 if (gpio_request(uart->rts_pin, DRIVER_NAME)) {
731 pr_info("fail to request RTS PIN at GPIO_%d\n", uart->rts_pin);
732 uart->rts_pin = -1;
733 } else
734 gpio_direction_output(uart->rts_pin, 0);
735 }
736 #endif
737 #ifdef CONFIG_SERIAL_BFIN_HARD_CTSRTS
738 if (uart->cts_pin >= 0) {
739 if (request_irq(uart->status_irq, bfin_serial_mctrl_cts_int,
740 IRQF_DISABLED, "BFIN_UART_MODEM_STATUS", uart)) {
741 uart->cts_pin = -1;
742 dev_info(port->dev, "Unable to attach BlackFin UART Modem Status interrupt.\n");
743 }
744
745 /* CTS RTS PINs are negative assertive. */
746 UART_PUT_MCR(uart, ACTS);
747 UART_SET_IER(uart, EDSSI);
748 }
749 #endif
750
751 UART_SET_IER(uart, ERBFI);
752 return 0;
753 }
754
755 static void bfin_serial_shutdown(struct uart_port *port)
756 {
757 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
758
759 #ifdef CONFIG_SERIAL_BFIN_DMA
760 disable_dma(uart->tx_dma_channel);
761 free_dma(uart->tx_dma_channel);
762 disable_dma(uart->rx_dma_channel);
763 free_dma(uart->rx_dma_channel);
764 del_timer(&(uart->rx_dma_timer));
765 dma_free_coherent(NULL, PAGE_SIZE, uart->rx_dma_buf.buf, 0);
766 #else
767 #ifdef CONFIG_BF54x
768 switch (uart->port.irq) {
769 case IRQ_UART3_RX:
770 free_dma(CH_UART3_RX);
771 free_dma(CH_UART3_TX);
772 break;
773 case IRQ_UART2_RX:
774 free_dma(CH_UART2_RX);
775 free_dma(CH_UART2_TX);
776 break;
777 default:
778 break;
779 };
780 #endif
781 free_irq(uart->rx_irq, uart);
782 free_irq(uart->tx_irq, uart);
783 #endif
784
785 #ifdef CONFIG_SERIAL_BFIN_CTSRTS
786 if (uart->cts_pin >= 0)
787 free_irq(gpio_to_irq(uart->cts_pin), uart);
788 if (uart->rts_pin >= 0)
789 gpio_free(uart->rts_pin);
790 #endif
791 #ifdef CONFIG_SERIAL_BFIN_HARD_CTSRTS
792 if (uart->cts_pin >= 0)
793 free_irq(uart->status_irq, uart);
794 #endif
795 }
796
797 static void
798 bfin_serial_set_termios(struct uart_port *port, struct ktermios *termios,
799 struct ktermios *old)
800 {
801 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
802 unsigned long flags;
803 unsigned int baud, quot;
804 unsigned short val, ier, lcr = 0;
805
806 switch (termios->c_cflag & CSIZE) {
807 case CS8:
808 lcr = WLS(8);
809 break;
810 case CS7:
811 lcr = WLS(7);
812 break;
813 case CS6:
814 lcr = WLS(6);
815 break;
816 case CS5:
817 lcr = WLS(5);
818 break;
819 default:
820 printk(KERN_ERR "%s: word lengh not supported\n",
821 __func__);
822 }
823
824 /* Anomaly notes:
825 * 05000231 - STOP bit is always set to 1 whatever the user is set.
826 */
827 if (termios->c_cflag & CSTOPB) {
828 if (ANOMALY_05000231)
829 printk(KERN_WARNING "STOP bits other than 1 is not "
830 "supported in case of anomaly 05000231.\n");
831 else
832 lcr |= STB;
833 }
834 if (termios->c_cflag & PARENB)
835 lcr |= PEN;
836 if (!(termios->c_cflag & PARODD))
837 lcr |= EPS;
838 if (termios->c_cflag & CMSPAR)
839 lcr |= STP;
840
841 spin_lock_irqsave(&uart->port.lock, flags);
842
843 port->read_status_mask = OE;
844 if (termios->c_iflag & INPCK)
845 port->read_status_mask |= (FE | PE);
846 if (termios->c_iflag & (BRKINT | PARMRK))
847 port->read_status_mask |= BI;
848
849 /*
850 * Characters to ignore
851 */
852 port->ignore_status_mask = 0;
853 if (termios->c_iflag & IGNPAR)
854 port->ignore_status_mask |= FE | PE;
855 if (termios->c_iflag & IGNBRK) {
856 port->ignore_status_mask |= BI;
857 /*
858 * If we're ignoring parity and break indicators,
859 * ignore overruns too (for real raw support).
860 */
861 if (termios->c_iflag & IGNPAR)
862 port->ignore_status_mask |= OE;
863 }
864
865 baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
866 quot = uart_get_divisor(port, baud);
867
868 /* If discipline is not IRDA, apply ANOMALY_05000230 */
869 if (termios->c_line != N_IRDA)
870 quot -= ANOMALY_05000230;
871
872 UART_SET_ANOMALY_THRESHOLD(uart, USEC_PER_SEC / baud * 15);
873
874 /* Disable UART */
875 ier = UART_GET_IER(uart);
876 UART_DISABLE_INTS(uart);
877
878 /* Set DLAB in LCR to Access DLL and DLH */
879 UART_SET_DLAB(uart);
880
881 UART_PUT_DLL(uart, quot & 0xFF);
882 UART_PUT_DLH(uart, (quot >> 8) & 0xFF);
883 SSYNC();
884
885 /* Clear DLAB in LCR to Access THR RBR IER */
886 UART_CLEAR_DLAB(uart);
887
888 UART_PUT_LCR(uart, lcr);
889
890 /* Enable UART */
891 UART_ENABLE_INTS(uart, ier);
892
893 val = UART_GET_GCTL(uart);
894 val |= UCEN;
895 UART_PUT_GCTL(uart, val);
896
897 /* Port speed changed, update the per-port timeout. */
898 uart_update_timeout(port, termios->c_cflag, baud);
899
900 spin_unlock_irqrestore(&uart->port.lock, flags);
901 }
902
903 static const char *bfin_serial_type(struct uart_port *port)
904 {
905 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
906
907 return uart->port.type == PORT_BFIN ? "BFIN-UART" : NULL;
908 }
909
910 /*
911 * Release the memory region(s) being used by 'port'.
912 */
913 static void bfin_serial_release_port(struct uart_port *port)
914 {
915 }
916
917 /*
918 * Request the memory region(s) being used by 'port'.
919 */
920 static int bfin_serial_request_port(struct uart_port *port)
921 {
922 return 0;
923 }
924
925 /*
926 * Configure/autoconfigure the port.
927 */
928 static void bfin_serial_config_port(struct uart_port *port, int flags)
929 {
930 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
931
932 if (flags & UART_CONFIG_TYPE &&
933 bfin_serial_request_port(&uart->port) == 0)
934 uart->port.type = PORT_BFIN;
935 }
936
937 /*
938 * Verify the new serial_struct (for TIOCSSERIAL).
939 * The only change we allow are to the flags and type, and
940 * even then only between PORT_BFIN and PORT_UNKNOWN
941 */
942 static int
943 bfin_serial_verify_port(struct uart_port *port, struct serial_struct *ser)
944 {
945 return 0;
946 }
947
948 /*
949 * Enable the IrDA function if tty->ldisc.num is N_IRDA.
950 * In other cases, disable IrDA function.
951 */
952 static void bfin_serial_set_ldisc(struct uart_port *port, int ld)
953 {
954 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
955 unsigned short val;
956
957 switch (ld) {
958 case N_IRDA:
959 val = UART_GET_GCTL(uart);
960 val |= (IREN | RPOLC);
961 UART_PUT_GCTL(uart, val);
962 break;
963 default:
964 val = UART_GET_GCTL(uart);
965 val &= ~(IREN | RPOLC);
966 UART_PUT_GCTL(uart, val);
967 }
968 }
969
970 static void bfin_serial_reset_irda(struct uart_port *port)
971 {
972 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
973 unsigned short val;
974
975 val = UART_GET_GCTL(uart);
976 val &= ~(IREN | RPOLC);
977 UART_PUT_GCTL(uart, val);
978 SSYNC();
979 val |= (IREN | RPOLC);
980 UART_PUT_GCTL(uart, val);
981 SSYNC();
982 }
983
984 #ifdef CONFIG_CONSOLE_POLL
985 /* Anomaly notes:
986 * 05000099 - Because we only use THRE in poll_put and DR in poll_get,
987 * losing other bits of UART_LSR is not a problem here.
988 */
989 static void bfin_serial_poll_put_char(struct uart_port *port, unsigned char chr)
990 {
991 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
992
993 while (!(UART_GET_LSR(uart) & THRE))
994 cpu_relax();
995
996 UART_CLEAR_DLAB(uart);
997 UART_PUT_CHAR(uart, (unsigned char)chr);
998 }
999
1000 static int bfin_serial_poll_get_char(struct uart_port *port)
1001 {
1002 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
1003 unsigned char chr;
1004
1005 while (!(UART_GET_LSR(uart) & DR))
1006 cpu_relax();
1007
1008 UART_CLEAR_DLAB(uart);
1009 chr = UART_GET_CHAR(uart);
1010
1011 return chr;
1012 }
1013 #endif
1014
1015 #if defined(CONFIG_KGDB_SERIAL_CONSOLE) || \
1016 defined(CONFIG_KGDB_SERIAL_CONSOLE_MODULE)
1017 static void bfin_kgdboc_port_shutdown(struct uart_port *port)
1018 {
1019 if (kgdboc_break_enabled) {
1020 kgdboc_break_enabled = 0;
1021 bfin_serial_shutdown(port);
1022 }
1023 }
1024
1025 static int bfin_kgdboc_port_startup(struct uart_port *port)
1026 {
1027 kgdboc_port_line = port->line;
1028 kgdboc_break_enabled = !bfin_serial_startup(port);
1029 return 0;
1030 }
1031 #endif
1032
1033 static struct uart_ops bfin_serial_pops = {
1034 .tx_empty = bfin_serial_tx_empty,
1035 .set_mctrl = bfin_serial_set_mctrl,
1036 .get_mctrl = bfin_serial_get_mctrl,
1037 .stop_tx = bfin_serial_stop_tx,
1038 .start_tx = bfin_serial_start_tx,
1039 .stop_rx = bfin_serial_stop_rx,
1040 .enable_ms = bfin_serial_enable_ms,
1041 .break_ctl = bfin_serial_break_ctl,
1042 .startup = bfin_serial_startup,
1043 .shutdown = bfin_serial_shutdown,
1044 .set_termios = bfin_serial_set_termios,
1045 .set_ldisc = bfin_serial_set_ldisc,
1046 .type = bfin_serial_type,
1047 .release_port = bfin_serial_release_port,
1048 .request_port = bfin_serial_request_port,
1049 .config_port = bfin_serial_config_port,
1050 .verify_port = bfin_serial_verify_port,
1051 #if defined(CONFIG_KGDB_SERIAL_CONSOLE) || \
1052 defined(CONFIG_KGDB_SERIAL_CONSOLE_MODULE)
1053 .kgdboc_port_startup = bfin_kgdboc_port_startup,
1054 .kgdboc_port_shutdown = bfin_kgdboc_port_shutdown,
1055 #endif
1056 #ifdef CONFIG_CONSOLE_POLL
1057 .poll_put_char = bfin_serial_poll_put_char,
1058 .poll_get_char = bfin_serial_poll_get_char,
1059 #endif
1060 };
1061
1062 #if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
1063 /*
1064 * If the port was already initialised (eg, by a boot loader),
1065 * try to determine the current setup.
1066 */
1067 static void __init
1068 bfin_serial_console_get_options(struct bfin_serial_port *uart, int *baud,
1069 int *parity, int *bits)
1070 {
1071 unsigned short status;
1072
1073 status = UART_GET_IER(uart) & (ERBFI | ETBEI);
1074 if (status == (ERBFI | ETBEI)) {
1075 /* ok, the port was enabled */
1076 u16 lcr, dlh, dll;
1077
1078 lcr = UART_GET_LCR(uart);
1079
1080 *parity = 'n';
1081 if (lcr & PEN) {
1082 if (lcr & EPS)
1083 *parity = 'e';
1084 else
1085 *parity = 'o';
1086 }
1087 switch (lcr & 0x03) {
1088 case 0:
1089 *bits = 5;
1090 break;
1091 case 1:
1092 *bits = 6;
1093 break;
1094 case 2:
1095 *bits = 7;
1096 break;
1097 case 3:
1098 *bits = 8;
1099 break;
1100 }
1101 /* Set DLAB in LCR to Access DLL and DLH */
1102 UART_SET_DLAB(uart);
1103
1104 dll = UART_GET_DLL(uart);
1105 dlh = UART_GET_DLH(uart);
1106
1107 /* Clear DLAB in LCR to Access THR RBR IER */
1108 UART_CLEAR_DLAB(uart);
1109
1110 *baud = get_sclk() / (16*(dll | dlh << 8));
1111 }
1112 pr_debug("%s:baud = %d, parity = %c, bits= %d\n", __func__, *baud, *parity, *bits);
1113 }
1114
1115 static struct uart_driver bfin_serial_reg;
1116
1117 static void bfin_serial_console_putchar(struct uart_port *port, int ch)
1118 {
1119 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
1120 while (!(UART_GET_LSR(uart) & THRE))
1121 barrier();
1122 UART_PUT_CHAR(uart, ch);
1123 }
1124
1125 #endif /* defined (CONFIG_SERIAL_BFIN_CONSOLE) ||
1126 defined (CONFIG_EARLY_PRINTK) */
1127
1128 #ifdef CONFIG_SERIAL_BFIN_CONSOLE
1129 #define CLASS_BFIN_CONSOLE "bfin-console"
1130 /*
1131 * Interrupts are disabled on entering
1132 */
1133 static void
1134 bfin_serial_console_write(struct console *co, const char *s, unsigned int count)
1135 {
1136 struct bfin_serial_port *uart = bfin_serial_ports[co->index];
1137 unsigned long flags;
1138
1139 spin_lock_irqsave(&uart->port.lock, flags);
1140 uart_console_write(&uart->port, s, count, bfin_serial_console_putchar);
1141 spin_unlock_irqrestore(&uart->port.lock, flags);
1142
1143 }
1144
1145 static int __init
1146 bfin_serial_console_setup(struct console *co, char *options)
1147 {
1148 struct bfin_serial_port *uart;
1149 int baud = 57600;
1150 int bits = 8;
1151 int parity = 'n';
1152 # if defined(CONFIG_SERIAL_BFIN_CTSRTS) || \
1153 defined(CONFIG_SERIAL_BFIN_HARD_CTSRTS)
1154 int flow = 'r';
1155 # else
1156 int flow = 'n';
1157 # endif
1158
1159 /*
1160 * Check whether an invalid uart number has been specified, and
1161 * if so, search for the first available port that does have
1162 * console support.
1163 */
1164 if (co->index < 0 || co->index >= BFIN_UART_NR_PORTS)
1165 return -ENODEV;
1166
1167 uart = bfin_serial_ports[co->index];
1168 if (!uart)
1169 return -ENODEV;
1170
1171 if (options)
1172 uart_parse_options(options, &baud, &parity, &bits, &flow);
1173 else
1174 bfin_serial_console_get_options(uart, &baud, &parity, &bits);
1175
1176 return uart_set_options(&uart->port, co, baud, parity, bits, flow);
1177 }
1178
1179 static struct console bfin_serial_console = {
1180 .name = BFIN_SERIAL_DEV_NAME,
1181 .write = bfin_serial_console_write,
1182 .device = uart_console_device,
1183 .setup = bfin_serial_console_setup,
1184 .flags = CON_PRINTBUFFER,
1185 .index = -1,
1186 .data = &bfin_serial_reg,
1187 };
1188 #define BFIN_SERIAL_CONSOLE (&bfin_serial_console)
1189 #else
1190 #define BFIN_SERIAL_CONSOLE NULL
1191 #endif /* CONFIG_SERIAL_BFIN_CONSOLE */
1192
1193 #ifdef CONFIG_EARLY_PRINTK
1194 static struct bfin_serial_port bfin_earlyprintk_port;
1195 #define CLASS_BFIN_EARLYPRINTK "bfin-earlyprintk"
1196
1197 /*
1198 * Interrupts are disabled on entering
1199 */
1200 static void
1201 bfin_earlyprintk_console_write(struct console *co, const char *s, unsigned int count)
1202 {
1203 unsigned long flags;
1204
1205 if (bfin_earlyprintk_port.port.line != co->index)
1206 return;
1207
1208 spin_lock_irqsave(&bfin_earlyprintk_port.port.lock, flags);
1209 uart_console_write(&bfin_earlyprintk_port.port, s, count,
1210 bfin_serial_console_putchar);
1211 spin_unlock_irqrestore(&bfin_earlyprintk_port.port.lock, flags);
1212 }
1213
1214 /*
1215 * This should have a .setup or .early_setup in it, but then things get called
1216 * without the command line options, and the baud rate gets messed up - so
1217 * don't let the common infrastructure play with things. (see calls to setup
1218 * & earlysetup in ./kernel/printk.c:register_console()
1219 */
1220 static struct __initdata console bfin_early_serial_console = {
1221 .name = "early_BFuart",
1222 .write = bfin_earlyprintk_console_write,
1223 .device = uart_console_device,
1224 .flags = CON_PRINTBUFFER,
1225 .index = -1,
1226 .data = &bfin_serial_reg,
1227 };
1228 #endif
1229
1230 static struct uart_driver bfin_serial_reg = {
1231 .owner = THIS_MODULE,
1232 .driver_name = DRIVER_NAME,
1233 .dev_name = BFIN_SERIAL_DEV_NAME,
1234 .major = BFIN_SERIAL_MAJOR,
1235 .minor = BFIN_SERIAL_MINOR,
1236 .nr = BFIN_UART_NR_PORTS,
1237 .cons = BFIN_SERIAL_CONSOLE,
1238 };
1239
1240 static int bfin_serial_suspend(struct platform_device *pdev, pm_message_t state)
1241 {
1242 struct bfin_serial_port *uart = platform_get_drvdata(pdev);
1243
1244 return uart_suspend_port(&bfin_serial_reg, &uart->port);
1245 }
1246
1247 static int bfin_serial_resume(struct platform_device *pdev)
1248 {
1249 struct bfin_serial_port *uart = platform_get_drvdata(pdev);
1250
1251 return uart_resume_port(&bfin_serial_reg, &uart->port);
1252 }
1253
1254 static int bfin_serial_probe(struct platform_device *pdev)
1255 {
1256 struct resource *res;
1257 struct bfin_serial_port *uart = NULL;
1258 int ret = 0;
1259
1260 if (pdev->id < 0 || pdev->id >= BFIN_UART_NR_PORTS) {
1261 dev_err(&pdev->dev, "Wrong bfin uart platform device id.\n");
1262 return -ENOENT;
1263 }
1264
1265 if (bfin_serial_ports[pdev->id] == NULL) {
1266
1267 uart = kzalloc(sizeof(*uart), GFP_KERNEL);
1268 if (!uart) {
1269 dev_err(&pdev->dev,
1270 "fail to malloc bfin_serial_port\n");
1271 return -ENOMEM;
1272 }
1273 bfin_serial_ports[pdev->id] = uart;
1274
1275 #ifdef CONFIG_EARLY_PRINTK
1276 if (!(bfin_earlyprintk_port.port.membase
1277 && bfin_earlyprintk_port.port.line == pdev->id)) {
1278 /*
1279 * If the peripheral PINs of current port is allocated
1280 * in earlyprintk probe stage, don't do it again.
1281 */
1282 #endif
1283 ret = peripheral_request_list(
1284 (unsigned short *)pdev->dev.platform_data, DRIVER_NAME);
1285 if (ret) {
1286 dev_err(&pdev->dev,
1287 "fail to request bfin serial peripherals\n");
1288 goto out_error_free_mem;
1289 }
1290 #ifdef CONFIG_EARLY_PRINTK
1291 }
1292 #endif
1293
1294 spin_lock_init(&uart->port.lock);
1295 uart->port.uartclk = get_sclk();
1296 uart->port.fifosize = BFIN_UART_TX_FIFO_SIZE;
1297 uart->port.ops = &bfin_serial_pops;
1298 uart->port.line = pdev->id;
1299 uart->port.iotype = UPIO_MEM;
1300 uart->port.flags = UPF_BOOT_AUTOCONF;
1301
1302 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1303 if (res == NULL) {
1304 dev_err(&pdev->dev, "Cannot get IORESOURCE_MEM\n");
1305 ret = -ENOENT;
1306 goto out_error_free_peripherals;
1307 }
1308
1309 uart->port.membase = ioremap(res->start, resource_size(res));
1310 if (!uart->port.membase) {
1311 dev_err(&pdev->dev, "Cannot map uart IO\n");
1312 ret = -ENXIO;
1313 goto out_error_free_peripherals;
1314 }
1315 uart->port.mapbase = res->start;
1316
1317 uart->tx_irq = platform_get_irq(pdev, 0);
1318 if (uart->tx_irq < 0) {
1319 dev_err(&pdev->dev, "No uart TX IRQ specified\n");
1320 ret = -ENOENT;
1321 goto out_error_unmap;
1322 }
1323
1324 uart->rx_irq = platform_get_irq(pdev, 1);
1325 if (uart->rx_irq < 0) {
1326 dev_err(&pdev->dev, "No uart RX IRQ specified\n");
1327 ret = -ENOENT;
1328 goto out_error_unmap;
1329 }
1330 uart->port.irq = uart->rx_irq;
1331
1332 uart->status_irq = platform_get_irq(pdev, 2);
1333 if (uart->status_irq < 0) {
1334 dev_err(&pdev->dev, "No uart status IRQ specified\n");
1335 ret = -ENOENT;
1336 goto out_error_unmap;
1337 }
1338
1339 #ifdef CONFIG_SERIAL_BFIN_DMA
1340 spin_lock_init(&uart->rx_lock);
1341 uart->tx_done = 1;
1342 uart->tx_count = 0;
1343
1344 res = platform_get_resource(pdev, IORESOURCE_DMA, 0);
1345 if (res == NULL) {
1346 dev_err(&pdev->dev, "No uart TX DMA channel specified\n");
1347 ret = -ENOENT;
1348 goto out_error_unmap;
1349 }
1350 uart->tx_dma_channel = res->start;
1351
1352 res = platform_get_resource(pdev, IORESOURCE_DMA, 1);
1353 if (res == NULL) {
1354 dev_err(&pdev->dev, "No uart RX DMA channel specified\n");
1355 ret = -ENOENT;
1356 goto out_error_unmap;
1357 }
1358 uart->rx_dma_channel = res->start;
1359
1360 init_timer(&(uart->rx_dma_timer));
1361 #endif
1362
1363 #if defined(CONFIG_SERIAL_BFIN_CTSRTS) || \
1364 defined(CONFIG_SERIAL_BFIN_HARD_CTSRTS)
1365 res = platform_get_resource(pdev, IORESOURCE_IO, 0);
1366 if (res == NULL)
1367 uart->cts_pin = -1;
1368 else {
1369 uart->cts_pin = res->start;
1370 #ifdef CONFIG_SERIAL_BFIN_CTSRTS
1371 uart->port.flags |= ASYNC_CTS_FLOW;
1372 #endif
1373 }
1374
1375 res = platform_get_resource(pdev, IORESOURCE_IO, 1);
1376 if (res == NULL)
1377 uart->rts_pin = -1;
1378 else
1379 uart->rts_pin = res->start;
1380 #endif
1381 }
1382
1383 #ifdef CONFIG_SERIAL_BFIN_CONSOLE
1384 if (!is_early_platform_device(pdev)) {
1385 #endif
1386 uart = bfin_serial_ports[pdev->id];
1387 uart->port.dev = &pdev->dev;
1388 dev_set_drvdata(&pdev->dev, uart);
1389 ret = uart_add_one_port(&bfin_serial_reg, &uart->port);
1390 #ifdef CONFIG_SERIAL_BFIN_CONSOLE
1391 }
1392 #endif
1393
1394 if (!ret)
1395 return 0;
1396
1397 if (uart) {
1398 out_error_unmap:
1399 iounmap(uart->port.membase);
1400 out_error_free_peripherals:
1401 peripheral_free_list(
1402 (unsigned short *)pdev->dev.platform_data);
1403 out_error_free_mem:
1404 kfree(uart);
1405 bfin_serial_ports[pdev->id] = NULL;
1406 }
1407
1408 return ret;
1409 }
1410
1411 static int __devexit bfin_serial_remove(struct platform_device *pdev)
1412 {
1413 struct bfin_serial_port *uart = platform_get_drvdata(pdev);
1414
1415 dev_set_drvdata(&pdev->dev, NULL);
1416
1417 if (uart) {
1418 uart_remove_one_port(&bfin_serial_reg, &uart->port);
1419 iounmap(uart->port.membase);
1420 peripheral_free_list(
1421 (unsigned short *)pdev->dev.platform_data);
1422 kfree(uart);
1423 bfin_serial_ports[pdev->id] = NULL;
1424 }
1425
1426 return 0;
1427 }
1428
1429 static struct platform_driver bfin_serial_driver = {
1430 .probe = bfin_serial_probe,
1431 .remove = __devexit_p(bfin_serial_remove),
1432 .suspend = bfin_serial_suspend,
1433 .resume = bfin_serial_resume,
1434 .driver = {
1435 .name = DRIVER_NAME,
1436 .owner = THIS_MODULE,
1437 },
1438 };
1439
1440 #if defined(CONFIG_SERIAL_BFIN_CONSOLE)
1441 static __initdata struct early_platform_driver early_bfin_serial_driver = {
1442 .class_str = CLASS_BFIN_CONSOLE,
1443 .pdrv = &bfin_serial_driver,
1444 .requested_id = EARLY_PLATFORM_ID_UNSET,
1445 };
1446
1447 static int __init bfin_serial_rs_console_init(void)
1448 {
1449 early_platform_driver_register(&early_bfin_serial_driver, DRIVER_NAME);
1450
1451 early_platform_driver_probe(CLASS_BFIN_CONSOLE, BFIN_UART_NR_PORTS, 0);
1452
1453 register_console(&bfin_serial_console);
1454
1455 return 0;
1456 }
1457 console_initcall(bfin_serial_rs_console_init);
1458 #endif
1459
1460 #ifdef CONFIG_EARLY_PRINTK
1461 /*
1462 * Memory can't be allocated dynamically during earlyprink init stage.
1463 * So, do individual probe for earlyprink with a static uart port variable.
1464 */
1465 static int bfin_earlyprintk_probe(struct platform_device *pdev)
1466 {
1467 struct resource *res;
1468 int ret;
1469
1470 if (pdev->id < 0 || pdev->id >= BFIN_UART_NR_PORTS) {
1471 dev_err(&pdev->dev, "Wrong earlyprintk platform device id.\n");
1472 return -ENOENT;
1473 }
1474
1475 ret = peripheral_request_list(
1476 (unsigned short *)pdev->dev.platform_data, DRIVER_NAME);
1477 if (ret) {
1478 dev_err(&pdev->dev,
1479 "fail to request bfin serial peripherals\n");
1480 return ret;
1481 }
1482
1483 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1484 if (res == NULL) {
1485 dev_err(&pdev->dev, "Cannot get IORESOURCE_MEM\n");
1486 ret = -ENOENT;
1487 goto out_error_free_peripherals;
1488 }
1489
1490 bfin_earlyprintk_port.port.membase = ioremap(res->start,
1491 resource_size(res));
1492 if (!bfin_earlyprintk_port.port.membase) {
1493 dev_err(&pdev->dev, "Cannot map uart IO\n");
1494 ret = -ENXIO;
1495 goto out_error_free_peripherals;
1496 }
1497 bfin_earlyprintk_port.port.mapbase = res->start;
1498 bfin_earlyprintk_port.port.line = pdev->id;
1499 bfin_earlyprintk_port.port.uartclk = get_sclk();
1500 bfin_earlyprintk_port.port.fifosize = BFIN_UART_TX_FIFO_SIZE;
1501 spin_lock_init(&bfin_earlyprintk_port.port.lock);
1502
1503 return 0;
1504
1505 out_error_free_peripherals:
1506 peripheral_free_list(
1507 (unsigned short *)pdev->dev.platform_data);
1508
1509 return ret;
1510 }
1511
1512 static struct platform_driver bfin_earlyprintk_driver = {
1513 .probe = bfin_earlyprintk_probe,
1514 .driver = {
1515 .name = DRIVER_NAME,
1516 .owner = THIS_MODULE,
1517 },
1518 };
1519
1520 static __initdata struct early_platform_driver early_bfin_earlyprintk_driver = {
1521 .class_str = CLASS_BFIN_EARLYPRINTK,
1522 .pdrv = &bfin_earlyprintk_driver,
1523 .requested_id = EARLY_PLATFORM_ID_UNSET,
1524 };
1525
1526 struct console __init *bfin_earlyserial_init(unsigned int port,
1527 unsigned int cflag)
1528 {
1529 struct ktermios t;
1530 char port_name[20];
1531
1532 if (port < 0 || port >= BFIN_UART_NR_PORTS)
1533 return NULL;
1534
1535 /*
1536 * Only probe resource of the given port in earlyprintk boot arg.
1537 * The expected port id should be indicated in port name string.
1538 */
1539 snprintf(port_name, 20, DRIVER_NAME ".%d", port);
1540 early_platform_driver_register(&early_bfin_earlyprintk_driver,
1541 port_name);
1542 early_platform_driver_probe(CLASS_BFIN_EARLYPRINTK, 1, 0);
1543
1544 if (!bfin_earlyprintk_port.port.membase)
1545 return NULL;
1546
1547 #ifdef CONFIG_SERIAL_BFIN_CONSOLE
1548 /*
1549 * If we are using early serial, don't let the normal console rewind
1550 * log buffer, since that causes things to be printed multiple times
1551 */
1552 bfin_serial_console.flags &= ~CON_PRINTBUFFER;
1553 #endif
1554
1555 bfin_early_serial_console.index = port;
1556 t.c_cflag = cflag;
1557 t.c_iflag = 0;
1558 t.c_oflag = 0;
1559 t.c_lflag = ICANON;
1560 t.c_line = port;
1561 bfin_serial_set_termios(&bfin_earlyprintk_port.port, &t, &t);
1562
1563 return &bfin_early_serial_console;
1564 }
1565 #endif /* CONFIG_EARLY_PRINTK */
1566
1567 static int __init bfin_serial_init(void)
1568 {
1569 int ret;
1570
1571 pr_info("Blackfin serial driver\n");
1572
1573 ret = uart_register_driver(&bfin_serial_reg);
1574 if (ret) {
1575 pr_err("failed to register %s:%d\n",
1576 bfin_serial_reg.driver_name, ret);
1577 }
1578
1579 ret = platform_driver_register(&bfin_serial_driver);
1580 if (ret) {
1581 pr_err("fail to register bfin uart\n");
1582 uart_unregister_driver(&bfin_serial_reg);
1583 }
1584
1585 return ret;
1586 }
1587
1588 static void __exit bfin_serial_exit(void)
1589 {
1590 platform_driver_unregister(&bfin_serial_driver);
1591 uart_unregister_driver(&bfin_serial_reg);
1592 }
1593
1594
1595 module_init(bfin_serial_init);
1596 module_exit(bfin_serial_exit);
1597
1598 MODULE_AUTHOR("Sonic Zhang, Aubrey Li");
1599 MODULE_DESCRIPTION("Blackfin generic serial port driver");
1600 MODULE_LICENSE("GPL");
1601 MODULE_ALIAS_CHARDEV_MAJOR(BFIN_SERIAL_MAJOR);
1602 MODULE_ALIAS("platform:bfin-uart");