4 * Driver for M32R serial ports
6 * Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
7 * Based on drivers/serial/8250.c.
9 * Copyright (C) 2001 Russell King.
10 * Copyright (C) 2004 Hirokazu Takata <takata at linux-m32r.org>
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2 of the License, or
15 * (at your option) any later version.
19 * A note about mapbase / membase
21 * mapbase is the physical address of the IO port. Currently, we don't
22 * support this very well, and it may well be dropped from this driver
23 * in future. As such, mapbase should be NULL.
25 * membase is an 'ioremapped' cookie. This is compatible with the old
26 * serial.c driver, and is currently the preferred form.
29 #if defined(CONFIG_SERIAL_M32R_SIO_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
33 #include <linux/module.h>
34 #include <linux/tty.h>
35 #include <linux/tty_flip.h>
36 #include <linux/ioport.h>
37 #include <linux/init.h>
38 #include <linux/console.h>
39 #include <linux/sysrq.h>
40 #include <linux/serial.h>
41 #include <linux/serialP.h>
42 #include <linux/delay.h>
48 #define PORT_M32R_BASE PORT_M32R_SIO
49 #define PORT_INDEX(x) (x - PORT_M32R_BASE + 1)
50 #define BAUD_RATE 115200
52 #include <linux/serial_core.h>
54 #include "m32r_sio_reg.h"
60 #define DEBUG_AUTOCONF(fmt...) printk(fmt)
62 #define DEBUG_AUTOCONF(fmt...) do { } while (0)
66 #define DEBUG_INTR(fmt...) printk(fmt)
68 #define DEBUG_INTR(fmt...) do { } while (0)
71 #define PASS_LIMIT 256
74 * We default to IRQ0 for the "no irq" hack. Some
75 * machine types want others as well - they're free
76 * to redefine this in their header file.
78 #define is_real_interrupt(irq) ((irq) != 0)
80 #define BASE_BAUD 115200
82 /* Standard COM flags */
83 #define STD_COM_FLAGS (UPF_BOOT_AUTOCONF | UPF_SKIP_TEST)
86 * SERIAL_PORT_DFNS tells us about built-in ports that have no
87 * standard enumeration mechanism. Platforms that can find all
88 * serial ports via mechanisms like ACPI or PCI need not supply it.
90 #if defined(CONFIG_PLAT_USRV)
92 #define SERIAL_PORT_DFNS \
93 /* UART CLK PORT IRQ FLAGS */ \
94 { 0, BASE_BAUD, 0x3F8, PLD_IRQ_UART0, STD_COM_FLAGS }, /* ttyS0 */ \
95 { 0, BASE_BAUD, 0x2F8, PLD_IRQ_UART1, STD_COM_FLAGS }, /* ttyS1 */
97 #else /* !CONFIG_PLAT_USRV */
99 #if defined(CONFIG_SERIAL_M32R_PLDSIO)
100 #define SERIAL_PORT_DFNS \
101 { 0, BASE_BAUD, ((unsigned long)PLD_ESIO0CR), PLD_IRQ_SIO0_RCV, \
102 STD_COM_FLAGS }, /* ttyS0 */
104 #define SERIAL_PORT_DFNS \
105 { 0, BASE_BAUD, M32R_SIO_OFFSET, M32R_IRQ_SIO0_R, \
106 STD_COM_FLAGS }, /* ttyS0 */
109 #endif /* !CONFIG_PLAT_USRV */
111 static struct old_serial_port old_serial_port
[] = {
115 #define UART_NR ARRAY_SIZE(old_serial_port)
117 struct uart_sio_port
{
118 struct uart_port port
;
119 struct timer_list timer
; /* "no irq" timer */
120 struct list_head list
; /* ports on this IRQ */
125 unsigned char mcr_mask
; /* mask of user bits */
126 unsigned char mcr_force
; /* mask of forced bits */
127 unsigned char lsr_break_flag
;
130 * We provide a per-port pm hook.
132 void (*pm
)(struct uart_port
*port
,
133 unsigned int state
, unsigned int old
);
138 struct list_head
*head
;
141 static struct irq_info irq_lists
[NR_IRQS
];
144 * Here we define the default xmit fifo size used for each type of UART.
146 static const struct serial_uart_config uart_config
[] = {
149 .dfl_xmit_fifo_size
= 1,
152 [PORT_INDEX(PORT_M32R_SIO
)] = {
154 .dfl_xmit_fifo_size
= 1,
159 #ifdef CONFIG_SERIAL_M32R_PLDSIO
161 #define __sio_in(x) inw((unsigned long)(x))
162 #define __sio_out(v,x) outw((v),(unsigned long)(x))
164 static inline void sio_set_baud_rate(unsigned long baud
)
166 unsigned short sbaud
;
167 sbaud
= (boot_cpu_data
.bus_clock
/ (baud
* 4))-1;
168 __sio_out(sbaud
, PLD_ESIO0BAUR
);
171 static void sio_reset(void)
175 tmp
= __sio_in(PLD_ESIO0RXB
);
176 tmp
= __sio_in(PLD_ESIO0RXB
);
177 tmp
= __sio_in(PLD_ESIO0CR
);
178 sio_set_baud_rate(BAUD_RATE
);
179 __sio_out(0x0300, PLD_ESIO0CR
);
180 __sio_out(0x0003, PLD_ESIO0CR
);
183 static void sio_init(void)
187 tmp
= __sio_in(PLD_ESIO0RXB
);
188 tmp
= __sio_in(PLD_ESIO0RXB
);
189 tmp
= __sio_in(PLD_ESIO0CR
);
190 __sio_out(0x0300, PLD_ESIO0CR
);
191 __sio_out(0x0003, PLD_ESIO0CR
);
194 static void sio_error(int *status
)
196 printk("SIO0 error[%04x]\n", *status
);
199 } while ((*status
= __sio_in(PLD_ESIO0CR
)) != 3);
202 #else /* not CONFIG_SERIAL_M32R_PLDSIO */
204 #define __sio_in(x) inl(x)
205 #define __sio_out(v,x) outl((v),(x))
207 static inline void sio_set_baud_rate(unsigned long baud
)
211 i
= boot_cpu_data
.bus_clock
/ (baud
* 16);
212 j
= (boot_cpu_data
.bus_clock
- (i
* baud
* 16)) / baud
;
216 __sio_out(i
, M32R_SIO0_BAUR_PORTL
);
217 __sio_out(j
, M32R_SIO0_RBAUR_PORTL
);
220 static void sio_reset(void)
222 __sio_out(0x00000300, M32R_SIO0_CR_PORTL
); /* init status */
223 __sio_out(0x00000800, M32R_SIO0_MOD1_PORTL
); /* 8bit */
224 __sio_out(0x00000080, M32R_SIO0_MOD0_PORTL
); /* 1stop non */
225 sio_set_baud_rate(BAUD_RATE
);
226 __sio_out(0x00000000, M32R_SIO0_TRCR_PORTL
);
227 __sio_out(0x00000003, M32R_SIO0_CR_PORTL
); /* RXCEN */
230 static void sio_init(void)
234 tmp
= __sio_in(M32R_SIO0_RXB_PORTL
);
235 tmp
= __sio_in(M32R_SIO0_RXB_PORTL
);
236 tmp
= __sio_in(M32R_SIO0_STS_PORTL
);
237 __sio_out(0x00000003, M32R_SIO0_CR_PORTL
);
240 static void sio_error(int *status
)
242 printk("SIO0 error[%04x]\n", *status
);
245 } while ((*status
= __sio_in(M32R_SIO0_CR_PORTL
)) != 3);
248 #endif /* CONFIG_SERIAL_M32R_PLDSIO */
250 static unsigned int sio_in(struct uart_sio_port
*up
, int offset
)
252 return __sio_in(up
->port
.iobase
+ offset
);
255 static void sio_out(struct uart_sio_port
*up
, int offset
, int value
)
257 __sio_out(value
, up
->port
.iobase
+ offset
);
260 static unsigned int serial_in(struct uart_sio_port
*up
, int offset
)
265 return __sio_in(offset
);
268 static void serial_out(struct uart_sio_port
*up
, int offset
, int value
)
273 __sio_out(value
, offset
);
276 static void m32r_sio_stop_tx(struct uart_port
*port
)
278 struct uart_sio_port
*up
= (struct uart_sio_port
*)port
;
280 if (up
->ier
& UART_IER_THRI
) {
281 up
->ier
&= ~UART_IER_THRI
;
282 serial_out(up
, UART_IER
, up
->ier
);
286 static void m32r_sio_start_tx(struct uart_port
*port
)
288 #ifdef CONFIG_SERIAL_M32R_PLDSIO
289 struct uart_sio_port
*up
= (struct uart_sio_port
*)port
;
290 struct circ_buf
*xmit
= &up
->port
.state
->xmit
;
292 if (!(up
->ier
& UART_IER_THRI
)) {
293 up
->ier
|= UART_IER_THRI
;
294 serial_out(up
, UART_IER
, up
->ier
);
295 serial_out(up
, UART_TX
, xmit
->buf
[xmit
->tail
]);
296 xmit
->tail
= (xmit
->tail
+ 1) & (UART_XMIT_SIZE
- 1);
297 up
->port
.icount
.tx
++;
299 while((serial_in(up
, UART_LSR
) & UART_EMPTY
) != UART_EMPTY
);
301 struct uart_sio_port
*up
= (struct uart_sio_port
*)port
;
303 if (!(up
->ier
& UART_IER_THRI
)) {
304 up
->ier
|= UART_IER_THRI
;
305 serial_out(up
, UART_IER
, up
->ier
);
310 static void m32r_sio_stop_rx(struct uart_port
*port
)
312 struct uart_sio_port
*up
= (struct uart_sio_port
*)port
;
314 up
->ier
&= ~UART_IER_RLSI
;
315 up
->port
.read_status_mask
&= ~UART_LSR_DR
;
316 serial_out(up
, UART_IER
, up
->ier
);
319 static void m32r_sio_enable_ms(struct uart_port
*port
)
321 struct uart_sio_port
*up
= (struct uart_sio_port
*)port
;
323 up
->ier
|= UART_IER_MSI
;
324 serial_out(up
, UART_IER
, up
->ier
);
327 static void receive_chars(struct uart_sio_port
*up
, int *status
)
329 struct tty_struct
*tty
= up
->port
.state
->port
.tty
;
335 ch
= sio_in(up
, SIORXB
);
337 up
->port
.icount
.rx
++;
339 if (unlikely(*status
& (UART_LSR_BI
| UART_LSR_PE
|
340 UART_LSR_FE
| UART_LSR_OE
))) {
342 * For statistics only
344 if (*status
& UART_LSR_BI
) {
345 *status
&= ~(UART_LSR_FE
| UART_LSR_PE
);
346 up
->port
.icount
.brk
++;
348 * We do the SysRQ and SAK checking
349 * here because otherwise the break
350 * may get masked by ignore_status_mask
351 * or read_status_mask.
353 if (uart_handle_break(&up
->port
))
355 } else if (*status
& UART_LSR_PE
)
356 up
->port
.icount
.parity
++;
357 else if (*status
& UART_LSR_FE
)
358 up
->port
.icount
.frame
++;
359 if (*status
& UART_LSR_OE
)
360 up
->port
.icount
.overrun
++;
363 * Mask off conditions which should be ingored.
365 *status
&= up
->port
.read_status_mask
;
367 if (up
->port
.line
== up
->port
.cons
->index
) {
368 /* Recover the break flag from console xmit */
369 *status
|= up
->lsr_break_flag
;
370 up
->lsr_break_flag
= 0;
373 if (*status
& UART_LSR_BI
) {
374 DEBUG_INTR("handling break....");
376 } else if (*status
& UART_LSR_PE
)
378 else if (*status
& UART_LSR_FE
)
381 if (uart_handle_sysrq_char(&up
->port
, ch
))
383 if ((*status
& up
->port
.ignore_status_mask
) == 0)
384 tty_insert_flip_char(tty
, ch
, flag
);
386 if (*status
& UART_LSR_OE
) {
388 * Overrun is special, since it's reported
389 * immediately, and doesn't affect the current
392 tty_insert_flip_char(tty
, 0, TTY_OVERRUN
);
395 *status
= serial_in(up
, UART_LSR
);
396 } while ((*status
& UART_LSR_DR
) && (max_count
-- > 0));
397 tty_flip_buffer_push(tty
);
400 static void transmit_chars(struct uart_sio_port
*up
)
402 struct circ_buf
*xmit
= &up
->port
.state
->xmit
;
405 if (up
->port
.x_char
) {
406 #ifndef CONFIG_SERIAL_M32R_PLDSIO /* XXX */
407 serial_out(up
, UART_TX
, up
->port
.x_char
);
409 up
->port
.icount
.tx
++;
413 if (uart_circ_empty(xmit
) || uart_tx_stopped(&up
->port
)) {
414 m32r_sio_stop_tx(&up
->port
);
418 count
= up
->port
.fifosize
;
420 serial_out(up
, UART_TX
, xmit
->buf
[xmit
->tail
]);
421 xmit
->tail
= (xmit
->tail
+ 1) & (UART_XMIT_SIZE
- 1);
422 up
->port
.icount
.tx
++;
423 if (uart_circ_empty(xmit
))
425 while (!(serial_in(up
, UART_LSR
) & UART_LSR_THRE
));
427 } while (--count
> 0);
429 if (uart_circ_chars_pending(xmit
) < WAKEUP_CHARS
)
430 uart_write_wakeup(&up
->port
);
432 DEBUG_INTR("THRE...");
434 if (uart_circ_empty(xmit
))
435 m32r_sio_stop_tx(&up
->port
);
439 * This handles the interrupt from one port.
441 static inline void m32r_sio_handle_port(struct uart_sio_port
*up
,
444 DEBUG_INTR("status = %x...", status
);
447 receive_chars(up
, &status
);
453 * This is the serial driver's interrupt routine.
455 * Arjan thinks the old way was overly complex, so it got simplified.
456 * Alan disagrees, saying that need the complexity to handle the weird
457 * nature of ISA shared interrupts. (This is a special exception.)
459 * In order to handle ISA shared interrupts properly, we need to check
460 * that all ports have been serviced, and therefore the ISA interrupt
461 * line has been de-asserted.
463 * This means we need to loop through all ports. checking that they
464 * don't have an interrupt pending.
466 static irqreturn_t
m32r_sio_interrupt(int irq
, void *dev_id
)
468 struct irq_info
*i
= dev_id
;
469 struct list_head
*l
, *end
= NULL
;
470 int pass_counter
= 0;
472 DEBUG_INTR("m32r_sio_interrupt(%d)...", irq
);
474 #ifdef CONFIG_SERIAL_M32R_PLDSIO
475 // if (irq == PLD_IRQ_SIO0_SND)
476 // irq = PLD_IRQ_SIO0_RCV;
478 if (irq
== M32R_IRQ_SIO0_S
)
479 irq
= M32R_IRQ_SIO0_R
;
486 struct uart_sio_port
*up
;
489 up
= list_entry(l
, struct uart_sio_port
, list
);
491 sts
= sio_in(up
, SIOSTS
);
493 spin_lock(&up
->port
.lock
);
494 m32r_sio_handle_port(up
, sts
);
495 spin_unlock(&up
->port
.lock
);
498 } else if (end
== NULL
)
503 if (l
== i
->head
&& pass_counter
++ > PASS_LIMIT
) {
510 spin_unlock(&i
->lock
);
512 DEBUG_INTR("end.\n");
518 * To support ISA shared interrupts, we need to have one interrupt
519 * handler that ensures that the IRQ line has been deasserted
520 * before returning. Failing to do this will result in the IRQ
521 * line being stuck active, and, since ISA irqs are edge triggered,
522 * no more IRQs will be seen.
524 static void serial_do_unlink(struct irq_info
*i
, struct uart_sio_port
*up
)
526 spin_lock_irq(&i
->lock
);
528 if (!list_empty(i
->head
)) {
529 if (i
->head
== &up
->list
)
530 i
->head
= i
->head
->next
;
533 BUG_ON(i
->head
!= &up
->list
);
537 spin_unlock_irq(&i
->lock
);
540 static int serial_link_irq_chain(struct uart_sio_port
*up
)
542 struct irq_info
*i
= irq_lists
+ up
->port
.irq
;
543 int ret
, irq_flags
= 0;
545 spin_lock_irq(&i
->lock
);
548 list_add(&up
->list
, i
->head
);
549 spin_unlock_irq(&i
->lock
);
553 INIT_LIST_HEAD(&up
->list
);
555 spin_unlock_irq(&i
->lock
);
557 ret
= request_irq(up
->port
.irq
, m32r_sio_interrupt
,
558 irq_flags
, "SIO0-RX", i
);
559 ret
|= request_irq(up
->port
.irq
+ 1, m32r_sio_interrupt
,
560 irq_flags
, "SIO0-TX", i
);
562 serial_do_unlink(i
, up
);
568 static void serial_unlink_irq_chain(struct uart_sio_port
*up
)
570 struct irq_info
*i
= irq_lists
+ up
->port
.irq
;
572 BUG_ON(i
->head
== NULL
);
574 if (list_empty(i
->head
)) {
575 free_irq(up
->port
.irq
, i
);
576 free_irq(up
->port
.irq
+ 1, i
);
579 serial_do_unlink(i
, up
);
583 * This function is used to handle ports that do not have an interrupt.
585 static void m32r_sio_timeout(unsigned long data
)
587 struct uart_sio_port
*up
= (struct uart_sio_port
*)data
;
588 unsigned int timeout
;
591 sts
= sio_in(up
, SIOSTS
);
593 spin_lock(&up
->port
.lock
);
594 m32r_sio_handle_port(up
, sts
);
595 spin_unlock(&up
->port
.lock
);
598 timeout
= up
->port
.timeout
;
599 timeout
= timeout
> 6 ? (timeout
/ 2 - 2) : 1;
600 mod_timer(&up
->timer
, jiffies
+ timeout
);
603 static unsigned int m32r_sio_tx_empty(struct uart_port
*port
)
605 struct uart_sio_port
*up
= (struct uart_sio_port
*)port
;
609 spin_lock_irqsave(&up
->port
.lock
, flags
);
610 ret
= serial_in(up
, UART_LSR
) & UART_LSR_TEMT
? TIOCSER_TEMT
: 0;
611 spin_unlock_irqrestore(&up
->port
.lock
, flags
);
616 static unsigned int m32r_sio_get_mctrl(struct uart_port
*port
)
621 static void m32r_sio_set_mctrl(struct uart_port
*port
, unsigned int mctrl
)
626 static void m32r_sio_break_ctl(struct uart_port
*port
, int break_state
)
631 static int m32r_sio_startup(struct uart_port
*port
)
633 struct uart_sio_port
*up
= (struct uart_sio_port
*)port
;
639 * If the "interrupt" for this port doesn't correspond with any
640 * hardware interrupt, we use a timer-based system. The original
641 * driver used to do this with IRQ0.
643 if (!is_real_interrupt(up
->port
.irq
)) {
644 unsigned int timeout
= up
->port
.timeout
;
646 timeout
= timeout
> 6 ? (timeout
/ 2 - 2) : 1;
648 up
->timer
.data
= (unsigned long)up
;
649 mod_timer(&up
->timer
, jiffies
+ timeout
);
651 retval
= serial_link_irq_chain(up
);
657 * Finally, enable interrupts. Note: Modem status interrupts
658 * are set via set_termios(), which will be occurring imminently
659 * anyway, so we don't enable them here.
661 * - M32R_PLDSIO: 0x04
663 up
->ier
= UART_IER_MSI
| UART_IER_RLSI
| UART_IER_RDI
;
664 sio_out(up
, SIOTRCR
, up
->ier
);
667 * And clear the interrupt registers again for luck.
674 static void m32r_sio_shutdown(struct uart_port
*port
)
676 struct uart_sio_port
*up
= (struct uart_sio_port
*)port
;
679 * Disable interrupts from this port
682 sio_out(up
, SIOTRCR
, 0);
685 * Disable break condition and FIFOs
690 if (!is_real_interrupt(up
->port
.irq
))
691 del_timer_sync(&up
->timer
);
693 serial_unlink_irq_chain(up
);
696 static unsigned int m32r_sio_get_divisor(struct uart_port
*port
,
699 return uart_get_divisor(port
, baud
);
702 static void m32r_sio_set_termios(struct uart_port
*port
,
703 struct ktermios
*termios
, struct ktermios
*old
)
705 struct uart_sio_port
*up
= (struct uart_sio_port
*)port
;
706 unsigned char cval
= 0;
708 unsigned int baud
, quot
;
710 switch (termios
->c_cflag
& CSIZE
) {
712 cval
= UART_LCR_WLEN5
;
715 cval
= UART_LCR_WLEN6
;
718 cval
= UART_LCR_WLEN7
;
722 cval
= UART_LCR_WLEN8
;
726 if (termios
->c_cflag
& CSTOPB
)
727 cval
|= UART_LCR_STOP
;
728 if (termios
->c_cflag
& PARENB
)
729 cval
|= UART_LCR_PARITY
;
730 if (!(termios
->c_cflag
& PARODD
))
731 cval
|= UART_LCR_EPAR
;
733 if (termios
->c_cflag
& CMSPAR
)
734 cval
|= UART_LCR_SPAR
;
738 * Ask the core to calculate the divisor for us.
740 #ifdef CONFIG_SERIAL_M32R_PLDSIO
741 baud
= uart_get_baud_rate(port
, termios
, old
, 0, port
->uartclk
/4);
743 baud
= uart_get_baud_rate(port
, termios
, old
, 0, port
->uartclk
/16);
745 quot
= m32r_sio_get_divisor(port
, baud
);
748 * Ok, we're now changing the port state. Do it with
749 * interrupts disabled.
751 spin_lock_irqsave(&up
->port
.lock
, flags
);
753 sio_set_baud_rate(baud
);
756 * Update the per-port timeout.
758 uart_update_timeout(port
, termios
->c_cflag
, baud
);
760 up
->port
.read_status_mask
= UART_LSR_OE
| UART_LSR_THRE
| UART_LSR_DR
;
761 if (termios
->c_iflag
& INPCK
)
762 up
->port
.read_status_mask
|= UART_LSR_FE
| UART_LSR_PE
;
763 if (termios
->c_iflag
& (BRKINT
| PARMRK
))
764 up
->port
.read_status_mask
|= UART_LSR_BI
;
767 * Characteres to ignore
769 up
->port
.ignore_status_mask
= 0;
770 if (termios
->c_iflag
& IGNPAR
)
771 up
->port
.ignore_status_mask
|= UART_LSR_PE
| UART_LSR_FE
;
772 if (termios
->c_iflag
& IGNBRK
) {
773 up
->port
.ignore_status_mask
|= UART_LSR_BI
;
775 * If we're ignoring parity and break indicators,
776 * ignore overruns too (for real raw support).
778 if (termios
->c_iflag
& IGNPAR
)
779 up
->port
.ignore_status_mask
|= UART_LSR_OE
;
783 * ignore all characters if CREAD is not set
785 if ((termios
->c_cflag
& CREAD
) == 0)
786 up
->port
.ignore_status_mask
|= UART_LSR_DR
;
789 * CTS flow control flag and modem status interrupts
791 up
->ier
&= ~UART_IER_MSI
;
792 if (UART_ENABLE_MS(&up
->port
, termios
->c_cflag
))
793 up
->ier
|= UART_IER_MSI
;
795 serial_out(up
, UART_IER
, up
->ier
);
797 up
->lcr
= cval
; /* Save LCR */
798 spin_unlock_irqrestore(&up
->port
.lock
, flags
);
801 static void m32r_sio_pm(struct uart_port
*port
, unsigned int state
,
802 unsigned int oldstate
)
804 struct uart_sio_port
*up
= (struct uart_sio_port
*)port
;
807 up
->pm(port
, state
, oldstate
);
811 * Resource handling. This is complicated by the fact that resources
812 * depend on the port type. Maybe we should be claiming the standard
813 * 8250 ports, and then trying to get other resources as necessary?
816 m32r_sio_request_std_resource(struct uart_sio_port
*up
, struct resource
**res
)
818 unsigned int size
= 8 << up
->port
.regshift
;
819 #ifndef CONFIG_SERIAL_M32R_PLDSIO
824 switch (up
->port
.iotype
) {
826 if (up
->port
.mapbase
) {
827 #ifdef CONFIG_SERIAL_M32R_PLDSIO
828 *res
= request_mem_region(up
->port
.mapbase
, size
, "serial");
830 start
= up
->port
.mapbase
;
831 *res
= request_mem_region(start
, size
, "serial");
839 *res
= request_region(up
->port
.iobase
, size
, "serial");
847 static void m32r_sio_release_port(struct uart_port
*port
)
849 struct uart_sio_port
*up
= (struct uart_sio_port
*)port
;
850 unsigned long start
, offset
= 0, size
= 0;
852 size
<<= up
->port
.regshift
;
854 switch (up
->port
.iotype
) {
856 if (up
->port
.mapbase
) {
860 iounmap(up
->port
.membase
);
861 up
->port
.membase
= NULL
;
863 start
= up
->port
.mapbase
;
866 release_mem_region(start
+ offset
, size
);
867 release_mem_region(start
, 8 << up
->port
.regshift
);
872 start
= up
->port
.iobase
;
875 release_region(start
+ offset
, size
);
876 release_region(start
+ offset
, 8 << up
->port
.regshift
);
884 static int m32r_sio_request_port(struct uart_port
*port
)
886 struct uart_sio_port
*up
= (struct uart_sio_port
*)port
;
887 struct resource
*res
= NULL
;
890 ret
= m32r_sio_request_std_resource(up
, &res
);
893 * If we have a mapbase, then request that as well.
895 if (ret
== 0 && up
->port
.flags
& UPF_IOREMAP
) {
896 int size
= resource_size(res
);
898 up
->port
.membase
= ioremap(up
->port
.mapbase
, size
);
899 if (!up
->port
.membase
)
905 release_resource(res
);
911 static void m32r_sio_config_port(struct uart_port
*port
, int unused
)
913 struct uart_sio_port
*up
= (struct uart_sio_port
*)port
;
916 spin_lock_irqsave(&up
->port
.lock
, flags
);
918 up
->port
.type
= (PORT_M32R_SIO
- PORT_M32R_BASE
+ 1);
919 up
->port
.fifosize
= uart_config
[up
->port
.type
].dfl_xmit_fifo_size
;
921 spin_unlock_irqrestore(&up
->port
.lock
, flags
);
925 m32r_sio_verify_port(struct uart_port
*port
, struct serial_struct
*ser
)
927 if (ser
->irq
>= nr_irqs
|| ser
->irq
< 0 ||
928 ser
->baud_base
< 9600 || ser
->type
< PORT_UNKNOWN
||
929 ser
->type
>= ARRAY_SIZE(uart_config
))
935 m32r_sio_type(struct uart_port
*port
)
937 int type
= port
->type
;
939 if (type
>= ARRAY_SIZE(uart_config
))
941 return uart_config
[type
].name
;
944 static struct uart_ops m32r_sio_pops
= {
945 .tx_empty
= m32r_sio_tx_empty
,
946 .set_mctrl
= m32r_sio_set_mctrl
,
947 .get_mctrl
= m32r_sio_get_mctrl
,
948 .stop_tx
= m32r_sio_stop_tx
,
949 .start_tx
= m32r_sio_start_tx
,
950 .stop_rx
= m32r_sio_stop_rx
,
951 .enable_ms
= m32r_sio_enable_ms
,
952 .break_ctl
= m32r_sio_break_ctl
,
953 .startup
= m32r_sio_startup
,
954 .shutdown
= m32r_sio_shutdown
,
955 .set_termios
= m32r_sio_set_termios
,
957 .type
= m32r_sio_type
,
958 .release_port
= m32r_sio_release_port
,
959 .request_port
= m32r_sio_request_port
,
960 .config_port
= m32r_sio_config_port
,
961 .verify_port
= m32r_sio_verify_port
,
964 static struct uart_sio_port m32r_sio_ports
[UART_NR
];
966 static void __init
m32r_sio_init_ports(void)
968 struct uart_sio_port
*up
;
969 static int first
= 1;
976 for (i
= 0, up
= m32r_sio_ports
; i
< ARRAY_SIZE(old_serial_port
);
978 up
->port
.iobase
= old_serial_port
[i
].port
;
979 up
->port
.irq
= irq_canonicalize(old_serial_port
[i
].irq
);
980 up
->port
.uartclk
= old_serial_port
[i
].baud_base
* 16;
981 up
->port
.flags
= old_serial_port
[i
].flags
;
982 up
->port
.membase
= old_serial_port
[i
].iomem_base
;
983 up
->port
.iotype
= old_serial_port
[i
].io_type
;
984 up
->port
.regshift
= old_serial_port
[i
].iomem_reg_shift
;
985 up
->port
.ops
= &m32r_sio_pops
;
989 static void __init
m32r_sio_register_ports(struct uart_driver
*drv
)
993 m32r_sio_init_ports();
995 for (i
= 0; i
< UART_NR
; i
++) {
996 struct uart_sio_port
*up
= &m32r_sio_ports
[i
];
999 up
->port
.ops
= &m32r_sio_pops
;
1000 init_timer(&up
->timer
);
1001 up
->timer
.function
= m32r_sio_timeout
;
1006 uart_add_one_port(drv
, &up
->port
);
1010 #ifdef CONFIG_SERIAL_M32R_SIO_CONSOLE
1013 * Wait for transmitter & holding register to empty
1015 static inline void wait_for_xmitr(struct uart_sio_port
*up
)
1017 unsigned int status
, tmout
= 10000;
1019 /* Wait up to 10ms for the character(s) to be sent. */
1021 status
= sio_in(up
, SIOSTS
);
1026 } while ((status
& UART_EMPTY
) != UART_EMPTY
);
1028 /* Wait up to 1s for flow control if necessary */
1029 if (up
->port
.flags
& UPF_CONS_FLOW
) {
1036 static void m32r_sio_console_putchar(struct uart_port
*port
, int ch
)
1038 struct uart_sio_port
*up
= (struct uart_sio_port
*)port
;
1041 sio_out(up
, SIOTXB
, ch
);
1045 * Print a string to the serial port trying not to disturb
1046 * any possible real use of the port...
1048 * The console_lock must be held when we get here.
1050 static void m32r_sio_console_write(struct console
*co
, const char *s
,
1053 struct uart_sio_port
*up
= &m32r_sio_ports
[co
->index
];
1057 * First save the UER then disable the interrupts
1059 ier
= sio_in(up
, SIOTRCR
);
1060 sio_out(up
, SIOTRCR
, 0);
1062 uart_console_write(&up
->port
, s
, count
, m32r_sio_console_putchar
);
1065 * Finally, wait for transmitter to become empty
1066 * and restore the IER
1069 sio_out(up
, SIOTRCR
, ier
);
1072 static int __init
m32r_sio_console_setup(struct console
*co
, char *options
)
1074 struct uart_port
*port
;
1081 * Check whether an invalid uart number has been specified, and
1082 * if so, search for the first available port that does have
1085 if (co
->index
>= UART_NR
)
1087 port
= &m32r_sio_ports
[co
->index
].port
;
1092 spin_lock_init(&port
->lock
);
1095 uart_parse_options(options
, &baud
, &parity
, &bits
, &flow
);
1097 return uart_set_options(port
, co
, baud
, parity
, bits
, flow
);
1100 static struct uart_driver m32r_sio_reg
;
1101 static struct console m32r_sio_console
= {
1103 .write
= m32r_sio_console_write
,
1104 .device
= uart_console_device
,
1105 .setup
= m32r_sio_console_setup
,
1106 .flags
= CON_PRINTBUFFER
,
1108 .data
= &m32r_sio_reg
,
1111 static int __init
m32r_sio_console_init(void)
1115 m32r_sio_init_ports();
1116 register_console(&m32r_sio_console
);
1119 console_initcall(m32r_sio_console_init
);
1121 #define M32R_SIO_CONSOLE &m32r_sio_console
1123 #define M32R_SIO_CONSOLE NULL
1126 static struct uart_driver m32r_sio_reg
= {
1127 .owner
= THIS_MODULE
,
1128 .driver_name
= "sio",
1133 .cons
= M32R_SIO_CONSOLE
,
1137 * m32r_sio_suspend_port - suspend one serial port
1138 * @line: serial line number
1140 * Suspend one serial port.
1142 void m32r_sio_suspend_port(int line
)
1144 uart_suspend_port(&m32r_sio_reg
, &m32r_sio_ports
[line
].port
);
1148 * m32r_sio_resume_port - resume one serial port
1149 * @line: serial line number
1151 * Resume one serial port.
1153 void m32r_sio_resume_port(int line
)
1155 uart_resume_port(&m32r_sio_reg
, &m32r_sio_ports
[line
].port
);
1158 static int __init
m32r_sio_init(void)
1162 printk(KERN_INFO
"Serial: M32R SIO driver\n");
1164 for (i
= 0; i
< nr_irqs
; i
++)
1165 spin_lock_init(&irq_lists
[i
].lock
);
1167 ret
= uart_register_driver(&m32r_sio_reg
);
1169 m32r_sio_register_ports(&m32r_sio_reg
);
1174 static void __exit
m32r_sio_exit(void)
1178 for (i
= 0; i
< UART_NR
; i
++)
1179 uart_remove_one_port(&m32r_sio_reg
, &m32r_sio_ports
[i
].port
);
1181 uart_unregister_driver(&m32r_sio_reg
);
1184 module_init(m32r_sio_init
);
1185 module_exit(m32r_sio_exit
);
1187 EXPORT_SYMBOL(m32r_sio_suspend_port
);
1188 EXPORT_SYMBOL(m32r_sio_resume_port
);
1190 MODULE_LICENSE("GPL");
1191 MODULE_DESCRIPTION("Generic M32R SIO serial driver");