2 * xHCI host controller driver
4 * Copyright (C) 2008 Intel Corp.
7 * Some code borrowed from the Linux EHCI driver.
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
15 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software Foundation,
20 * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
23 #include <linux/gfp.h>
24 #include <asm/unaligned.h>
28 #define PORT_WAKE_BITS (PORT_WKOC_E | PORT_WKDISC_E | PORT_WKCONN_E)
29 #define PORT_RWC_BITS (PORT_CSC | PORT_PEC | PORT_WRC | PORT_OCC | \
30 PORT_RC | PORT_PLC | PORT_PE)
32 /* usb 1.1 root hub device descriptor */
33 static u8 usb_bos_descriptor
[] = {
34 USB_DT_BOS_SIZE
, /* __u8 bLength, 5 bytes */
35 USB_DT_BOS
, /* __u8 bDescriptorType */
36 0x0F, 0x00, /* __le16 wTotalLength, 15 bytes */
37 0x1, /* __u8 bNumDeviceCaps */
38 /* First device capability */
39 USB_DT_USB_SS_CAP_SIZE
, /* __u8 bLength, 10 bytes */
40 USB_DT_DEVICE_CAPABILITY
, /* Device Capability */
41 USB_SS_CAP_TYPE
, /* bDevCapabilityType, SUPERSPEED_USB */
42 0x00, /* bmAttributes, LTM off by default */
43 USB_5GBPS_OPERATION
, 0x00, /* wSpeedsSupported, 5Gbps only */
44 0x03, /* bFunctionalitySupport,
46 0x00, /* bU1DevExitLat, set later. */
47 0x00, 0x00 /* __le16 bU2DevExitLat, set later. */
51 static void xhci_common_hub_descriptor(struct xhci_hcd
*xhci
,
52 struct usb_hub_descriptor
*desc
, int ports
)
56 desc
->bPwrOn2PwrGood
= 10; /* xhci section 5.4.9 says 20ms max */
57 desc
->bHubContrCurrent
= 0;
59 desc
->bNbrPorts
= ports
;
61 /* Bits 1:0 - support per-port power switching, or power always on */
62 if (HCC_PPC(xhci
->hcc_params
))
63 temp
|= HUB_CHAR_INDV_PORT_LPSM
;
65 temp
|= HUB_CHAR_NO_LPSM
;
66 /* Bit 2 - root hubs are not part of a compound device */
67 /* Bits 4:3 - individual port over current protection */
68 temp
|= HUB_CHAR_INDV_PORT_OCPM
;
69 /* Bits 6:5 - no TTs in root ports */
70 /* Bit 7 - no port indicators */
71 desc
->wHubCharacteristics
= cpu_to_le16(temp
);
74 /* Fill in the USB 2.0 roothub descriptor */
75 static void xhci_usb2_hub_descriptor(struct usb_hcd
*hcd
, struct xhci_hcd
*xhci
,
76 struct usb_hub_descriptor
*desc
)
80 __u8 port_removable
[(USB_MAXCHILDREN
+ 1 + 7) / 8];
84 ports
= xhci
->num_usb2_ports
;
86 xhci_common_hub_descriptor(xhci
, desc
, ports
);
87 desc
->bDescriptorType
= USB_DT_HUB
;
88 temp
= 1 + (ports
/ 8);
89 desc
->bDescLength
= USB_DT_HUB_NONVAR_SIZE
+ 2 * temp
;
91 /* The Device Removable bits are reported on a byte granularity.
92 * If the port doesn't exist within that byte, the bit is set to 0.
94 memset(port_removable
, 0, sizeof(port_removable
));
95 for (i
= 0; i
< ports
; i
++) {
96 portsc
= xhci_readl(xhci
, xhci
->usb2_ports
[i
]);
97 /* If a device is removable, PORTSC reports a 0, same as in the
98 * hub descriptor DeviceRemovable bits.
100 if (portsc
& PORT_DEV_REMOVE
)
101 /* This math is hairy because bit 0 of DeviceRemovable
102 * is reserved, and bit 1 is for port 1, etc.
104 port_removable
[(i
+ 1) / 8] |= 1 << ((i
+ 1) % 8);
107 /* ch11.h defines a hub descriptor that has room for USB_MAXCHILDREN
108 * ports on it. The USB 2.0 specification says that there are two
109 * variable length fields at the end of the hub descriptor:
110 * DeviceRemovable and PortPwrCtrlMask. But since we can have less than
111 * USB_MAXCHILDREN ports, we may need to use the DeviceRemovable array
112 * to set PortPwrCtrlMask bits. PortPwrCtrlMask must always be set to
113 * 0xFF, so we initialize the both arrays (DeviceRemovable and
114 * PortPwrCtrlMask) to 0xFF. Then we set the DeviceRemovable for each
115 * set of ports that actually exist.
117 memset(desc
->u
.hs
.DeviceRemovable
, 0xff,
118 sizeof(desc
->u
.hs
.DeviceRemovable
));
119 memset(desc
->u
.hs
.PortPwrCtrlMask
, 0xff,
120 sizeof(desc
->u
.hs
.PortPwrCtrlMask
));
122 for (i
= 0; i
< (ports
+ 1 + 7) / 8; i
++)
123 memset(&desc
->u
.hs
.DeviceRemovable
[i
], port_removable
[i
],
127 /* Fill in the USB 3.0 roothub descriptor */
128 static void xhci_usb3_hub_descriptor(struct usb_hcd
*hcd
, struct xhci_hcd
*xhci
,
129 struct usb_hub_descriptor
*desc
)
136 ports
= xhci
->num_usb3_ports
;
137 xhci_common_hub_descriptor(xhci
, desc
, ports
);
138 desc
->bDescriptorType
= USB_DT_SS_HUB
;
139 desc
->bDescLength
= USB_DT_SS_HUB_SIZE
;
141 /* header decode latency should be zero for roothubs,
142 * see section 4.23.5.2.
144 desc
->u
.ss
.bHubHdrDecLat
= 0;
145 desc
->u
.ss
.wHubDelay
= 0;
148 /* bit 0 is reserved, bit 1 is for port 1, etc. */
149 for (i
= 0; i
< ports
; i
++) {
150 portsc
= xhci_readl(xhci
, xhci
->usb3_ports
[i
]);
151 if (portsc
& PORT_DEV_REMOVE
)
152 port_removable
|= 1 << (i
+ 1);
154 memset(&desc
->u
.ss
.DeviceRemovable
,
155 (__force __u16
) cpu_to_le16(port_removable
),
159 static void xhci_hub_descriptor(struct usb_hcd
*hcd
, struct xhci_hcd
*xhci
,
160 struct usb_hub_descriptor
*desc
)
163 if (hcd
->speed
== HCD_USB3
)
164 xhci_usb3_hub_descriptor(hcd
, xhci
, desc
);
166 xhci_usb2_hub_descriptor(hcd
, xhci
, desc
);
170 static unsigned int xhci_port_speed(unsigned int port_status
)
172 if (DEV_LOWSPEED(port_status
))
173 return USB_PORT_STAT_LOW_SPEED
;
174 if (DEV_HIGHSPEED(port_status
))
175 return USB_PORT_STAT_HIGH_SPEED
;
177 * FIXME: Yes, we should check for full speed, but the core uses that as
178 * a default in portspeed() in usb/core/hub.c (which is the only place
179 * USB_PORT_STAT_*_SPEED is used).
185 * These bits are Read Only (RO) and should be saved and written to the
186 * registers: 0, 3, 10:13, 30
187 * connect status, over-current status, port speed, and device removable.
188 * connect status and port speed are also sticky - meaning they're in
189 * the AUX well and they aren't changed by a hot, warm, or cold reset.
191 #define XHCI_PORT_RO ((1<<0) | (1<<3) | (0xf<<10) | (1<<30))
193 * These bits are RW; writing a 0 clears the bit, writing a 1 sets the bit:
194 * bits 5:8, 9, 14:15, 25:27
195 * link state, port power, port indicator state, "wake on" enable state
197 #define XHCI_PORT_RWS ((0xf<<5) | (1<<9) | (0x3<<14) | (0x7<<25))
199 * These bits are RW; writing a 1 sets the bit, writing a 0 has no effect:
202 #define XHCI_PORT_RW1S ((1<<4))
204 * These bits are RW; writing a 1 clears the bit, writing a 0 has no effect:
205 * bits 1, 17, 18, 19, 20, 21, 22, 23
206 * port enable/disable, and
207 * change bits: connect, PED, warm port reset changed (reserved zero for USB 2.0 ports),
208 * over-current, reset, link state, and L1 change
210 #define XHCI_PORT_RW1CS ((1<<1) | (0x7f<<17))
212 * Bit 16 is RW, and writing a '1' to it causes the link state control to be
215 #define XHCI_PORT_RW ((1<<16))
217 * These bits are Reserved Zero (RsvdZ) and zero should be written to them:
220 #define XHCI_PORT_RZ ((1<<2) | (1<<24) | (0xf<<28))
223 * Given a port state, this function returns a value that would result in the
224 * port being in the same state, if the value was written to the port status
226 * Save Read Only (RO) bits and save read/write bits where
227 * writing a 0 clears the bit and writing a 1 sets the bit (RWS).
228 * For all other types (RW1S, RW1CS, RW, and RZ), writing a '0' has no effect.
230 u32
xhci_port_state_to_neutral(u32 state
)
232 /* Save read-only status and port state */
233 return (state
& XHCI_PORT_RO
) | (state
& XHCI_PORT_RWS
);
237 * find slot id based on port number.
238 * @port: The one-based port number from one of the two split roothubs.
240 int xhci_find_slot_id_by_port(struct usb_hcd
*hcd
, struct xhci_hcd
*xhci
,
245 enum usb_device_speed speed
;
248 for (i
= 0; i
< MAX_HC_SLOTS
; i
++) {
251 speed
= xhci
->devs
[i
]->udev
->speed
;
252 if (((speed
== USB_SPEED_SUPER
) == (hcd
->speed
== HCD_USB3
))
253 && xhci
->devs
[i
]->fake_port
== port
) {
264 * It issues stop endpoint command for EP 0 to 30. And wait the last command
266 * suspend will set to 1, if suspend bit need to set in command.
268 static int xhci_stop_device(struct xhci_hcd
*xhci
, int slot_id
, int suspend
)
270 struct xhci_virt_device
*virt_dev
;
271 struct xhci_command
*cmd
;
278 virt_dev
= xhci
->devs
[slot_id
];
279 cmd
= xhci_alloc_command(xhci
, false, true, GFP_NOIO
);
281 xhci_dbg(xhci
, "Couldn't allocate command structure.\n");
285 spin_lock_irqsave(&xhci
->lock
, flags
);
286 for (i
= LAST_EP_INDEX
; i
> 0; i
--) {
287 if (virt_dev
->eps
[i
].ring
&& virt_dev
->eps
[i
].ring
->dequeue
)
288 xhci_queue_stop_endpoint(xhci
, slot_id
, i
, suspend
);
290 cmd
->command_trb
= xhci
->cmd_ring
->enqueue
;
291 list_add_tail(&cmd
->cmd_list
, &virt_dev
->cmd_list
);
292 xhci_queue_stop_endpoint(xhci
, slot_id
, 0, suspend
);
293 xhci_ring_cmd_db(xhci
);
294 spin_unlock_irqrestore(&xhci
->lock
, flags
);
296 /* Wait for last stop endpoint command to finish */
297 timeleft
= wait_for_completion_interruptible_timeout(
299 USB_CTRL_SET_TIMEOUT
);
301 xhci_warn(xhci
, "%s while waiting for stop endpoint command\n",
302 timeleft
== 0 ? "Timeout" : "Signal");
303 spin_lock_irqsave(&xhci
->lock
, flags
);
304 /* The timeout might have raced with the event ring handler, so
305 * only delete from the list if the item isn't poisoned.
307 if (cmd
->cmd_list
.next
!= LIST_POISON1
)
308 list_del(&cmd
->cmd_list
);
309 spin_unlock_irqrestore(&xhci
->lock
, flags
);
311 goto command_cleanup
;
315 xhci_free_command(xhci
, cmd
);
320 * Ring device, it rings the all doorbells unconditionally.
322 void xhci_ring_device(struct xhci_hcd
*xhci
, int slot_id
)
326 for (i
= 0; i
< LAST_EP_INDEX
+ 1; i
++)
327 if (xhci
->devs
[slot_id
]->eps
[i
].ring
&&
328 xhci
->devs
[slot_id
]->eps
[i
].ring
->dequeue
)
329 xhci_ring_ep_doorbell(xhci
, slot_id
, i
, 0);
334 static void xhci_disable_port(struct usb_hcd
*hcd
, struct xhci_hcd
*xhci
,
335 u16 wIndex
, __le32 __iomem
*addr
, u32 port_status
)
337 /* Don't allow the USB core to disable SuperSpeed ports. */
338 if (hcd
->speed
== HCD_USB3
) {
339 xhci_dbg(xhci
, "Ignoring request to disable "
340 "SuperSpeed port.\n");
344 /* Write 1 to disable the port */
345 xhci_writel(xhci
, port_status
| PORT_PE
, addr
);
346 port_status
= xhci_readl(xhci
, addr
);
347 xhci_dbg(xhci
, "disable port, actual port %d status = 0x%x\n",
348 wIndex
, port_status
);
351 static void xhci_clear_port_change_bit(struct xhci_hcd
*xhci
, u16 wValue
,
352 u16 wIndex
, __le32 __iomem
*addr
, u32 port_status
)
354 char *port_change_bit
;
358 case USB_PORT_FEAT_C_RESET
:
360 port_change_bit
= "reset";
362 case USB_PORT_FEAT_C_BH_PORT_RESET
:
364 port_change_bit
= "warm(BH) reset";
366 case USB_PORT_FEAT_C_CONNECTION
:
368 port_change_bit
= "connect";
370 case USB_PORT_FEAT_C_OVER_CURRENT
:
372 port_change_bit
= "over-current";
374 case USB_PORT_FEAT_C_ENABLE
:
376 port_change_bit
= "enable/disable";
378 case USB_PORT_FEAT_C_SUSPEND
:
380 port_change_bit
= "suspend/resume";
382 case USB_PORT_FEAT_C_PORT_LINK_STATE
:
384 port_change_bit
= "link state";
387 /* Should never happen */
390 /* Change bits are all write 1 to clear */
391 xhci_writel(xhci
, port_status
| status
, addr
);
392 port_status
= xhci_readl(xhci
, addr
);
393 xhci_dbg(xhci
, "clear port %s change, actual port %d status = 0x%x\n",
394 port_change_bit
, wIndex
, port_status
);
397 static int xhci_get_ports(struct usb_hcd
*hcd
, __le32 __iomem
***port_array
)
400 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
402 if (hcd
->speed
== HCD_USB3
) {
403 max_ports
= xhci
->num_usb3_ports
;
404 *port_array
= xhci
->usb3_ports
;
406 max_ports
= xhci
->num_usb2_ports
;
407 *port_array
= xhci
->usb2_ports
;
413 void xhci_set_link_state(struct xhci_hcd
*xhci
, __le32 __iomem
**port_array
,
414 int port_id
, u32 link_state
)
418 temp
= xhci_readl(xhci
, port_array
[port_id
]);
419 temp
= xhci_port_state_to_neutral(temp
);
420 temp
&= ~PORT_PLS_MASK
;
421 temp
|= PORT_LINK_STROBE
| link_state
;
422 xhci_writel(xhci
, temp
, port_array
[port_id
]);
425 /* Test and clear port RWC bit */
426 void xhci_test_and_clear_bit(struct xhci_hcd
*xhci
, __le32 __iomem
**port_array
,
427 int port_id
, u32 port_bit
)
431 temp
= xhci_readl(xhci
, port_array
[port_id
]);
432 if (temp
& port_bit
) {
433 temp
= xhci_port_state_to_neutral(temp
);
435 xhci_writel(xhci
, temp
, port_array
[port_id
]);
439 int xhci_hub_control(struct usb_hcd
*hcd
, u16 typeReq
, u16 wValue
,
440 u16 wIndex
, char *buf
, u16 wLength
)
442 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
447 __le32 __iomem
**port_array
;
449 struct xhci_bus_state
*bus_state
;
452 max_ports
= xhci_get_ports(hcd
, &port_array
);
453 bus_state
= &xhci
->bus_state
[hcd_index(hcd
)];
455 spin_lock_irqsave(&xhci
->lock
, flags
);
458 /* No power source, over-current reported per port */
461 case GetHubDescriptor
:
462 /* Check to make sure userspace is asking for the USB 3.0 hub
463 * descriptor for the USB 3.0 roothub. If not, we stall the
464 * endpoint, like external hubs do.
466 if (hcd
->speed
== HCD_USB3
&&
467 (wLength
< USB_DT_SS_HUB_SIZE
||
468 wValue
!= (USB_DT_SS_HUB
<< 8))) {
469 xhci_dbg(xhci
, "Wrong hub descriptor type for "
470 "USB 3.0 roothub.\n");
473 xhci_hub_descriptor(hcd
, xhci
,
474 (struct usb_hub_descriptor
*) buf
);
476 case DeviceRequest
| USB_REQ_GET_DESCRIPTOR
:
477 if ((wValue
& 0xff00) != (USB_DT_BOS
<< 8))
480 if (hcd
->speed
!= HCD_USB3
)
483 memcpy(buf
, &usb_bos_descriptor
,
484 USB_DT_BOS_SIZE
+ USB_DT_USB_SS_CAP_SIZE
);
485 temp
= xhci_readl(xhci
, &xhci
->cap_regs
->hcs_params3
);
486 buf
[12] = HCS_U1_LATENCY(temp
);
487 put_unaligned_le16(HCS_U2_LATENCY(temp
), &buf
[13]);
489 spin_unlock_irqrestore(&xhci
->lock
, flags
);
490 return USB_DT_BOS_SIZE
+ USB_DT_USB_SS_CAP_SIZE
;
492 if (!wIndex
|| wIndex
> max_ports
)
496 temp
= xhci_readl(xhci
, port_array
[wIndex
]);
497 if (temp
== 0xffffffff) {
501 xhci_dbg(xhci
, "get port status, actual port %d status = 0x%x\n", wIndex
, temp
);
503 /* wPortChange bits */
505 status
|= USB_PORT_STAT_C_CONNECTION
<< 16;
507 status
|= USB_PORT_STAT_C_ENABLE
<< 16;
508 if ((temp
& PORT_OCC
))
509 status
|= USB_PORT_STAT_C_OVERCURRENT
<< 16;
510 if ((temp
& PORT_RC
))
511 status
|= USB_PORT_STAT_C_RESET
<< 16;
513 if (hcd
->speed
== HCD_USB3
) {
514 if ((temp
& PORT_PLC
))
515 status
|= USB_PORT_STAT_C_LINK_STATE
<< 16;
516 if ((temp
& PORT_WRC
))
517 status
|= USB_PORT_STAT_C_BH_RESET
<< 16;
520 if (hcd
->speed
!= HCD_USB3
) {
521 if ((temp
& PORT_PLS_MASK
) == XDEV_U3
522 && (temp
& PORT_POWER
))
523 status
|= USB_PORT_STAT_SUSPEND
;
525 if ((temp
& PORT_PLS_MASK
) == XDEV_RESUME
&&
526 !DEV_SUPERSPEED(temp
)) {
527 if ((temp
& PORT_RESET
) || !(temp
& PORT_PE
))
529 if (time_after_eq(jiffies
,
530 bus_state
->resume_done
[wIndex
])) {
531 xhci_dbg(xhci
, "Resume USB2 port %d\n",
533 bus_state
->resume_done
[wIndex
] = 0;
534 xhci_set_link_state(xhci
, port_array
, wIndex
,
536 xhci_dbg(xhci
, "set port %d resume\n",
538 slot_id
= xhci_find_slot_id_by_port(hcd
, xhci
,
541 xhci_dbg(xhci
, "slot_id is zero\n");
544 xhci_ring_device(xhci
, slot_id
);
545 bus_state
->port_c_suspend
|= 1 << wIndex
;
546 bus_state
->suspended_ports
&= ~(1 << wIndex
);
549 * The resume has been signaling for less than
550 * 20ms. Report the port status as SUSPEND,
551 * let the usbcore check port status again
552 * and clear resume signaling later.
554 status
|= USB_PORT_STAT_SUSPEND
;
557 if ((temp
& PORT_PLS_MASK
) == XDEV_U0
558 && (temp
& PORT_POWER
)
559 && (bus_state
->suspended_ports
& (1 << wIndex
))) {
560 bus_state
->suspended_ports
&= ~(1 << wIndex
);
561 if (hcd
->speed
!= HCD_USB3
)
562 bus_state
->port_c_suspend
|= 1 << wIndex
;
564 if (temp
& PORT_CONNECT
) {
565 status
|= USB_PORT_STAT_CONNECTION
;
566 status
|= xhci_port_speed(temp
);
569 status
|= USB_PORT_STAT_ENABLE
;
571 status
|= USB_PORT_STAT_OVERCURRENT
;
572 if (temp
& PORT_RESET
)
573 status
|= USB_PORT_STAT_RESET
;
574 if (temp
& PORT_POWER
) {
575 if (hcd
->speed
== HCD_USB3
)
576 status
|= USB_SS_PORT_STAT_POWER
;
578 status
|= USB_PORT_STAT_POWER
;
580 /* Port Link State */
581 if (hcd
->speed
== HCD_USB3
) {
582 /* resume state is a xHCI internal state.
583 * Do not report it to usb core.
585 if ((temp
& PORT_PLS_MASK
) != XDEV_RESUME
)
586 status
|= (temp
& PORT_PLS_MASK
);
588 if (bus_state
->port_c_suspend
& (1 << wIndex
))
589 status
|= 1 << USB_PORT_FEAT_C_SUSPEND
;
590 xhci_dbg(xhci
, "Get port status returned 0x%x\n", status
);
591 put_unaligned(cpu_to_le32(status
), (__le32
*) buf
);
594 if (wValue
== USB_PORT_FEAT_LINK_STATE
)
595 link_state
= (wIndex
& 0xff00) >> 3;
597 if (!wIndex
|| wIndex
> max_ports
)
600 temp
= xhci_readl(xhci
, port_array
[wIndex
]);
601 if (temp
== 0xffffffff) {
605 temp
= xhci_port_state_to_neutral(temp
);
606 /* FIXME: What new port features do we need to support? */
608 case USB_PORT_FEAT_SUSPEND
:
609 temp
= xhci_readl(xhci
, port_array
[wIndex
]);
610 if ((temp
& PORT_PLS_MASK
) != XDEV_U0
) {
611 /* Resume the port to U0 first */
612 xhci_set_link_state(xhci
, port_array
, wIndex
,
614 spin_unlock_irqrestore(&xhci
->lock
, flags
);
616 spin_lock_irqsave(&xhci
->lock
, flags
);
618 /* In spec software should not attempt to suspend
619 * a port unless the port reports that it is in the
620 * enabled (PED = ‘1’,PLS < ‘3’) state.
622 temp
= xhci_readl(xhci
, port_array
[wIndex
]);
623 if ((temp
& PORT_PE
) == 0 || (temp
& PORT_RESET
)
624 || (temp
& PORT_PLS_MASK
) >= XDEV_U3
) {
625 xhci_warn(xhci
, "USB core suspending device "
626 "not in U0/U1/U2.\n");
630 slot_id
= xhci_find_slot_id_by_port(hcd
, xhci
,
633 xhci_warn(xhci
, "slot_id is zero\n");
636 /* unlock to execute stop endpoint commands */
637 spin_unlock_irqrestore(&xhci
->lock
, flags
);
638 xhci_stop_device(xhci
, slot_id
, 1);
639 spin_lock_irqsave(&xhci
->lock
, flags
);
641 xhci_set_link_state(xhci
, port_array
, wIndex
, XDEV_U3
);
643 spin_unlock_irqrestore(&xhci
->lock
, flags
);
644 msleep(10); /* wait device to enter */
645 spin_lock_irqsave(&xhci
->lock
, flags
);
647 temp
= xhci_readl(xhci
, port_array
[wIndex
]);
648 bus_state
->suspended_ports
|= 1 << wIndex
;
650 case USB_PORT_FEAT_LINK_STATE
:
651 temp
= xhci_readl(xhci
, port_array
[wIndex
]);
652 /* Software should not attempt to set
653 * port link state above '5' (Rx.Detect) and the port
656 if ((temp
& PORT_PE
) == 0 ||
657 (link_state
> USB_SS_PORT_LS_RX_DETECT
)) {
658 xhci_warn(xhci
, "Cannot set link state.\n");
662 if (link_state
== USB_SS_PORT_LS_U3
) {
663 slot_id
= xhci_find_slot_id_by_port(hcd
, xhci
,
666 /* unlock to execute stop endpoint
668 spin_unlock_irqrestore(&xhci
->lock
,
670 xhci_stop_device(xhci
, slot_id
, 1);
671 spin_lock_irqsave(&xhci
->lock
, flags
);
675 xhci_set_link_state(xhci
, port_array
, wIndex
,
678 spin_unlock_irqrestore(&xhci
->lock
, flags
);
679 msleep(20); /* wait device to enter */
680 spin_lock_irqsave(&xhci
->lock
, flags
);
682 temp
= xhci_readl(xhci
, port_array
[wIndex
]);
683 if (link_state
== USB_SS_PORT_LS_U3
)
684 bus_state
->suspended_ports
|= 1 << wIndex
;
686 case USB_PORT_FEAT_POWER
:
688 * Turn on ports, even if there isn't per-port switching.
689 * HC will report connect events even before this is set.
690 * However, khubd will ignore the roothub events until
691 * the roothub is registered.
693 xhci_writel(xhci
, temp
| PORT_POWER
,
696 temp
= xhci_readl(xhci
, port_array
[wIndex
]);
697 xhci_dbg(xhci
, "set port power, actual port %d status = 0x%x\n", wIndex
, temp
);
699 case USB_PORT_FEAT_RESET
:
700 temp
= (temp
| PORT_RESET
);
701 xhci_writel(xhci
, temp
, port_array
[wIndex
]);
703 temp
= xhci_readl(xhci
, port_array
[wIndex
]);
704 xhci_dbg(xhci
, "set port reset, actual port %d status = 0x%x\n", wIndex
, temp
);
706 case USB_PORT_FEAT_BH_PORT_RESET
:
708 xhci_writel(xhci
, temp
, port_array
[wIndex
]);
710 temp
= xhci_readl(xhci
, port_array
[wIndex
]);
715 /* unblock any posted writes */
716 temp
= xhci_readl(xhci
, port_array
[wIndex
]);
718 case ClearPortFeature
:
719 if (!wIndex
|| wIndex
> max_ports
)
722 temp
= xhci_readl(xhci
, port_array
[wIndex
]);
723 if (temp
== 0xffffffff) {
727 /* FIXME: What new port features do we need to support? */
728 temp
= xhci_port_state_to_neutral(temp
);
730 case USB_PORT_FEAT_SUSPEND
:
731 temp
= xhci_readl(xhci
, port_array
[wIndex
]);
732 xhci_dbg(xhci
, "clear USB_PORT_FEAT_SUSPEND\n");
733 xhci_dbg(xhci
, "PORTSC %04x\n", temp
);
734 if (temp
& PORT_RESET
)
736 if ((temp
& PORT_PLS_MASK
) == XDEV_U3
) {
737 if ((temp
& PORT_PE
) == 0)
740 xhci_set_link_state(xhci
, port_array
, wIndex
,
742 spin_unlock_irqrestore(&xhci
->lock
, flags
);
744 spin_lock_irqsave(&xhci
->lock
, flags
);
745 xhci_set_link_state(xhci
, port_array
, wIndex
,
748 bus_state
->port_c_suspend
|= 1 << wIndex
;
750 slot_id
= xhci_find_slot_id_by_port(hcd
, xhci
,
753 xhci_dbg(xhci
, "slot_id is zero\n");
756 xhci_ring_device(xhci
, slot_id
);
758 case USB_PORT_FEAT_C_SUSPEND
:
759 bus_state
->port_c_suspend
&= ~(1 << wIndex
);
760 case USB_PORT_FEAT_C_RESET
:
761 case USB_PORT_FEAT_C_BH_PORT_RESET
:
762 case USB_PORT_FEAT_C_CONNECTION
:
763 case USB_PORT_FEAT_C_OVER_CURRENT
:
764 case USB_PORT_FEAT_C_ENABLE
:
765 case USB_PORT_FEAT_C_PORT_LINK_STATE
:
766 xhci_clear_port_change_bit(xhci
, wValue
, wIndex
,
767 port_array
[wIndex
], temp
);
769 case USB_PORT_FEAT_ENABLE
:
770 xhci_disable_port(hcd
, xhci
, wIndex
,
771 port_array
[wIndex
], temp
);
779 /* "stall" on error */
782 spin_unlock_irqrestore(&xhci
->lock
, flags
);
787 * Returns 0 if the status hasn't changed, or the number of bytes in buf.
788 * Ports are 0-indexed from the HCD point of view,
789 * and 1-indexed from the USB core pointer of view.
791 * Note that the status change bits will be cleared as soon as a port status
792 * change event is generated, so we use the saved status from that event.
794 int xhci_hub_status_data(struct usb_hcd
*hcd
, char *buf
)
800 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
802 __le32 __iomem
**port_array
;
803 struct xhci_bus_state
*bus_state
;
805 max_ports
= xhci_get_ports(hcd
, &port_array
);
806 bus_state
= &xhci
->bus_state
[hcd_index(hcd
)];
808 /* Initial status is no changes */
809 retval
= (max_ports
+ 8) / 8;
810 memset(buf
, 0, retval
);
813 mask
= PORT_CSC
| PORT_PEC
| PORT_OCC
| PORT_PLC
| PORT_WRC
;
815 spin_lock_irqsave(&xhci
->lock
, flags
);
816 /* For each port, did anything change? If so, set that bit in buf. */
817 for (i
= 0; i
< max_ports
; i
++) {
818 temp
= xhci_readl(xhci
, port_array
[i
]);
819 if (temp
== 0xffffffff) {
823 if ((temp
& mask
) != 0 ||
824 (bus_state
->port_c_suspend
& 1 << i
) ||
825 (bus_state
->resume_done
[i
] && time_after_eq(
826 jiffies
, bus_state
->resume_done
[i
]))) {
827 buf
[(i
+ 1) / 8] |= 1 << (i
+ 1) % 8;
831 spin_unlock_irqrestore(&xhci
->lock
, flags
);
832 return status
? retval
: 0;
837 int xhci_bus_suspend(struct usb_hcd
*hcd
)
839 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
840 int max_ports
, port_index
;
841 __le32 __iomem
**port_array
;
842 struct xhci_bus_state
*bus_state
;
845 max_ports
= xhci_get_ports(hcd
, &port_array
);
846 bus_state
= &xhci
->bus_state
[hcd_index(hcd
)];
848 spin_lock_irqsave(&xhci
->lock
, flags
);
850 if (hcd
->self
.root_hub
->do_remote_wakeup
) {
851 port_index
= max_ports
;
852 while (port_index
--) {
853 if (bus_state
->resume_done
[port_index
] != 0) {
854 spin_unlock_irqrestore(&xhci
->lock
, flags
);
855 xhci_dbg(xhci
, "suspend failed because "
856 "port %d is resuming\n",
863 port_index
= max_ports
;
864 bus_state
->bus_suspended
= 0;
865 while (port_index
--) {
866 /* suspend the port if the port is not suspended */
870 t1
= xhci_readl(xhci
, port_array
[port_index
]);
871 t2
= xhci_port_state_to_neutral(t1
);
873 if ((t1
& PORT_PE
) && !(t1
& PORT_PLS_MASK
)) {
874 xhci_dbg(xhci
, "port %d not suspended\n", port_index
);
875 slot_id
= xhci_find_slot_id_by_port(hcd
, xhci
,
878 spin_unlock_irqrestore(&xhci
->lock
, flags
);
879 xhci_stop_device(xhci
, slot_id
, 1);
880 spin_lock_irqsave(&xhci
->lock
, flags
);
882 t2
&= ~PORT_PLS_MASK
;
883 t2
|= PORT_LINK_STROBE
| XDEV_U3
;
884 set_bit(port_index
, &bus_state
->bus_suspended
);
886 if (hcd
->self
.root_hub
->do_remote_wakeup
) {
887 if (t1
& PORT_CONNECT
) {
888 t2
|= PORT_WKOC_E
| PORT_WKDISC_E
;
889 t2
&= ~PORT_WKCONN_E
;
891 t2
|= PORT_WKOC_E
| PORT_WKCONN_E
;
892 t2
&= ~PORT_WKDISC_E
;
895 t2
&= ~PORT_WAKE_BITS
;
897 t1
= xhci_port_state_to_neutral(t1
);
899 xhci_writel(xhci
, t2
, port_array
[port_index
]);
901 if (hcd
->speed
!= HCD_USB3
) {
902 /* enable remote wake up for USB 2.0 */
903 __le32 __iomem
*addr
;
906 /* Add one to the port status register address to get
907 * the port power control register address.
909 addr
= port_array
[port_index
] + 1;
910 tmp
= xhci_readl(xhci
, addr
);
912 xhci_writel(xhci
, tmp
, addr
);
915 hcd
->state
= HC_STATE_SUSPENDED
;
916 bus_state
->next_statechange
= jiffies
+ msecs_to_jiffies(10);
917 spin_unlock_irqrestore(&xhci
->lock
, flags
);
921 int xhci_bus_resume(struct usb_hcd
*hcd
)
923 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
924 int max_ports
, port_index
;
925 __le32 __iomem
**port_array
;
926 struct xhci_bus_state
*bus_state
;
930 max_ports
= xhci_get_ports(hcd
, &port_array
);
931 bus_state
= &xhci
->bus_state
[hcd_index(hcd
)];
933 if (time_before(jiffies
, bus_state
->next_statechange
))
936 spin_lock_irqsave(&xhci
->lock
, flags
);
937 if (!HCD_HW_ACCESSIBLE(hcd
)) {
938 spin_unlock_irqrestore(&xhci
->lock
, flags
);
943 temp
= xhci_readl(xhci
, &xhci
->op_regs
->command
);
945 xhci_writel(xhci
, temp
, &xhci
->op_regs
->command
);
947 port_index
= max_ports
;
948 while (port_index
--) {
949 /* Check whether need resume ports. If needed
950 resume port and disable remote wakeup */
954 temp
= xhci_readl(xhci
, port_array
[port_index
]);
955 if (DEV_SUPERSPEED(temp
))
956 temp
&= ~(PORT_RWC_BITS
| PORT_CEC
| PORT_WAKE_BITS
);
958 temp
&= ~(PORT_RWC_BITS
| PORT_WAKE_BITS
);
959 if (test_bit(port_index
, &bus_state
->bus_suspended
) &&
960 (temp
& PORT_PLS_MASK
)) {
961 if (DEV_SUPERSPEED(temp
)) {
962 xhci_set_link_state(xhci
, port_array
,
963 port_index
, XDEV_U0
);
965 xhci_set_link_state(xhci
, port_array
,
966 port_index
, XDEV_RESUME
);
968 spin_unlock_irqrestore(&xhci
->lock
, flags
);
970 spin_lock_irqsave(&xhci
->lock
, flags
);
972 xhci_set_link_state(xhci
, port_array
,
973 port_index
, XDEV_U0
);
975 /* wait for the port to enter U0 and report port link
978 spin_unlock_irqrestore(&xhci
->lock
, flags
);
980 spin_lock_irqsave(&xhci
->lock
, flags
);
983 xhci_test_and_clear_bit(xhci
, port_array
, port_index
,
986 slot_id
= xhci_find_slot_id_by_port(hcd
,
987 xhci
, port_index
+ 1);
989 xhci_ring_device(xhci
, slot_id
);
991 xhci_writel(xhci
, temp
, port_array
[port_index
]);
993 if (hcd
->speed
!= HCD_USB3
) {
994 /* disable remote wake up for USB 2.0 */
995 __le32 __iomem
*addr
;
998 /* Add one to the port status register address to get
999 * the port power control register address.
1001 addr
= port_array
[port_index
] + 1;
1002 tmp
= xhci_readl(xhci
, addr
);
1004 xhci_writel(xhci
, tmp
, addr
);
1008 (void) xhci_readl(xhci
, &xhci
->op_regs
->command
);
1010 bus_state
->next_statechange
= jiffies
+ msecs_to_jiffies(5);
1011 /* re-enable irqs */
1012 temp
= xhci_readl(xhci
, &xhci
->op_regs
->command
);
1014 xhci_writel(xhci
, temp
, &xhci
->op_regs
->command
);
1015 temp
= xhci_readl(xhci
, &xhci
->op_regs
->command
);
1017 spin_unlock_irqrestore(&xhci
->lock
, flags
);
1021 #endif /* CONFIG_PM */