i2c-eg20t: change timeout value 50msec to 1000msec
[zen-stable.git] / drivers / usb / host / xhci-pci.c
blob211296aa0f3ce6dd6235ce55075829266a02f72e
1 /*
2 * xHCI host controller driver PCI Bus Glue.
4 * Copyright (C) 2008 Intel Corp.
6 * Author: Sarah Sharp
7 * Some code borrowed from the Linux EHCI driver.
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
15 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
16 * for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software Foundation,
20 * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
23 #include <linux/pci.h>
24 #include <linux/slab.h>
25 #include <linux/module.h>
27 #include "xhci.h"
29 /* Device for a quirk */
30 #define PCI_VENDOR_ID_FRESCO_LOGIC 0x1b73
31 #define PCI_DEVICE_ID_FRESCO_LOGIC_PDK 0x1000
33 #define PCI_VENDOR_ID_ETRON 0x1b6f
34 #define PCI_DEVICE_ID_ASROCK_P67 0x7023
36 static const char hcd_name[] = "xhci_hcd";
38 /* called after powerup, by probe or system-pm "wakeup" */
39 static int xhci_pci_reinit(struct xhci_hcd *xhci, struct pci_dev *pdev)
42 * TODO: Implement finding debug ports later.
43 * TODO: see if there are any quirks that need to be added to handle
44 * new extended capabilities.
47 /* PCI Memory-Write-Invalidate cycle support is optional (uncommon) */
48 if (!pci_set_mwi(pdev))
49 xhci_dbg(xhci, "MWI active\n");
51 xhci_dbg(xhci, "Finished xhci_pci_reinit\n");
52 return 0;
55 static void xhci_pci_quirks(struct device *dev, struct xhci_hcd *xhci)
57 struct pci_dev *pdev = to_pci_dev(dev);
59 /* Look for vendor-specific quirks */
60 if (pdev->vendor == PCI_VENDOR_ID_FRESCO_LOGIC &&
61 pdev->device == PCI_DEVICE_ID_FRESCO_LOGIC_PDK) {
62 if (pdev->revision == 0x0) {
63 xhci->quirks |= XHCI_RESET_EP_QUIRK;
64 xhci_dbg(xhci, "QUIRK: Fresco Logic xHC needs configure"
65 " endpoint cmd after reset endpoint\n");
67 /* Fresco Logic confirms: all revisions of this chip do not
68 * support MSI, even though some of them claim to in their PCI
69 * capabilities.
71 xhci->quirks |= XHCI_BROKEN_MSI;
72 xhci_dbg(xhci, "QUIRK: Fresco Logic revision %u "
73 "has broken MSI implementation\n",
74 pdev->revision);
77 if (pdev->vendor == PCI_VENDOR_ID_NEC)
78 xhci->quirks |= XHCI_NEC_HOST;
80 if (pdev->vendor == PCI_VENDOR_ID_AMD && xhci->hci_version == 0x96)
81 xhci->quirks |= XHCI_AMD_0x96_HOST;
83 /* AMD PLL quirk */
84 if (pdev->vendor == PCI_VENDOR_ID_AMD && usb_amd_find_chipset_info())
85 xhci->quirks |= XHCI_AMD_PLL_FIX;
86 if (pdev->vendor == PCI_VENDOR_ID_INTEL &&
87 pdev->device == PCI_DEVICE_ID_INTEL_PANTHERPOINT_XHCI) {
88 xhci->quirks |= XHCI_SPURIOUS_SUCCESS;
89 xhci->quirks |= XHCI_EP_LIMIT_QUIRK;
90 xhci->limit_active_eps = 64;
91 xhci->quirks |= XHCI_SW_BW_CHECKING;
93 if (pdev->vendor == PCI_VENDOR_ID_ETRON &&
94 pdev->device == PCI_DEVICE_ID_ASROCK_P67) {
95 xhci->quirks |= XHCI_RESET_ON_RESUME;
96 xhci_dbg(xhci, "QUIRK: Resetting on resume\n");
98 if (pdev->vendor == PCI_VENDOR_ID_VIA)
99 xhci->quirks |= XHCI_RESET_ON_RESUME;
102 /* called during probe() after chip reset completes */
103 static int xhci_pci_setup(struct usb_hcd *hcd)
105 struct xhci_hcd *xhci;
106 struct pci_dev *pdev = to_pci_dev(hcd->self.controller);
107 int retval;
109 retval = xhci_gen_setup(hcd, xhci_pci_quirks);
110 if (retval)
111 return retval;
113 xhci = hcd_to_xhci(hcd);
114 if (!usb_hcd_is_primary_hcd(hcd))
115 return 0;
117 pci_read_config_byte(pdev, XHCI_SBRN_OFFSET, &xhci->sbrn);
118 xhci_dbg(xhci, "Got SBRN %u\n", (unsigned int) xhci->sbrn);
120 /* Find any debug ports */
121 retval = xhci_pci_reinit(xhci, pdev);
122 if (!retval)
123 return retval;
125 kfree(xhci);
126 return retval;
130 * We need to register our own PCI probe function (instead of the USB core's
131 * function) in order to create a second roothub under xHCI.
133 static int xhci_pci_probe(struct pci_dev *dev, const struct pci_device_id *id)
135 int retval;
136 struct xhci_hcd *xhci;
137 struct hc_driver *driver;
138 struct usb_hcd *hcd;
140 driver = (struct hc_driver *)id->driver_data;
141 /* Register the USB 2.0 roothub.
142 * FIXME: USB core must know to register the USB 2.0 roothub first.
143 * This is sort of silly, because we could just set the HCD driver flags
144 * to say USB 2.0, but I'm not sure what the implications would be in
145 * the other parts of the HCD code.
147 retval = usb_hcd_pci_probe(dev, id);
149 if (retval)
150 return retval;
152 /* USB 2.0 roothub is stored in the PCI device now. */
153 hcd = dev_get_drvdata(&dev->dev);
154 xhci = hcd_to_xhci(hcd);
155 xhci->shared_hcd = usb_create_shared_hcd(driver, &dev->dev,
156 pci_name(dev), hcd);
157 if (!xhci->shared_hcd) {
158 retval = -ENOMEM;
159 goto dealloc_usb2_hcd;
162 /* Set the xHCI pointer before xhci_pci_setup() (aka hcd_driver.reset)
163 * is called by usb_add_hcd().
165 *((struct xhci_hcd **) xhci->shared_hcd->hcd_priv) = xhci;
167 retval = usb_add_hcd(xhci->shared_hcd, dev->irq,
168 IRQF_SHARED);
169 if (retval)
170 goto put_usb3_hcd;
171 /* Roothub already marked as USB 3.0 speed */
172 return 0;
174 put_usb3_hcd:
175 usb_put_hcd(xhci->shared_hcd);
176 dealloc_usb2_hcd:
177 usb_hcd_pci_remove(dev);
178 return retval;
181 static void xhci_pci_remove(struct pci_dev *dev)
183 struct xhci_hcd *xhci;
185 xhci = hcd_to_xhci(pci_get_drvdata(dev));
186 if (xhci->shared_hcd) {
187 usb_remove_hcd(xhci->shared_hcd);
188 usb_put_hcd(xhci->shared_hcd);
190 usb_hcd_pci_remove(dev);
191 kfree(xhci);
194 #ifdef CONFIG_PM
195 static int xhci_pci_suspend(struct usb_hcd *hcd, bool do_wakeup)
197 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
198 int retval = 0;
200 if (hcd->state != HC_STATE_SUSPENDED ||
201 xhci->shared_hcd->state != HC_STATE_SUSPENDED)
202 return -EINVAL;
204 retval = xhci_suspend(xhci);
206 return retval;
209 static int xhci_pci_resume(struct usb_hcd *hcd, bool hibernated)
211 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
212 struct pci_dev *pdev = to_pci_dev(hcd->self.controller);
213 int retval = 0;
215 /* The BIOS on systems with the Intel Panther Point chipset may or may
216 * not support xHCI natively. That means that during system resume, it
217 * may switch the ports back to EHCI so that users can use their
218 * keyboard to select a kernel from GRUB after resume from hibernate.
220 * The BIOS is supposed to remember whether the OS had xHCI ports
221 * enabled before resume, and switch the ports back to xHCI when the
222 * BIOS/OS semaphore is written, but we all know we can't trust BIOS
223 * writers.
225 * Unconditionally switch the ports back to xHCI after a system resume.
226 * We can't tell whether the EHCI or xHCI controller will be resumed
227 * first, so we have to do the port switchover in both drivers. Writing
228 * a '1' to the port switchover registers should have no effect if the
229 * port was already switched over.
231 if (usb_is_intel_switchable_xhci(pdev))
232 usb_enable_xhci_ports(pdev);
234 retval = xhci_resume(xhci, hibernated);
235 return retval;
237 #endif /* CONFIG_PM */
239 static const struct hc_driver xhci_pci_hc_driver = {
240 .description = hcd_name,
241 .product_desc = "xHCI Host Controller",
242 .hcd_priv_size = sizeof(struct xhci_hcd *),
245 * generic hardware linkage
247 .irq = xhci_irq,
248 .flags = HCD_MEMORY | HCD_USB3 | HCD_SHARED,
251 * basic lifecycle operations
253 .reset = xhci_pci_setup,
254 .start = xhci_run,
255 #ifdef CONFIG_PM
256 .pci_suspend = xhci_pci_suspend,
257 .pci_resume = xhci_pci_resume,
258 #endif
259 .stop = xhci_stop,
260 .shutdown = xhci_shutdown,
263 * managing i/o requests and associated device resources
265 .urb_enqueue = xhci_urb_enqueue,
266 .urb_dequeue = xhci_urb_dequeue,
267 .alloc_dev = xhci_alloc_dev,
268 .free_dev = xhci_free_dev,
269 .alloc_streams = xhci_alloc_streams,
270 .free_streams = xhci_free_streams,
271 .add_endpoint = xhci_add_endpoint,
272 .drop_endpoint = xhci_drop_endpoint,
273 .endpoint_reset = xhci_endpoint_reset,
274 .check_bandwidth = xhci_check_bandwidth,
275 .reset_bandwidth = xhci_reset_bandwidth,
276 .address_device = xhci_address_device,
277 .update_hub_device = xhci_update_hub_device,
278 .reset_device = xhci_discover_or_reset_device,
281 * scheduling support
283 .get_frame_number = xhci_get_frame,
285 /* Root hub support */
286 .hub_control = xhci_hub_control,
287 .hub_status_data = xhci_hub_status_data,
288 .bus_suspend = xhci_bus_suspend,
289 .bus_resume = xhci_bus_resume,
291 * call back when device connected and addressed
293 .update_device = xhci_update_device,
294 .set_usb2_hw_lpm = xhci_set_usb2_hardware_lpm,
297 /*-------------------------------------------------------------------------*/
299 /* PCI driver selection metadata; PCI hotplugging uses this */
300 static const struct pci_device_id pci_ids[] = { {
301 /* handle any USB 3.0 xHCI controller */
302 PCI_DEVICE_CLASS(PCI_CLASS_SERIAL_USB_XHCI, ~0),
303 .driver_data = (unsigned long) &xhci_pci_hc_driver,
305 { /* end: all zeroes */ }
307 MODULE_DEVICE_TABLE(pci, pci_ids);
309 /* pci driver glue; this is a "new style" PCI driver module */
310 static struct pci_driver xhci_pci_driver = {
311 .name = (char *) hcd_name,
312 .id_table = pci_ids,
314 .probe = xhci_pci_probe,
315 .remove = xhci_pci_remove,
316 /* suspend and resume implemented later */
318 .shutdown = usb_hcd_pci_shutdown,
319 #ifdef CONFIG_PM_SLEEP
320 .driver = {
321 .pm = &usb_hcd_pci_pm_ops
323 #endif
326 int __init xhci_register_pci(void)
328 return pci_register_driver(&xhci_pci_driver);
331 void __exit xhci_unregister_pci(void)
333 pci_unregister_driver(&xhci_pci_driver);