i2c-eg20t: change timeout value 50msec to 1000msec
[zen-stable.git] / drivers / usb / otg / mv_otg.c
blobb5fbe1452ab00e83b2a25dff027548a31b56ff29
1 /*
2 * Copyright (C) 2011 Marvell International Ltd. All rights reserved.
3 * Author: Chao Xie <chao.xie@marvell.com>
4 * Neil Zhang <zhangwm@marvell.com>
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
12 #include <linux/module.h>
13 #include <linux/kernel.h>
14 #include <linux/init.h>
15 #include <linux/io.h>
16 #include <linux/uaccess.h>
17 #include <linux/device.h>
18 #include <linux/proc_fs.h>
19 #include <linux/clk.h>
20 #include <linux/workqueue.h>
21 #include <linux/platform_device.h>
23 #include <linux/usb.h>
24 #include <linux/usb/ch9.h>
25 #include <linux/usb/otg.h>
26 #include <linux/usb/gadget.h>
27 #include <linux/usb/hcd.h>
28 #include <linux/platform_data/mv_usb.h>
30 #include "mv_otg.h"
32 #define DRIVER_DESC "Marvell USB OTG transceiver driver"
33 #define DRIVER_VERSION "Jan 20, 2010"
35 MODULE_DESCRIPTION(DRIVER_DESC);
36 MODULE_VERSION(DRIVER_VERSION);
37 MODULE_LICENSE("GPL");
39 static const char driver_name[] = "mv-otg";
41 static char *state_string[] = {
42 "undefined",
43 "b_idle",
44 "b_srp_init",
45 "b_peripheral",
46 "b_wait_acon",
47 "b_host",
48 "a_idle",
49 "a_wait_vrise",
50 "a_wait_bcon",
51 "a_host",
52 "a_suspend",
53 "a_peripheral",
54 "a_wait_vfall",
55 "a_vbus_err"
58 static int mv_otg_set_vbus(struct otg_transceiver *otg, bool on)
60 struct mv_otg *mvotg = container_of(otg, struct mv_otg, otg);
61 if (mvotg->pdata->set_vbus == NULL)
62 return -ENODEV;
64 return mvotg->pdata->set_vbus(on);
67 static int mv_otg_set_host(struct otg_transceiver *otg,
68 struct usb_bus *host)
70 otg->host = host;
72 return 0;
75 static int mv_otg_set_peripheral(struct otg_transceiver *otg,
76 struct usb_gadget *gadget)
78 otg->gadget = gadget;
80 return 0;
83 static void mv_otg_run_state_machine(struct mv_otg *mvotg,
84 unsigned long delay)
86 dev_dbg(&mvotg->pdev->dev, "transceiver is updated\n");
87 if (!mvotg->qwork)
88 return;
90 queue_delayed_work(mvotg->qwork, &mvotg->work, delay);
93 static void mv_otg_timer_await_bcon(unsigned long data)
95 struct mv_otg *mvotg = (struct mv_otg *) data;
97 mvotg->otg_ctrl.a_wait_bcon_timeout = 1;
99 dev_info(&mvotg->pdev->dev, "B Device No Response!\n");
101 if (spin_trylock(&mvotg->wq_lock)) {
102 mv_otg_run_state_machine(mvotg, 0);
103 spin_unlock(&mvotg->wq_lock);
107 static int mv_otg_cancel_timer(struct mv_otg *mvotg, unsigned int id)
109 struct timer_list *timer;
111 if (id >= OTG_TIMER_NUM)
112 return -EINVAL;
114 timer = &mvotg->otg_ctrl.timer[id];
116 if (timer_pending(timer))
117 del_timer(timer);
119 return 0;
122 static int mv_otg_set_timer(struct mv_otg *mvotg, unsigned int id,
123 unsigned long interval,
124 void (*callback) (unsigned long))
126 struct timer_list *timer;
128 if (id >= OTG_TIMER_NUM)
129 return -EINVAL;
131 timer = &mvotg->otg_ctrl.timer[id];
132 if (timer_pending(timer)) {
133 dev_err(&mvotg->pdev->dev, "Timer%d is already running\n", id);
134 return -EBUSY;
137 init_timer(timer);
138 timer->data = (unsigned long) mvotg;
139 timer->function = callback;
140 timer->expires = jiffies + interval;
141 add_timer(timer);
143 return 0;
146 static int mv_otg_reset(struct mv_otg *mvotg)
148 unsigned int loops;
149 u32 tmp;
151 /* Stop the controller */
152 tmp = readl(&mvotg->op_regs->usbcmd);
153 tmp &= ~USBCMD_RUN_STOP;
154 writel(tmp, &mvotg->op_regs->usbcmd);
156 /* Reset the controller to get default values */
157 writel(USBCMD_CTRL_RESET, &mvotg->op_regs->usbcmd);
159 loops = 500;
160 while (readl(&mvotg->op_regs->usbcmd) & USBCMD_CTRL_RESET) {
161 if (loops == 0) {
162 dev_err(&mvotg->pdev->dev,
163 "Wait for RESET completed TIMEOUT\n");
164 return -ETIMEDOUT;
166 loops--;
167 udelay(20);
170 writel(0x0, &mvotg->op_regs->usbintr);
171 tmp = readl(&mvotg->op_regs->usbsts);
172 writel(tmp, &mvotg->op_regs->usbsts);
174 return 0;
177 static void mv_otg_init_irq(struct mv_otg *mvotg)
179 u32 otgsc;
181 mvotg->irq_en = OTGSC_INTR_A_SESSION_VALID
182 | OTGSC_INTR_A_VBUS_VALID;
183 mvotg->irq_status = OTGSC_INTSTS_A_SESSION_VALID
184 | OTGSC_INTSTS_A_VBUS_VALID;
186 if (mvotg->pdata->vbus == NULL) {
187 mvotg->irq_en |= OTGSC_INTR_B_SESSION_VALID
188 | OTGSC_INTR_B_SESSION_END;
189 mvotg->irq_status |= OTGSC_INTSTS_B_SESSION_VALID
190 | OTGSC_INTSTS_B_SESSION_END;
193 if (mvotg->pdata->id == NULL) {
194 mvotg->irq_en |= OTGSC_INTR_USB_ID;
195 mvotg->irq_status |= OTGSC_INTSTS_USB_ID;
198 otgsc = readl(&mvotg->op_regs->otgsc);
199 otgsc |= mvotg->irq_en;
200 writel(otgsc, &mvotg->op_regs->otgsc);
203 static void mv_otg_start_host(struct mv_otg *mvotg, int on)
205 #ifdef CONFIG_USB
206 struct otg_transceiver *otg = &mvotg->otg;
207 struct usb_hcd *hcd;
209 if (!otg->host)
210 return;
212 dev_info(&mvotg->pdev->dev, "%s host\n", on ? "start" : "stop");
214 hcd = bus_to_hcd(otg->host);
216 if (on)
217 usb_add_hcd(hcd, hcd->irq, IRQF_SHARED);
218 else
219 usb_remove_hcd(hcd);
220 #endif /* CONFIG_USB */
223 static void mv_otg_start_periphrals(struct mv_otg *mvotg, int on)
225 struct otg_transceiver *otg = &mvotg->otg;
227 if (!otg->gadget)
228 return;
230 dev_info(otg->dev, "gadget %s\n", on ? "on" : "off");
232 if (on)
233 usb_gadget_vbus_connect(otg->gadget);
234 else
235 usb_gadget_vbus_disconnect(otg->gadget);
238 static void otg_clock_enable(struct mv_otg *mvotg)
240 unsigned int i;
242 for (i = 0; i < mvotg->clknum; i++)
243 clk_enable(mvotg->clk[i]);
246 static void otg_clock_disable(struct mv_otg *mvotg)
248 unsigned int i;
250 for (i = 0; i < mvotg->clknum; i++)
251 clk_disable(mvotg->clk[i]);
254 static int mv_otg_enable_internal(struct mv_otg *mvotg)
256 int retval = 0;
258 if (mvotg->active)
259 return 0;
261 dev_dbg(&mvotg->pdev->dev, "otg enabled\n");
263 otg_clock_enable(mvotg);
264 if (mvotg->pdata->phy_init) {
265 retval = mvotg->pdata->phy_init(mvotg->phy_regs);
266 if (retval) {
267 dev_err(&mvotg->pdev->dev,
268 "init phy error %d\n", retval);
269 otg_clock_disable(mvotg);
270 return retval;
273 mvotg->active = 1;
275 return 0;
279 static int mv_otg_enable(struct mv_otg *mvotg)
281 if (mvotg->clock_gating)
282 return mv_otg_enable_internal(mvotg);
284 return 0;
287 static void mv_otg_disable_internal(struct mv_otg *mvotg)
289 if (mvotg->active) {
290 dev_dbg(&mvotg->pdev->dev, "otg disabled\n");
291 if (mvotg->pdata->phy_deinit)
292 mvotg->pdata->phy_deinit(mvotg->phy_regs);
293 otg_clock_disable(mvotg);
294 mvotg->active = 0;
298 static void mv_otg_disable(struct mv_otg *mvotg)
300 if (mvotg->clock_gating)
301 mv_otg_disable_internal(mvotg);
304 static void mv_otg_update_inputs(struct mv_otg *mvotg)
306 struct mv_otg_ctrl *otg_ctrl = &mvotg->otg_ctrl;
307 u32 otgsc;
309 otgsc = readl(&mvotg->op_regs->otgsc);
311 if (mvotg->pdata->vbus) {
312 if (mvotg->pdata->vbus->poll() == VBUS_HIGH) {
313 otg_ctrl->b_sess_vld = 1;
314 otg_ctrl->b_sess_end = 0;
315 } else {
316 otg_ctrl->b_sess_vld = 0;
317 otg_ctrl->b_sess_end = 1;
319 } else {
320 otg_ctrl->b_sess_vld = !!(otgsc & OTGSC_STS_B_SESSION_VALID);
321 otg_ctrl->b_sess_end = !!(otgsc & OTGSC_STS_B_SESSION_END);
324 if (mvotg->pdata->id)
325 otg_ctrl->id = !!mvotg->pdata->id->poll();
326 else
327 otg_ctrl->id = !!(otgsc & OTGSC_STS_USB_ID);
329 if (mvotg->pdata->otg_force_a_bus_req && !otg_ctrl->id)
330 otg_ctrl->a_bus_req = 1;
332 otg_ctrl->a_sess_vld = !!(otgsc & OTGSC_STS_A_SESSION_VALID);
333 otg_ctrl->a_vbus_vld = !!(otgsc & OTGSC_STS_A_VBUS_VALID);
335 dev_dbg(&mvotg->pdev->dev, "%s: ", __func__);
336 dev_dbg(&mvotg->pdev->dev, "id %d\n", otg_ctrl->id);
337 dev_dbg(&mvotg->pdev->dev, "b_sess_vld %d\n", otg_ctrl->b_sess_vld);
338 dev_dbg(&mvotg->pdev->dev, "b_sess_end %d\n", otg_ctrl->b_sess_end);
339 dev_dbg(&mvotg->pdev->dev, "a_vbus_vld %d\n", otg_ctrl->a_vbus_vld);
340 dev_dbg(&mvotg->pdev->dev, "a_sess_vld %d\n", otg_ctrl->a_sess_vld);
343 static void mv_otg_update_state(struct mv_otg *mvotg)
345 struct mv_otg_ctrl *otg_ctrl = &mvotg->otg_ctrl;
346 struct otg_transceiver *otg = &mvotg->otg;
347 int old_state = otg->state;
349 switch (old_state) {
350 case OTG_STATE_UNDEFINED:
351 otg->state = OTG_STATE_B_IDLE;
352 /* FALL THROUGH */
353 case OTG_STATE_B_IDLE:
354 if (otg_ctrl->id == 0)
355 otg->state = OTG_STATE_A_IDLE;
356 else if (otg_ctrl->b_sess_vld)
357 otg->state = OTG_STATE_B_PERIPHERAL;
358 break;
359 case OTG_STATE_B_PERIPHERAL:
360 if (!otg_ctrl->b_sess_vld || otg_ctrl->id == 0)
361 otg->state = OTG_STATE_B_IDLE;
362 break;
363 case OTG_STATE_A_IDLE:
364 if (otg_ctrl->id)
365 otg->state = OTG_STATE_B_IDLE;
366 else if (!(otg_ctrl->a_bus_drop) &&
367 (otg_ctrl->a_bus_req || otg_ctrl->a_srp_det))
368 otg->state = OTG_STATE_A_WAIT_VRISE;
369 break;
370 case OTG_STATE_A_WAIT_VRISE:
371 if (otg_ctrl->a_vbus_vld)
372 otg->state = OTG_STATE_A_WAIT_BCON;
373 break;
374 case OTG_STATE_A_WAIT_BCON:
375 if (otg_ctrl->id || otg_ctrl->a_bus_drop
376 || otg_ctrl->a_wait_bcon_timeout) {
377 mv_otg_cancel_timer(mvotg, A_WAIT_BCON_TIMER);
378 mvotg->otg_ctrl.a_wait_bcon_timeout = 0;
379 otg->state = OTG_STATE_A_WAIT_VFALL;
380 otg_ctrl->a_bus_req = 0;
381 } else if (!otg_ctrl->a_vbus_vld) {
382 mv_otg_cancel_timer(mvotg, A_WAIT_BCON_TIMER);
383 mvotg->otg_ctrl.a_wait_bcon_timeout = 0;
384 otg->state = OTG_STATE_A_VBUS_ERR;
385 } else if (otg_ctrl->b_conn) {
386 mv_otg_cancel_timer(mvotg, A_WAIT_BCON_TIMER);
387 mvotg->otg_ctrl.a_wait_bcon_timeout = 0;
388 otg->state = OTG_STATE_A_HOST;
390 break;
391 case OTG_STATE_A_HOST:
392 if (otg_ctrl->id || !otg_ctrl->b_conn
393 || otg_ctrl->a_bus_drop)
394 otg->state = OTG_STATE_A_WAIT_BCON;
395 else if (!otg_ctrl->a_vbus_vld)
396 otg->state = OTG_STATE_A_VBUS_ERR;
397 break;
398 case OTG_STATE_A_WAIT_VFALL:
399 if (otg_ctrl->id
400 || (!otg_ctrl->b_conn && otg_ctrl->a_sess_vld)
401 || otg_ctrl->a_bus_req)
402 otg->state = OTG_STATE_A_IDLE;
403 break;
404 case OTG_STATE_A_VBUS_ERR:
405 if (otg_ctrl->id || otg_ctrl->a_clr_err
406 || otg_ctrl->a_bus_drop) {
407 otg_ctrl->a_clr_err = 0;
408 otg->state = OTG_STATE_A_WAIT_VFALL;
410 break;
411 default:
412 break;
416 static void mv_otg_work(struct work_struct *work)
418 struct mv_otg *mvotg;
419 struct otg_transceiver *otg;
420 int old_state;
422 mvotg = container_of((struct delayed_work *)work, struct mv_otg, work);
424 run:
425 /* work queue is single thread, or we need spin_lock to protect */
426 otg = &mvotg->otg;
427 old_state = otg->state;
429 if (!mvotg->active)
430 return;
432 mv_otg_update_inputs(mvotg);
433 mv_otg_update_state(mvotg);
435 if (old_state != otg->state) {
436 dev_info(&mvotg->pdev->dev, "change from state %s to %s\n",
437 state_string[old_state],
438 state_string[otg->state]);
440 switch (otg->state) {
441 case OTG_STATE_B_IDLE:
442 mvotg->otg.default_a = 0;
443 if (old_state == OTG_STATE_B_PERIPHERAL)
444 mv_otg_start_periphrals(mvotg, 0);
445 mv_otg_reset(mvotg);
446 mv_otg_disable(mvotg);
447 break;
448 case OTG_STATE_B_PERIPHERAL:
449 mv_otg_enable(mvotg);
450 mv_otg_start_periphrals(mvotg, 1);
451 break;
452 case OTG_STATE_A_IDLE:
453 mvotg->otg.default_a = 1;
454 mv_otg_enable(mvotg);
455 if (old_state == OTG_STATE_A_WAIT_VFALL)
456 mv_otg_start_host(mvotg, 0);
457 mv_otg_reset(mvotg);
458 break;
459 case OTG_STATE_A_WAIT_VRISE:
460 mv_otg_set_vbus(&mvotg->otg, 1);
461 break;
462 case OTG_STATE_A_WAIT_BCON:
463 if (old_state != OTG_STATE_A_HOST)
464 mv_otg_start_host(mvotg, 1);
465 mv_otg_set_timer(mvotg, A_WAIT_BCON_TIMER,
466 T_A_WAIT_BCON,
467 mv_otg_timer_await_bcon);
469 * Now, we directly enter A_HOST. So set b_conn = 1
470 * here. In fact, it need host driver to notify us.
472 mvotg->otg_ctrl.b_conn = 1;
473 break;
474 case OTG_STATE_A_HOST:
475 break;
476 case OTG_STATE_A_WAIT_VFALL:
478 * Now, we has exited A_HOST. So set b_conn = 0
479 * here. In fact, it need host driver to notify us.
481 mvotg->otg_ctrl.b_conn = 0;
482 mv_otg_set_vbus(&mvotg->otg, 0);
483 break;
484 case OTG_STATE_A_VBUS_ERR:
485 break;
486 default:
487 break;
489 goto run;
493 static irqreturn_t mv_otg_irq(int irq, void *dev)
495 struct mv_otg *mvotg = dev;
496 u32 otgsc;
498 otgsc = readl(&mvotg->op_regs->otgsc);
499 writel(otgsc, &mvotg->op_regs->otgsc);
502 * if we have vbus, then the vbus detection for B-device
503 * will be done by mv_otg_inputs_irq().
505 if (mvotg->pdata->vbus)
506 if ((otgsc & OTGSC_STS_USB_ID) &&
507 !(otgsc & OTGSC_INTSTS_USB_ID))
508 return IRQ_NONE;
510 if ((otgsc & mvotg->irq_status) == 0)
511 return IRQ_NONE;
513 mv_otg_run_state_machine(mvotg, 0);
515 return IRQ_HANDLED;
518 static irqreturn_t mv_otg_inputs_irq(int irq, void *dev)
520 struct mv_otg *mvotg = dev;
522 /* The clock may disabled at this time */
523 if (!mvotg->active) {
524 mv_otg_enable(mvotg);
525 mv_otg_init_irq(mvotg);
528 mv_otg_run_state_machine(mvotg, 0);
530 return IRQ_HANDLED;
533 static ssize_t
534 get_a_bus_req(struct device *dev, struct device_attribute *attr, char *buf)
536 struct mv_otg *mvotg = dev_get_drvdata(dev);
537 return scnprintf(buf, PAGE_SIZE, "%d\n",
538 mvotg->otg_ctrl.a_bus_req);
541 static ssize_t
542 set_a_bus_req(struct device *dev, struct device_attribute *attr,
543 const char *buf, size_t count)
545 struct mv_otg *mvotg = dev_get_drvdata(dev);
547 if (count > 2)
548 return -1;
550 /* We will use this interface to change to A device */
551 if (mvotg->otg.state != OTG_STATE_B_IDLE
552 && mvotg->otg.state != OTG_STATE_A_IDLE)
553 return -1;
555 /* The clock may disabled and we need to set irq for ID detected */
556 mv_otg_enable(mvotg);
557 mv_otg_init_irq(mvotg);
559 if (buf[0] == '1') {
560 mvotg->otg_ctrl.a_bus_req = 1;
561 mvotg->otg_ctrl.a_bus_drop = 0;
562 dev_dbg(&mvotg->pdev->dev,
563 "User request: a_bus_req = 1\n");
565 if (spin_trylock(&mvotg->wq_lock)) {
566 mv_otg_run_state_machine(mvotg, 0);
567 spin_unlock(&mvotg->wq_lock);
571 return count;
574 static DEVICE_ATTR(a_bus_req, S_IRUGO | S_IWUSR, get_a_bus_req,
575 set_a_bus_req);
577 static ssize_t
578 set_a_clr_err(struct device *dev, struct device_attribute *attr,
579 const char *buf, size_t count)
581 struct mv_otg *mvotg = dev_get_drvdata(dev);
582 if (!mvotg->otg.default_a)
583 return -1;
585 if (count > 2)
586 return -1;
588 if (buf[0] == '1') {
589 mvotg->otg_ctrl.a_clr_err = 1;
590 dev_dbg(&mvotg->pdev->dev,
591 "User request: a_clr_err = 1\n");
594 if (spin_trylock(&mvotg->wq_lock)) {
595 mv_otg_run_state_machine(mvotg, 0);
596 spin_unlock(&mvotg->wq_lock);
599 return count;
602 static DEVICE_ATTR(a_clr_err, S_IWUSR, NULL, set_a_clr_err);
604 static ssize_t
605 get_a_bus_drop(struct device *dev, struct device_attribute *attr,
606 char *buf)
608 struct mv_otg *mvotg = dev_get_drvdata(dev);
609 return scnprintf(buf, PAGE_SIZE, "%d\n",
610 mvotg->otg_ctrl.a_bus_drop);
613 static ssize_t
614 set_a_bus_drop(struct device *dev, struct device_attribute *attr,
615 const char *buf, size_t count)
617 struct mv_otg *mvotg = dev_get_drvdata(dev);
618 if (!mvotg->otg.default_a)
619 return -1;
621 if (count > 2)
622 return -1;
624 if (buf[0] == '0') {
625 mvotg->otg_ctrl.a_bus_drop = 0;
626 dev_dbg(&mvotg->pdev->dev,
627 "User request: a_bus_drop = 0\n");
628 } else if (buf[0] == '1') {
629 mvotg->otg_ctrl.a_bus_drop = 1;
630 mvotg->otg_ctrl.a_bus_req = 0;
631 dev_dbg(&mvotg->pdev->dev,
632 "User request: a_bus_drop = 1\n");
633 dev_dbg(&mvotg->pdev->dev,
634 "User request: and a_bus_req = 0\n");
637 if (spin_trylock(&mvotg->wq_lock)) {
638 mv_otg_run_state_machine(mvotg, 0);
639 spin_unlock(&mvotg->wq_lock);
642 return count;
645 static DEVICE_ATTR(a_bus_drop, S_IRUGO | S_IWUSR,
646 get_a_bus_drop, set_a_bus_drop);
648 static struct attribute *inputs_attrs[] = {
649 &dev_attr_a_bus_req.attr,
650 &dev_attr_a_clr_err.attr,
651 &dev_attr_a_bus_drop.attr,
652 NULL,
655 static struct attribute_group inputs_attr_group = {
656 .name = "inputs",
657 .attrs = inputs_attrs,
660 int mv_otg_remove(struct platform_device *pdev)
662 struct mv_otg *mvotg = platform_get_drvdata(pdev);
663 int clk_i;
665 sysfs_remove_group(&mvotg->pdev->dev.kobj, &inputs_attr_group);
667 if (mvotg->irq)
668 free_irq(mvotg->irq, mvotg);
670 if (mvotg->pdata->vbus)
671 free_irq(mvotg->pdata->vbus->irq, mvotg);
672 if (mvotg->pdata->id)
673 free_irq(mvotg->pdata->id->irq, mvotg);
675 if (mvotg->qwork) {
676 flush_workqueue(mvotg->qwork);
677 destroy_workqueue(mvotg->qwork);
680 mv_otg_disable(mvotg);
682 if (mvotg->cap_regs)
683 iounmap(mvotg->cap_regs);
685 if (mvotg->phy_regs)
686 iounmap(mvotg->phy_regs);
688 for (clk_i = 0; clk_i <= mvotg->clknum; clk_i++)
689 clk_put(mvotg->clk[clk_i]);
691 otg_set_transceiver(NULL);
692 platform_set_drvdata(pdev, NULL);
694 kfree(mvotg);
696 return 0;
699 static int mv_otg_probe(struct platform_device *pdev)
701 struct mv_usb_platform_data *pdata = pdev->dev.platform_data;
702 struct mv_otg *mvotg;
703 struct resource *r;
704 int retval = 0, clk_i, i;
705 size_t size;
707 if (pdata == NULL) {
708 dev_err(&pdev->dev, "failed to get platform data\n");
709 return -ENODEV;
712 size = sizeof(*mvotg) + sizeof(struct clk *) * pdata->clknum;
713 mvotg = kzalloc(size, GFP_KERNEL);
714 if (!mvotg) {
715 dev_err(&pdev->dev, "failed to allocate memory!\n");
716 return -ENOMEM;
719 platform_set_drvdata(pdev, mvotg);
721 mvotg->pdev = pdev;
722 mvotg->pdata = pdata;
724 mvotg->clknum = pdata->clknum;
725 for (clk_i = 0; clk_i < mvotg->clknum; clk_i++) {
726 mvotg->clk[clk_i] = clk_get(&pdev->dev, pdata->clkname[clk_i]);
727 if (IS_ERR(mvotg->clk[clk_i])) {
728 retval = PTR_ERR(mvotg->clk[clk_i]);
729 goto err_put_clk;
733 mvotg->qwork = create_singlethread_workqueue("mv_otg_queue");
734 if (!mvotg->qwork) {
735 dev_dbg(&pdev->dev, "cannot create workqueue for OTG\n");
736 retval = -ENOMEM;
737 goto err_put_clk;
740 INIT_DELAYED_WORK(&mvotg->work, mv_otg_work);
742 /* OTG common part */
743 mvotg->pdev = pdev;
744 mvotg->otg.dev = &pdev->dev;
745 mvotg->otg.label = driver_name;
746 mvotg->otg.set_host = mv_otg_set_host;
747 mvotg->otg.set_peripheral = mv_otg_set_peripheral;
748 mvotg->otg.set_vbus = mv_otg_set_vbus;
749 mvotg->otg.state = OTG_STATE_UNDEFINED;
751 for (i = 0; i < OTG_TIMER_NUM; i++)
752 init_timer(&mvotg->otg_ctrl.timer[i]);
754 r = platform_get_resource_byname(mvotg->pdev,
755 IORESOURCE_MEM, "phyregs");
756 if (r == NULL) {
757 dev_err(&pdev->dev, "no phy I/O memory resource defined\n");
758 retval = -ENODEV;
759 goto err_destroy_workqueue;
762 mvotg->phy_regs = ioremap(r->start, resource_size(r));
763 if (mvotg->phy_regs == NULL) {
764 dev_err(&pdev->dev, "failed to map phy I/O memory\n");
765 retval = -EFAULT;
766 goto err_destroy_workqueue;
769 r = platform_get_resource_byname(mvotg->pdev,
770 IORESOURCE_MEM, "capregs");
771 if (r == NULL) {
772 dev_err(&pdev->dev, "no I/O memory resource defined\n");
773 retval = -ENODEV;
774 goto err_unmap_phyreg;
777 mvotg->cap_regs = ioremap(r->start, resource_size(r));
778 if (mvotg->cap_regs == NULL) {
779 dev_err(&pdev->dev, "failed to map I/O memory\n");
780 retval = -EFAULT;
781 goto err_unmap_phyreg;
784 /* we will acces controller register, so enable the udc controller */
785 retval = mv_otg_enable_internal(mvotg);
786 if (retval) {
787 dev_err(&pdev->dev, "mv otg enable error %d\n", retval);
788 goto err_unmap_capreg;
791 mvotg->op_regs =
792 (struct mv_otg_regs __iomem *) ((unsigned long) mvotg->cap_regs
793 + (readl(mvotg->cap_regs) & CAPLENGTH_MASK));
795 if (pdata->id) {
796 retval = request_threaded_irq(pdata->id->irq, NULL,
797 mv_otg_inputs_irq,
798 IRQF_ONESHOT, "id", mvotg);
799 if (retval) {
800 dev_info(&pdev->dev,
801 "Failed to request irq for ID\n");
802 pdata->id = NULL;
806 if (pdata->vbus) {
807 mvotg->clock_gating = 1;
808 retval = request_threaded_irq(pdata->vbus->irq, NULL,
809 mv_otg_inputs_irq,
810 IRQF_ONESHOT, "vbus", mvotg);
811 if (retval) {
812 dev_info(&pdev->dev,
813 "Failed to request irq for VBUS, "
814 "disable clock gating\n");
815 mvotg->clock_gating = 0;
816 pdata->vbus = NULL;
820 if (pdata->disable_otg_clock_gating)
821 mvotg->clock_gating = 0;
823 mv_otg_reset(mvotg);
824 mv_otg_init_irq(mvotg);
826 r = platform_get_resource(mvotg->pdev, IORESOURCE_IRQ, 0);
827 if (r == NULL) {
828 dev_err(&pdev->dev, "no IRQ resource defined\n");
829 retval = -ENODEV;
830 goto err_disable_clk;
833 mvotg->irq = r->start;
834 if (request_irq(mvotg->irq, mv_otg_irq, IRQF_SHARED,
835 driver_name, mvotg)) {
836 dev_err(&pdev->dev, "Request irq %d for OTG failed\n",
837 mvotg->irq);
838 mvotg->irq = 0;
839 retval = -ENODEV;
840 goto err_disable_clk;
843 retval = otg_set_transceiver(&mvotg->otg);
844 if (retval < 0) {
845 dev_err(&pdev->dev, "can't register transceiver, %d\n",
846 retval);
847 goto err_free_irq;
850 retval = sysfs_create_group(&pdev->dev.kobj, &inputs_attr_group);
851 if (retval < 0) {
852 dev_dbg(&pdev->dev,
853 "Can't register sysfs attr group: %d\n", retval);
854 goto err_set_transceiver;
857 spin_lock_init(&mvotg->wq_lock);
858 if (spin_trylock(&mvotg->wq_lock)) {
859 mv_otg_run_state_machine(mvotg, 2 * HZ);
860 spin_unlock(&mvotg->wq_lock);
863 dev_info(&pdev->dev,
864 "successful probe OTG device %s clock gating.\n",
865 mvotg->clock_gating ? "with" : "without");
867 return 0;
869 err_set_transceiver:
870 otg_set_transceiver(NULL);
871 err_free_irq:
872 free_irq(mvotg->irq, mvotg);
873 err_disable_clk:
874 if (pdata->vbus)
875 free_irq(pdata->vbus->irq, mvotg);
876 if (pdata->id)
877 free_irq(pdata->id->irq, mvotg);
878 mv_otg_disable_internal(mvotg);
879 err_unmap_capreg:
880 iounmap(mvotg->cap_regs);
881 err_unmap_phyreg:
882 iounmap(mvotg->phy_regs);
883 err_destroy_workqueue:
884 flush_workqueue(mvotg->qwork);
885 destroy_workqueue(mvotg->qwork);
886 err_put_clk:
887 for (clk_i--; clk_i >= 0; clk_i--)
888 clk_put(mvotg->clk[clk_i]);
890 platform_set_drvdata(pdev, NULL);
891 kfree(mvotg);
893 return retval;
896 #ifdef CONFIG_PM
897 static int mv_otg_suspend(struct platform_device *pdev, pm_message_t state)
899 struct mv_otg *mvotg = platform_get_drvdata(pdev);
901 if (mvotg->otg.state != OTG_STATE_B_IDLE) {
902 dev_info(&pdev->dev,
903 "OTG state is not B_IDLE, it is %d!\n",
904 mvotg->otg.state);
905 return -EAGAIN;
908 if (!mvotg->clock_gating)
909 mv_otg_disable_internal(mvotg);
911 return 0;
914 static int mv_otg_resume(struct platform_device *pdev)
916 struct mv_otg *mvotg = platform_get_drvdata(pdev);
917 u32 otgsc;
919 if (!mvotg->clock_gating) {
920 mv_otg_enable_internal(mvotg);
922 otgsc = readl(&mvotg->op_regs->otgsc);
923 otgsc |= mvotg->irq_en;
924 writel(otgsc, &mvotg->op_regs->otgsc);
926 if (spin_trylock(&mvotg->wq_lock)) {
927 mv_otg_run_state_machine(mvotg, 0);
928 spin_unlock(&mvotg->wq_lock);
931 return 0;
933 #endif
935 static struct platform_driver mv_otg_driver = {
936 .probe = mv_otg_probe,
937 .remove = __exit_p(mv_otg_remove),
938 .driver = {
939 .owner = THIS_MODULE,
940 .name = driver_name,
942 #ifdef CONFIG_PM
943 .suspend = mv_otg_suspend,
944 .resume = mv_otg_resume,
945 #endif
948 static int __init mv_otg_init(void)
950 return platform_driver_register(&mv_otg_driver);
953 static void __exit mv_otg_exit(void)
955 platform_driver_unregister(&mv_otg_driver);
958 module_init(mv_otg_init);
959 module_exit(mv_otg_exit);