drivers/gpu/drm/radeon/radeon_irq_kms.c

   1 /*
   2  * Copyright 2008 Advanced Micro Devices, Inc.
   3  * Copyright 2008 Red Hat Inc.
   4  * Copyright 2009 Jerome Glisse.
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a
   7  * copy of this software and associated documentation files (the "Software"),
   8  * to deal in the Software without restriction, including without limitation
   9  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  10  * and/or sell copies of the Software, and to permit persons to whom the
  11  * Software is furnished to do so, subject to the following conditions:
  12  *
  13  * The above copyright notice and this permission notice shall be included in
  14  * all copies or substantial portions of the Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  19  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  20  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  21  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  22  * OTHER DEALINGS IN THE SOFTWARE.
  23  *
  24  * Authors: Dave Airlie
  25  *          Alex Deucher
  26  *          Jerome Glisse
  27  */
  28 #include "drmP.h"
  29 #include "drm_crtc_helper.h"
  30 #include "radeon_drm.h"
  31 #include "radeon_reg.h"
  32 #include "radeon.h"
  33 #include "atom.h"
  34
  35 irqreturn_t radeon_driver_irq_handler_kms(DRM_IRQ_ARGS)
  36 {
  37         struct drm_device *dev = (struct drm_device *) arg;
  38         struct radeon_device *rdev = dev->dev_private;
  39
  40         return radeon_irq_process(rdev);
  41 }
  42
  43 /*
  44  * Handle hotplug events outside the interrupt handler proper.
  45  */
  46 static void radeon_hotplug_work_func(struct work_struct *work)
  47 {
  48         struct radeon_device *rdev = container_of(work, struct radeon_device,
  49                                                   hotplug_work);
  50         struct drm_device *dev = rdev->ddev;
  51         struct drm_mode_config *mode_config = &dev->mode_config;
  52         struct drm_connector *connector;
  53
  54         if (mode_config->num_connector) {
  55                 list_for_each_entry(connector, &mode_config->connector_list, head)
  56                         radeon_connector_hotplug(connector);
  57         }
  58         /* Just fire off a uevent and let userspace tell us what to do */
  59         drm_helper_hpd_irq_event(dev);
  60 }
  61
  62 void radeon_driver_irq_preinstall_kms(struct drm_device *dev)
  63 {
  64         struct radeon_device *rdev = dev->dev_private;
  65         unsigned i;
  66
  67         /* Disable *all* interrupts */
  68         rdev->irq.sw_int = false;
  69         rdev->irq.gui_idle = false;
  70         for (i = 0; i < RADEON_MAX_HPD_PINS; i++)
  71                 rdev->irq.hpd[i] = false;
  72         for (i = 0; i < RADEON_MAX_CRTCS; i++) {
  73                 rdev->irq.crtc_vblank_int[i] = false;
  74                 rdev->irq.pflip[i] = false;
  75         }
  76         radeon_irq_set(rdev);
  77         /* Clear bits */
  78         radeon_irq_process(rdev);
  79 }
  80
  81 int radeon_driver_irq_postinstall_kms(struct drm_device *dev)
  82 {
  83         struct radeon_device *rdev = dev->dev_private;
  84
  85         dev->max_vblank_count = 0x001fffff;
  86         rdev->irq.sw_int = true;
  87         radeon_irq_set(rdev);
  88         return 0;
  89 }
  90
  91 void radeon_driver_irq_uninstall_kms(struct drm_device *dev)
  92 {
  93         struct radeon_device *rdev = dev->dev_private;
  94         unsigned i;
  95
  96         if (rdev == NULL) {
  97                 return;
  98         }
  99         /* Disable *all* interrupts */
 100         rdev->irq.sw_int = false;
 101         rdev->irq.gui_idle = false;
 102         for (i = 0; i < RADEON_MAX_HPD_PINS; i++)
 103                 rdev->irq.hpd[i] = false;
 104         for (i = 0; i < RADEON_MAX_CRTCS; i++) {
 105                 rdev->irq.crtc_vblank_int[i] = false;
 106                 rdev->irq.pflip[i] = false;
 107         }
 108         radeon_irq_set(rdev);
 109 }
 110
 111 static bool radeon_msi_ok(struct radeon_device *rdev)
 112 {
 113         /* RV370/RV380 was first asic with MSI support */
 114         if (rdev->family < CHIP_RV380)
 115                 return false;
 116
 117         /* MSIs don't work on AGP */
 118         if (rdev->flags & RADEON_IS_AGP)
 119                 return false;
 120
 121         /* force MSI on */
 122         if (radeon_msi == 1)
 123                 return true;
 124         else if (radeon_msi == 0)
 125                 return false;
 126
 127         /* Quirks */
 128         /* HP RS690 only seems to work with MSIs. */
 129         if ((rdev->pdev->device == 0x791f) &&
 130             (rdev->pdev->subsystem_vendor == 0x103c) &&
 131             (rdev->pdev->subsystem_device == 0x30c2))
 132                 return true;
 133
 134         /* Dell RS690 only seems to work with MSIs. */
 135         if ((rdev->pdev->device == 0x791f) &&
 136             (rdev->pdev->subsystem_vendor == 0x1028) &&
 137             (rdev->pdev->subsystem_device == 0x01fd))
 138                 return true;
 139
 140         if (rdev->flags & RADEON_IS_IGP) {
 141                 /* APUs work fine with MSIs */
 142                 if (rdev->family >= CHIP_PALM)
 143                         return true;
 144                 /* lots of IGPs have problems with MSIs */
 145                 return false;
 146         }
 147
 148         return true;
 149 }
 150
 151 int radeon_irq_kms_init(struct radeon_device *rdev)
 152 {
 153         int i;
 154         int r = 0;
 155
 156         INIT_WORK(&rdev->hotplug_work, radeon_hotplug_work_func);
 157
 158         spin_lock_init(&rdev->irq.sw_lock);
 159         for (i = 0; i < rdev->num_crtc; i++)
 160                 spin_lock_init(&rdev->irq.pflip_lock[i]);
 161         r = drm_vblank_init(rdev->ddev, rdev->num_crtc);
 162         if (r) {
 163                 return r;
 164         }
 165         /* enable msi */
 166         rdev->msi_enabled = 0;
 167
 168         if (radeon_msi_ok(rdev)) {
 169                 int ret = pci_enable_msi(rdev->pdev);
 170                 if (!ret) {
 171                         rdev->msi_enabled = 1;
 172                         dev_info(rdev->dev, "radeon: using MSI.\n");
 173                 }
 174         }
 175         rdev->irq.installed = true;
 176         r = drm_irq_install(rdev->ddev);
 177         if (r) {
 178                 rdev->irq.installed = false;
 179                 return r;
 180         }
 181         DRM_INFO("radeon: irq initialized.\n");
 182         return 0;
 183 }
 184
 185 void radeon_irq_kms_fini(struct radeon_device *rdev)
 186 {
 187         drm_vblank_cleanup(rdev->ddev);
 188         if (rdev->irq.installed) {
 189                 drm_irq_uninstall(rdev->ddev);
 190                 rdev->irq.installed = false;
 191                 if (rdev->msi_enabled)
 192                         pci_disable_msi(rdev->pdev);
 193         }
 194         flush_work_sync(&rdev->hotplug_work);
 195 }
 196
 197 void radeon_irq_kms_sw_irq_get(struct radeon_device *rdev)
 198 {
 199         unsigned long irqflags;
 200
 201         spin_lock_irqsave(&rdev->irq.sw_lock, irqflags);
 202         if (rdev->ddev->irq_enabled && (++rdev->irq.sw_refcount == 1)) {
 203                 rdev->irq.sw_int = true;
 204                 radeon_irq_set(rdev);
 205         }
 206         spin_unlock_irqrestore(&rdev->irq.sw_lock, irqflags);
 207 }
 208
 209 void radeon_irq_kms_sw_irq_put(struct radeon_device *rdev)
 210 {
 211         unsigned long irqflags;
 212
 213         spin_lock_irqsave(&rdev->irq.sw_lock, irqflags);
 214         BUG_ON(rdev->ddev->irq_enabled && rdev->irq.sw_refcount <= 0);
 215         if (rdev->ddev->irq_enabled && (--rdev->irq.sw_refcount == 0)) {
 216                 rdev->irq.sw_int = false;
 217                 radeon_irq_set(rdev);
 218         }
 219         spin_unlock_irqrestore(&rdev->irq.sw_lock, irqflags);
 220 }
 221
 222 void radeon_irq_kms_pflip_irq_get(struct radeon_device *rdev, int crtc)
 223 {
 224         unsigned long irqflags;
 225
 226         if (crtc < 0 || crtc >= rdev->num_crtc)
 227                 return;
 228
 229         spin_lock_irqsave(&rdev->irq.pflip_lock[crtc], irqflags);
 230         if (rdev->ddev->irq_enabled && (++rdev->irq.pflip_refcount[crtc] == 1)) {
 231                 rdev->irq.pflip[crtc] = true;
 232                 radeon_irq_set(rdev);
 233         }
 234         spin_unlock_irqrestore(&rdev->irq.pflip_lock[crtc], irqflags);
 235 }
 236
 237 void radeon_irq_kms_pflip_irq_put(struct radeon_device *rdev, int crtc)
 238 {
 239         unsigned long irqflags;
 240
 241         if (crtc < 0 || crtc >= rdev->num_crtc)
 242                 return;
 243
 244         spin_lock_irqsave(&rdev->irq.pflip_lock[crtc], irqflags);
 245         BUG_ON(rdev->ddev->irq_enabled && rdev->irq.pflip_refcount[crtc] <= 0);
 246         if (rdev->ddev->irq_enabled && (--rdev->irq.pflip_refcount[crtc] == 0)) {
 247                 rdev->irq.pflip[crtc] = false;
 248                 radeon_irq_set(rdev);
 249         }
 250         spin_unlock_irqrestore(&rdev->irq.pflip_lock[crtc], irqflags);
 251 }
 252