drivers/crypto/amcc/crypto4xx_core.h

   1 /**
   2  * AMCC SoC PPC4xx Crypto Driver
   3  *
   4  * Copyright (c) 2008 Applied Micro Circuits Corporation.
   5  * All rights reserved. James Hsiao <jhsiao@amcc.com>
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License as published by
   9  * the Free Software Foundation; either version 2 of the License, or
  10  * (at your option) any later version.
  11  *
  12  * This program is distributed in the hope that it will be useful,
  13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15  * GNU General Public License for more details.
  16  *
  17  * This is the header file for AMCC Crypto offload Linux device driver for
  18  * use with Linux CryptoAPI.
  19
  20  */
  21
  22 #ifndef __CRYPTO4XX_CORE_H__
  23 #define __CRYPTO4XX_CORE_H__
  24
  25 #define PPC460SX_SDR0_SRST                      0x201
  26 #define PPC405EX_SDR0_SRST                      0x200
  27 #define PPC460EX_SDR0_SRST                      0x201
  28 #define PPC460EX_CE_RESET                       0x08000000
  29 #define PPC460SX_CE_RESET                       0x20000000
  30 #define PPC405EX_CE_RESET                       0x00000008
  31
  32 #define CRYPTO4XX_CRYPTO_PRIORITY               300
  33 #define PPC4XX_LAST_PD                          63
  34 #define PPC4XX_NUM_PD                           64
  35 #define PPC4XX_LAST_GD                          1023
  36 #define PPC4XX_NUM_GD                           1024
  37 #define PPC4XX_LAST_SD                          63
  38 #define PPC4XX_NUM_SD                           64
  39 #define PPC4XX_SD_BUFFER_SIZE                   2048
  40
  41 #define PD_ENTRY_INUSE                          1
  42 #define PD_ENTRY_FREE                           0
  43 #define ERING_WAS_FULL                          0xffffffff
  44
  45 struct crypto4xx_device;
  46
  47 struct pd_uinfo {
  48         struct crypto4xx_device *dev;
  49         u32   state;
  50         u32 using_sd;
  51         u32 first_gd;           /* first gather discriptor
  52                                 used by this packet */
  53         u32 num_gd;             /* number of gather discriptor
  54                                 used by this packet */
  55         u32 first_sd;           /* first scatter discriptor
  56                                 used by this packet */
  57         u32 num_sd;             /* number of scatter discriptors
  58                                 used by this packet */
  59         void *sa_va;            /* shadow sa, when using cp from ctx->sa */
  60         u32 sa_pa;
  61         void *sr_va;            /* state record for shadow sa */
  62         u32 sr_pa;
  63         struct scatterlist *dest_va;
  64         struct crypto_async_request *async_req;         /* base crypto request
  65                                                         for this packet */
  66 };
  67
  68 struct crypto4xx_device {
  69         struct crypto4xx_core_device *core_dev;
  70         char *name;
  71         u64  ce_phy_address;
  72         void __iomem *ce_base;
  73
  74         void *pdr;                      /* base address of packet
  75                                         descriptor ring */
  76         dma_addr_t pdr_pa;              /* physical address used to
  77                                         program ce pdr_base_register */
  78         void *gdr;                      /* gather descriptor ring */
  79         dma_addr_t gdr_pa;              /* physical address used to
  80                                         program ce gdr_base_register */
  81         void *sdr;                      /* scatter descriptor ring */
  82         dma_addr_t sdr_pa;              /* physical address used to
  83                                         program ce sdr_base_register */
  84         void *scatter_buffer_va;
  85         dma_addr_t scatter_buffer_pa;
  86         u32 scatter_buffer_size;
  87
  88         void *shadow_sa_pool;           /* pool of memory for sa in pd_uinfo */
  89         dma_addr_t shadow_sa_pool_pa;
  90         void *shadow_sr_pool;           /* pool of memory for sr in pd_uinfo */
  91         dma_addr_t shadow_sr_pool_pa;
  92         u32 pdr_tail;
  93         u32 pdr_head;
  94         u32 gdr_tail;
  95         u32 gdr_head;
  96         u32 sdr_tail;
  97         u32 sdr_head;
  98         void *pdr_uinfo;
  99         struct list_head alg_list;      /* List of algorithm supported
 100                                         by this device */
 101 };
 102
 103 struct crypto4xx_core_device {
 104         struct device *device;
 105         struct of_device *ofdev;
 106         struct crypto4xx_device *dev;
 107         u32 int_status;
 108         u32 irq;
 109         struct tasklet_struct tasklet;
 110         spinlock_t lock;
 111 };
 112
 113 struct crypto4xx_ctx {
 114         struct crypto4xx_device *dev;
 115         void *sa_in;
 116         dma_addr_t sa_in_dma_addr;
 117         void *sa_out;
 118         dma_addr_t sa_out_dma_addr;
 119         void *state_record;
 120         dma_addr_t state_record_dma_addr;
 121         u32 sa_len;
 122         u32 offset_to_sr_ptr;           /* offset to state ptr, in dynamic sa */
 123         u32 direction;
 124         u32 next_hdr;
 125         u32 save_iv;
 126         u32 pd_ctl_len;
 127         u32 pd_ctl;
 128         u32 bypass;
 129         u32 is_hash;
 130         u32 hash_final;
 131 };
 132
 133 struct crypto4xx_req_ctx {
 134         struct crypto4xx_device *dev;   /* Device in which
 135                                         operation to send to */
 136         void *sa;
 137         u32 sa_dma_addr;
 138         u16 sa_len;
 139 };
 140
 141 struct crypto4xx_alg {
 142         struct list_head  entry;
 143         struct crypto_alg alg;
 144         struct crypto4xx_device *dev;
 145 };
 146
 147 #define crypto_alg_to_crypto4xx_alg(x) \
 148                 container_of(x, struct crypto4xx_alg, alg)
 149
 150 extern int crypto4xx_alloc_sa(struct crypto4xx_ctx *ctx, u32 size);
 151 extern void crypto4xx_free_sa(struct crypto4xx_ctx *ctx);
 152 extern u32 crypto4xx_alloc_sa_rctx(struct crypto4xx_ctx *ctx,
 153                                    struct crypto4xx_ctx *rctx);
 154 extern void crypto4xx_free_sa_rctx(struct crypto4xx_ctx *rctx);
 155 extern void crypto4xx_free_ctx(struct crypto4xx_ctx *ctx);
 156 extern u32 crypto4xx_alloc_state_record(struct crypto4xx_ctx *ctx);
 157 extern u32 get_dynamic_sa_offset_state_ptr_field(struct crypto4xx_ctx *ctx);
 158 extern u32 get_dynamic_sa_offset_key_field(struct crypto4xx_ctx *ctx);
 159 extern u32 get_dynamic_sa_iv_size(struct crypto4xx_ctx *ctx);
 160 extern void crypto4xx_memcpy_le(unsigned int *dst,
 161                                 const unsigned char *buf, int len);
 162 extern u32 crypto4xx_build_pd(struct crypto_async_request *req,
 163                               struct crypto4xx_ctx *ctx,
 164                               struct scatterlist *src,
 165                               struct scatterlist *dst,
 166                               unsigned int datalen,
 167                               void *iv, u32 iv_len);
 168 extern int crypto4xx_setkey_aes_cbc(struct crypto_ablkcipher *cipher,
 169                                     const u8 *key, unsigned int keylen);
 170 extern int crypto4xx_encrypt(struct ablkcipher_request *req);
 171 extern int crypto4xx_decrypt(struct ablkcipher_request *req);
 172 extern int crypto4xx_sha1_alg_init(struct crypto_tfm *tfm);
 173 extern int crypto4xx_hash_digest(struct ahash_request *req);
 174 extern int crypto4xx_hash_final(struct ahash_request *req);
 175 extern int crypto4xx_hash_update(struct ahash_request *req);
 176 extern int crypto4xx_hash_init(struct ahash_request *req);
 177 #endif