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powerpc: use consistent types in mktree
[zen-stable.git] / drivers / media / video / cx88 / cx88-dvb.c
blobe237b507659ba82bc45a03022245118ef41fce2b
1 /*
2 *
3 * device driver for Conexant 2388x based TV cards
4 * MPEG Transport Stream (DVB) routines
5 *
6 * (c) 2004, 2005 Chris Pascoe <c.pascoe@itee.uq.edu.au>
7 * (c) 2004 Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
22 */
23
24 #include <linux/module.h>
25 #include <linux/init.h>
26 #include <linux/device.h>
27 #include <linux/fs.h>
28 #include <linux/kthread.h>
29 #include <linux/file.h>
30 #include <linux/suspend.h>
31
32 #include "cx88.h"
33 #include "dvb-pll.h"
34 #include <media/v4l2-common.h>
35
36 #include "mt352.h"
37 #include "mt352_priv.h"
38 #include "cx88-vp3054-i2c.h"
39 #include "zl10353.h"
40 #include "cx22702.h"
41 #include "or51132.h"
42 #include "lgdt330x.h"
43 #include "s5h1409.h"
44 #include "xc5000.h"
45 #include "nxt200x.h"
46 #include "cx24123.h"
47 #include "isl6421.h"
48 #include "tuner-simple.h"
49 #include "tda9887.h"
50 #include "s5h1411.h"
51 #include "stv0299.h"
52 #include "z0194a.h"
53 #include "stv0288.h"
54 #include "stb6000.h"
55 #include "cx24116.h"
56
57 MODULE_DESCRIPTION("driver for cx2388x based DVB cards");
58 MODULE_AUTHOR("Chris Pascoe <c.pascoe@itee.uq.edu.au>");
59 MODULE_AUTHOR("Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]");
60 MODULE_LICENSE("GPL");
61
62 static unsigned int debug;
63 module_param(debug, int, 0644);
64 MODULE_PARM_DESC(debug,"enable debug messages [dvb]");
65
66 DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr);
67
68 #define dprintk(level,fmt, arg...) if (debug >= level) \
69 printk(KERN_DEBUG "%s/2-dvb: " fmt, core->name, ## arg)
70
71 /* ------------------------------------------------------------------ */
72
73 static int dvb_buf_setup(struct videobuf_queue *q,
74 unsigned int *count, unsigned int *size)
75 {
76 struct cx8802_dev *dev = q->priv_data;
77
78 dev->ts_packet_size = 188 * 4;
79 dev->ts_packet_count = 32;
80
81 *size = dev->ts_packet_size * dev->ts_packet_count;
82 *count = 32;
83 return 0;
84 }
85
86 static int dvb_buf_prepare(struct videobuf_queue *q,
87 struct videobuf_buffer *vb, enum v4l2_field field)
88 {
89 struct cx8802_dev *dev = q->priv_data;
90 return cx8802_buf_prepare(q, dev, (struct cx88_buffer*)vb,field);
91 }
92
93 static void dvb_buf_queue(struct videobuf_queue *q, struct videobuf_buffer *vb)
94 {
95 struct cx8802_dev *dev = q->priv_data;
96 cx8802_buf_queue(dev, (struct cx88_buffer*)vb);
97 }
98
99 static void dvb_buf_release(struct videobuf_queue *q,
100 struct videobuf_buffer *vb)
101 {
102 cx88_free_buffer(q, (struct cx88_buffer*)vb);
103 }
104
105 static struct videobuf_queue_ops dvb_qops = {
106 .buf_setup = dvb_buf_setup,
107 .buf_prepare = dvb_buf_prepare,
108 .buf_queue = dvb_buf_queue,
109 .buf_release = dvb_buf_release,
110 };
111
112 /* ------------------------------------------------------------------ */
113
114 static int cx88_dvb_bus_ctrl(struct dvb_frontend* fe, int acquire)
115 {
116 struct cx8802_dev *dev= fe->dvb->priv;
117 struct cx8802_driver *drv = NULL;
118 int ret = 0;
119 int fe_id;
120
121 fe_id = videobuf_dvb_find_frontend(&dev->frontends, fe);
122 if (!fe_id) {
123 printk(KERN_ERR "%s() No frontend found\n", __func__);
124 return -EINVAL;
125 }
126
127 drv = cx8802_get_driver(dev, CX88_MPEG_DVB);
128 if (drv) {
129 if (acquire){
130 dev->frontends.active_fe_id = fe_id;
131 ret = drv->request_acquire(drv);
132 } else {
133 ret = drv->request_release(drv);
134 dev->frontends.active_fe_id = 0;
135 }
136 }
137
138 return ret;
139 }
140
141 static void cx88_dvb_gate_ctrl(struct cx88_core *core, int open)
142 {
143 struct videobuf_dvb_frontends *f;
144 struct videobuf_dvb_frontend *fe;
145
146 if (!core->dvbdev)
147 return;
148
149 f = &core->dvbdev->frontends;
150
151 if (!f)
152 return;
153
154 if (f->gate <= 1) /* undefined or fe0 */
155 fe = videobuf_dvb_get_frontend(f, 1);
156 else
157 fe = videobuf_dvb_get_frontend(f, f->gate);
158
159 if (fe && fe->dvb.frontend && fe->dvb.frontend->ops.i2c_gate_ctrl)
160 fe->dvb.frontend->ops.i2c_gate_ctrl(fe->dvb.frontend, open);
161 }
162
163 /* ------------------------------------------------------------------ */
164
165 static int dvico_fusionhdtv_demod_init(struct dvb_frontend* fe)
166 {
167 static u8 clock_config [] = { CLOCK_CTL, 0x38, 0x39 };
168 static u8 reset [] = { RESET, 0x80 };
169 static u8 adc_ctl_1_cfg [] = { ADC_CTL_1, 0x40 };
170 static u8 agc_cfg [] = { AGC_TARGET, 0x24, 0x20 };
171 static u8 gpp_ctl_cfg [] = { GPP_CTL, 0x33 };
172 static u8 capt_range_cfg[] = { CAPT_RANGE, 0x32 };
173
174 mt352_write(fe, clock_config, sizeof(clock_config));
175 udelay(200);
176 mt352_write(fe, reset, sizeof(reset));
177 mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
178
179 mt352_write(fe, agc_cfg, sizeof(agc_cfg));
180 mt352_write(fe, gpp_ctl_cfg, sizeof(gpp_ctl_cfg));
181 mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
182 return 0;
183 }
184
185 static int dvico_dual_demod_init(struct dvb_frontend *fe)
186 {
187 static u8 clock_config [] = { CLOCK_CTL, 0x38, 0x38 };
188 static u8 reset [] = { RESET, 0x80 };
189 static u8 adc_ctl_1_cfg [] = { ADC_CTL_1, 0x40 };
190 static u8 agc_cfg [] = { AGC_TARGET, 0x28, 0x20 };
191 static u8 gpp_ctl_cfg [] = { GPP_CTL, 0x33 };
192 static u8 capt_range_cfg[] = { CAPT_RANGE, 0x32 };
193
194 mt352_write(fe, clock_config, sizeof(clock_config));
195 udelay(200);
196 mt352_write(fe, reset, sizeof(reset));
197 mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
198
199 mt352_write(fe, agc_cfg, sizeof(agc_cfg));
200 mt352_write(fe, gpp_ctl_cfg, sizeof(gpp_ctl_cfg));
201 mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
202
203 return 0;
204 }
205
206 static int dntv_live_dvbt_demod_init(struct dvb_frontend* fe)
207 {
208 static u8 clock_config [] = { 0x89, 0x38, 0x39 };
209 static u8 reset [] = { 0x50, 0x80 };
210 static u8 adc_ctl_1_cfg [] = { 0x8E, 0x40 };
211 static u8 agc_cfg [] = { 0x67, 0x10, 0x23, 0x00, 0xFF, 0xFF,
212 0x00, 0xFF, 0x00, 0x40, 0x40 };
213 static u8 dntv_extra[] = { 0xB5, 0x7A };
214 static u8 capt_range_cfg[] = { 0x75, 0x32 };
215
216 mt352_write(fe, clock_config, sizeof(clock_config));
217 udelay(2000);
218 mt352_write(fe, reset, sizeof(reset));
219 mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
220
221 mt352_write(fe, agc_cfg, sizeof(agc_cfg));
222 udelay(2000);
223 mt352_write(fe, dntv_extra, sizeof(dntv_extra));
224 mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
225
226 return 0;
227 }
228
229 static struct mt352_config dvico_fusionhdtv = {
230 .demod_address = 0x0f,
231 .demod_init = dvico_fusionhdtv_demod_init,
232 };
233
234 static struct mt352_config dntv_live_dvbt_config = {
235 .demod_address = 0x0f,
236 .demod_init = dntv_live_dvbt_demod_init,
237 };
238
239 static struct mt352_config dvico_fusionhdtv_dual = {
240 .demod_address = 0x0f,
241 .demod_init = dvico_dual_demod_init,
242 };
243
244 static struct zl10353_config cx88_terratec_cinergy_ht_pci_mkii_config = {
245 .demod_address = (0x1e >> 1),
246 .no_tuner = 1,
247 .if2 = 45600,
248 };
249
250 #if defined(CONFIG_VIDEO_CX88_VP3054) || (defined(CONFIG_VIDEO_CX88_VP3054_MODULE) && defined(MODULE))
251 static int dntv_live_dvbt_pro_demod_init(struct dvb_frontend* fe)
252 {
253 static u8 clock_config [] = { 0x89, 0x38, 0x38 };
254 static u8 reset [] = { 0x50, 0x80 };
255 static u8 adc_ctl_1_cfg [] = { 0x8E, 0x40 };
256 static u8 agc_cfg [] = { 0x67, 0x10, 0x20, 0x00, 0xFF, 0xFF,
257 0x00, 0xFF, 0x00, 0x40, 0x40 };
258 static u8 dntv_extra[] = { 0xB5, 0x7A };
259 static u8 capt_range_cfg[] = { 0x75, 0x32 };
260
261 mt352_write(fe, clock_config, sizeof(clock_config));
262 udelay(2000);
263 mt352_write(fe, reset, sizeof(reset));
264 mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
265
266 mt352_write(fe, agc_cfg, sizeof(agc_cfg));
267 udelay(2000);
268 mt352_write(fe, dntv_extra, sizeof(dntv_extra));
269 mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
270
271 return 0;
272 }
273
274 static struct mt352_config dntv_live_dvbt_pro_config = {
275 .demod_address = 0x0f,
276 .no_tuner = 1,
277 .demod_init = dntv_live_dvbt_pro_demod_init,
278 };
279 #endif
280
281 static struct zl10353_config dvico_fusionhdtv_hybrid = {
282 .demod_address = 0x0f,
283 .no_tuner = 1,
284 };
285
286 static struct zl10353_config dvico_fusionhdtv_xc3028 = {
287 .demod_address = 0x0f,
288 .if2 = 45600,
289 .no_tuner = 1,
290 };
291
292 static struct mt352_config dvico_fusionhdtv_mt352_xc3028 = {
293 .demod_address = 0x0f,
294 .if2 = 4560,
295 .no_tuner = 1,
296 .demod_init = dvico_fusionhdtv_demod_init,
297 };
298
299 static struct zl10353_config dvico_fusionhdtv_plus_v1_1 = {
300 .demod_address = 0x0f,
301 };
302
303 static struct cx22702_config connexant_refboard_config = {
304 .demod_address = 0x43,
305 .output_mode = CX22702_SERIAL_OUTPUT,
306 };
307
308 static struct cx22702_config hauppauge_hvr_config = {
309 .demod_address = 0x63,
310 .output_mode = CX22702_SERIAL_OUTPUT,
311 };
312
313 static int or51132_set_ts_param(struct dvb_frontend* fe, int is_punctured)
314 {
315 struct cx8802_dev *dev= fe->dvb->priv;
316 dev->ts_gen_cntrl = is_punctured ? 0x04 : 0x00;
317 return 0;
318 }
319
320 static struct or51132_config pchdtv_hd3000 = {
321 .demod_address = 0x15,
322 .set_ts_params = or51132_set_ts_param,
323 };
324
325 static int lgdt330x_pll_rf_set(struct dvb_frontend* fe, int index)
326 {
327 struct cx8802_dev *dev= fe->dvb->priv;
328 struct cx88_core *core = dev->core;
329
330 dprintk(1, "%s: index = %d\n", __func__, index);
331 if (index == 0)
332 cx_clear(MO_GP0_IO, 8);
333 else
334 cx_set(MO_GP0_IO, 8);
335 return 0;
336 }
337
338 static int lgdt330x_set_ts_param(struct dvb_frontend* fe, int is_punctured)
339 {
340 struct cx8802_dev *dev= fe->dvb->priv;
341 if (is_punctured)
342 dev->ts_gen_cntrl |= 0x04;
343 else
344 dev->ts_gen_cntrl &= ~0x04;
345 return 0;
346 }
347
348 static struct lgdt330x_config fusionhdtv_3_gold = {
349 .demod_address = 0x0e,
350 .demod_chip = LGDT3302,
351 .serial_mpeg = 0x04, /* TPSERIAL for 3302 in TOP_CONTROL */
352 .set_ts_params = lgdt330x_set_ts_param,
353 };
354
355 static struct lgdt330x_config fusionhdtv_5_gold = {
356 .demod_address = 0x0e,
357 .demod_chip = LGDT3303,
358 .serial_mpeg = 0x40, /* TPSERIAL for 3303 in TOP_CONTROL */
359 .set_ts_params = lgdt330x_set_ts_param,
360 };
361
362 static struct lgdt330x_config pchdtv_hd5500 = {
363 .demod_address = 0x59,
364 .demod_chip = LGDT3303,
365 .serial_mpeg = 0x40, /* TPSERIAL for 3303 in TOP_CONTROL */
366 .set_ts_params = lgdt330x_set_ts_param,
367 };
368
369 static int nxt200x_set_ts_param(struct dvb_frontend* fe, int is_punctured)
370 {
371 struct cx8802_dev *dev= fe->dvb->priv;
372 dev->ts_gen_cntrl = is_punctured ? 0x04 : 0x00;
373 return 0;
374 }
375
376 static struct nxt200x_config ati_hdtvwonder = {
377 .demod_address = 0x0a,
378 .set_ts_params = nxt200x_set_ts_param,
379 };
380
381 static int cx24123_set_ts_param(struct dvb_frontend* fe,
382 int is_punctured)
383 {
384 struct cx8802_dev *dev= fe->dvb->priv;
385 dev->ts_gen_cntrl = 0x02;
386 return 0;
387 }
388
389 static int kworld_dvbs_100_set_voltage(struct dvb_frontend* fe,
390 fe_sec_voltage_t voltage)
391 {
392 struct cx8802_dev *dev= fe->dvb->priv;
393 struct cx88_core *core = dev->core;
394
395 if (voltage == SEC_VOLTAGE_OFF)
396 cx_write(MO_GP0_IO, 0x000006fb);
397 else
398 cx_write(MO_GP0_IO, 0x000006f9);
399
400 if (core->prev_set_voltage)
401 return core->prev_set_voltage(fe, voltage);
402 return 0;
403 }
404
405 static int geniatech_dvbs_set_voltage(struct dvb_frontend *fe,
406 fe_sec_voltage_t voltage)
407 {
408 struct cx8802_dev *dev= fe->dvb->priv;
409 struct cx88_core *core = dev->core;
410
411 if (voltage == SEC_VOLTAGE_OFF) {
412 dprintk(1,"LNB Voltage OFF\n");
413 cx_write(MO_GP0_IO, 0x0000efff);
414 }
415
416 if (core->prev_set_voltage)
417 return core->prev_set_voltage(fe, voltage);
418 return 0;
419 }
420
421 static int tevii_dvbs_set_voltage(struct dvb_frontend *fe,
422 fe_sec_voltage_t voltage)
423 {
424 struct cx8802_dev *dev= fe->dvb->priv;
425 struct cx88_core *core = dev->core;
426
427 switch (voltage) {
428 case SEC_VOLTAGE_13:
429 printk("LNB Voltage SEC_VOLTAGE_13\n");
430 cx_write(MO_GP0_IO, 0x00006040);
431 break;
432 case SEC_VOLTAGE_18:
433 printk("LNB Voltage SEC_VOLTAGE_18\n");
434 cx_write(MO_GP0_IO, 0x00006060);
435 break;
436 case SEC_VOLTAGE_OFF:
437 printk("LNB Voltage SEC_VOLTAGE_off\n");
438 break;
439 }
440
441 if (core->prev_set_voltage)
442 return core->prev_set_voltage(fe, voltage);
443 return 0;
444 }
445
446 static struct cx24123_config geniatech_dvbs_config = {
447 .demod_address = 0x55,
448 .set_ts_params = cx24123_set_ts_param,
449 };
450
451 static struct cx24123_config hauppauge_novas_config = {
452 .demod_address = 0x55,
453 .set_ts_params = cx24123_set_ts_param,
454 };
455
456 static struct cx24123_config kworld_dvbs_100_config = {
457 .demod_address = 0x15,
458 .set_ts_params = cx24123_set_ts_param,
459 .lnb_polarity = 1,
460 };
461
462 static struct s5h1409_config pinnacle_pctv_hd_800i_config = {
463 .demod_address = 0x32 >> 1,
464 .output_mode = S5H1409_PARALLEL_OUTPUT,
465 .gpio = S5H1409_GPIO_ON,
466 .qam_if = 44000,
467 .inversion = S5H1409_INVERSION_OFF,
468 .status_mode = S5H1409_DEMODLOCKING,
469 .mpeg_timing = S5H1409_MPEGTIMING_NONCONTINOUS_NONINVERTING_CLOCK,
470 };
471
472 static struct s5h1409_config dvico_hdtv5_pci_nano_config = {
473 .demod_address = 0x32 >> 1,
474 .output_mode = S5H1409_SERIAL_OUTPUT,
475 .gpio = S5H1409_GPIO_OFF,
476 .inversion = S5H1409_INVERSION_OFF,
477 .status_mode = S5H1409_DEMODLOCKING,
478 .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
479 };
480
481 static struct s5h1409_config kworld_atsc_120_config = {
482 .demod_address = 0x32 >> 1,
483 .output_mode = S5H1409_SERIAL_OUTPUT,
484 .gpio = S5H1409_GPIO_OFF,
485 .inversion = S5H1409_INVERSION_OFF,
486 .status_mode = S5H1409_DEMODLOCKING,
487 .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
488 };
489
490 static struct xc5000_config pinnacle_pctv_hd_800i_tuner_config = {
491 .i2c_address = 0x64,
492 .if_khz = 5380,
493 };
494
495 static struct zl10353_config cx88_pinnacle_hybrid_pctv = {
496 .demod_address = (0x1e >> 1),
497 .no_tuner = 1,
498 .if2 = 45600,
499 };
500
501 static struct zl10353_config cx88_geniatech_x8000_mt = {
502 .demod_address = (0x1e >> 1),
503 .no_tuner = 1,
504 .disable_i2c_gate_ctrl = 1,
505 };
506
507 static struct s5h1411_config dvico_fusionhdtv7_config = {
508 .output_mode = S5H1411_SERIAL_OUTPUT,
509 .gpio = S5H1411_GPIO_ON,
510 .mpeg_timing = S5H1411_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
511 .qam_if = S5H1411_IF_44000,
512 .vsb_if = S5H1411_IF_44000,
513 .inversion = S5H1411_INVERSION_OFF,
514 .status_mode = S5H1411_DEMODLOCKING
515 };
516
517 static struct xc5000_config dvico_fusionhdtv7_tuner_config = {
518 .i2c_address = 0xc2 >> 1,
519 .if_khz = 5380,
520 };
521
522 static int attach_xc3028(u8 addr, struct cx8802_dev *dev)
523 {
524 struct dvb_frontend *fe;
525 struct videobuf_dvb_frontend *fe0 = NULL;
526 struct xc2028_ctrl ctl;
527 struct xc2028_config cfg = {
528 .i2c_adap = &dev->core->i2c_adap,
529 .i2c_addr = addr,
530 .ctrl = &ctl,
531 };
532
533 /* Get the first frontend */
534 fe0 = videobuf_dvb_get_frontend(&dev->frontends, 1);
535 if (!fe0)
536 return -EINVAL;
537
538 if (!fe0->dvb.frontend) {
539 printk(KERN_ERR "%s/2: dvb frontend not attached. "
540 "Can't attach xc3028\n",
541 dev->core->name);
542 return -EINVAL;
543 }
544
545 /*
546 * Some xc3028 devices may be hidden by an I2C gate. This is known
547 * to happen with some s5h1409-based devices.
548 * Now that I2C gate is open, sets up xc3028 configuration
549 */
550 cx88_setup_xc3028(dev->core, &ctl);
551
552 fe = dvb_attach(xc2028_attach, fe0->dvb.frontend, &cfg);
553 if (!fe) {
554 printk(KERN_ERR "%s/2: xc3028 attach failed\n",
555 dev->core->name);
556 dvb_frontend_detach(fe0->dvb.frontend);
557 dvb_unregister_frontend(fe0->dvb.frontend);
558 fe0->dvb.frontend = NULL;
559 return -EINVAL;
560 }
561
562 printk(KERN_INFO "%s/2: xc3028 attached\n",
563 dev->core->name);
564
565 return 0;
566 }
567
568 static int cx24116_set_ts_param(struct dvb_frontend *fe,
569 int is_punctured)
570 {
571 struct cx8802_dev *dev = fe->dvb->priv;
572 dev->ts_gen_cntrl = 0x2;
573
574 return 0;
575 }
576
577 static int cx24116_reset_device(struct dvb_frontend *fe)
578 {
579 struct cx8802_dev *dev = fe->dvb->priv;
580 struct cx88_core *core = dev->core;
581
582 /* Reset the part */
583 /* Put the cx24116 into reset */
584 cx_write(MO_SRST_IO, 0);
585 msleep(10);
586 /* Take the cx24116 out of reset */
587 cx_write(MO_SRST_IO, 1);
588 msleep(10);
589
590 return 0;
591 }
592
593 static struct cx24116_config hauppauge_hvr4000_config = {
594 .demod_address = 0x05,
595 .set_ts_params = cx24116_set_ts_param,
596 .reset_device = cx24116_reset_device,
597 };
598
599 static struct cx24116_config tevii_s460_config = {
600 .demod_address = 0x55,
601 .set_ts_params = cx24116_set_ts_param,
602 .reset_device = cx24116_reset_device,
603 };
604
605 static struct stv0299_config tevii_tuner_sharp_config = {
606 .demod_address = 0x68,
607 .inittab = sharp_z0194a_inittab,
608 .mclk = 88000000UL,
609 .invert = 1,
610 .skip_reinit = 0,
611 .lock_output = 1,
612 .volt13_op0_op1 = STV0299_VOLT13_OP1,
613 .min_delay_ms = 100,
614 .set_symbol_rate = sharp_z0194a_set_symbol_rate,
615 .set_ts_params = cx24116_set_ts_param,
616 };
617
618 static struct stv0288_config tevii_tuner_earda_config = {
619 .demod_address = 0x68,
620 .min_delay_ms = 100,
621 .set_ts_params = cx24116_set_ts_param,
622 };
623
624 static int cx8802_alloc_frontends(struct cx8802_dev *dev)
625 {
626 struct cx88_core *core = dev->core;
627 struct videobuf_dvb_frontend *fe = NULL;
628 int i;
629
630 mutex_init(&dev->frontends.lock);
631 INIT_LIST_HEAD(&dev->frontends.felist);
632
633 if (!core->board.num_frontends)
634 return -ENODEV;
635
636 printk(KERN_INFO "%s() allocating %d frontend(s)\n", __func__,
637 core->board.num_frontends);
638 for (i = 1; i <= core->board.num_frontends; i++) {
639 fe = videobuf_dvb_alloc_frontend(&dev->frontends, i);
640 if (!fe) {
641 printk(KERN_ERR "%s() failed to alloc\n", __func__);
642 videobuf_dvb_dealloc_frontends(&dev->frontends);
643 return -ENOMEM;
644 }
645 }
646 return 0;
647 }
648
649 static int dvb_register(struct cx8802_dev *dev)
650 {
651 struct cx88_core *core = dev->core;
652 struct videobuf_dvb_frontend *fe0, *fe1 = NULL;
653 int mfe_shared = 0; /* bus not shared by default */
654
655 if (0 != core->i2c_rc) {
656 printk(KERN_ERR "%s/2: no i2c-bus available, cannot attach dvb drivers\n", core->name);
657 goto frontend_detach;
658 }
659
660 /* Get the first frontend */
661 fe0 = videobuf_dvb_get_frontend(&dev->frontends, 1);
662 if (!fe0)
663 goto frontend_detach;
664
665 /* multi-frontend gate control is undefined or defaults to fe0 */
666 dev->frontends.gate = 0;
667
668 /* Sets the gate control callback to be used by i2c command calls */
669 core->gate_ctrl = cx88_dvb_gate_ctrl;
670
671 /* init frontend(s) */
672 switch (core->boardnr) {
673 case CX88_BOARD_HAUPPAUGE_DVB_T1:
674 fe0->dvb.frontend = dvb_attach(cx22702_attach,
675 &connexant_refboard_config,
676 &core->i2c_adap);
677 if (fe0->dvb.frontend != NULL) {
678 if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend,
679 0x61, &core->i2c_adap,
680 DVB_PLL_THOMSON_DTT759X))
681 goto frontend_detach;
682 }
683 break;
684 case CX88_BOARD_TERRATEC_CINERGY_1400_DVB_T1:
685 case CX88_BOARD_CONEXANT_DVB_T1:
686 case CX88_BOARD_KWORLD_DVB_T_CX22702:
687 case CX88_BOARD_WINFAST_DTV1000:
688 fe0->dvb.frontend = dvb_attach(cx22702_attach,
689 &connexant_refboard_config,
690 &core->i2c_adap);
691 if (fe0->dvb.frontend != NULL) {
692 if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend,
693 0x60, &core->i2c_adap,
694 DVB_PLL_THOMSON_DTT7579))
695 goto frontend_detach;
696 }
697 break;
698 case CX88_BOARD_WINFAST_DTV2000H:
699 case CX88_BOARD_HAUPPAUGE_HVR1100:
700 case CX88_BOARD_HAUPPAUGE_HVR1100LP:
701 case CX88_BOARD_HAUPPAUGE_HVR1300:
702 fe0->dvb.frontend = dvb_attach(cx22702_attach,
703 &hauppauge_hvr_config,
704 &core->i2c_adap);
705 if (fe0->dvb.frontend != NULL) {
706 if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
707 &core->i2c_adap, 0x61,
708 TUNER_PHILIPS_FMD1216ME_MK3))
709 goto frontend_detach;
710 }
711 break;
712 case CX88_BOARD_HAUPPAUGE_HVR3000:
713 /* MFE frontend 1 */
714 mfe_shared = 1;
715 dev->frontends.gate = 2;
716 /* DVB-S init */
717 fe0->dvb.frontend = dvb_attach(cx24123_attach,
718 &hauppauge_novas_config,
719 &dev->core->i2c_adap);
720 if (fe0->dvb.frontend) {
721 if (!dvb_attach(isl6421_attach,
722 fe0->dvb.frontend,
723 &dev->core->i2c_adap,
724 0x08, ISL6421_DCL, 0x00))
725 goto frontend_detach;
726 }
727 /* MFE frontend 2 */
728 fe1 = videobuf_dvb_get_frontend(&dev->frontends, 2);
729 if (!fe1)
730 goto frontend_detach;
731 /* DVB-T init */
732 fe1->dvb.frontend = dvb_attach(cx22702_attach,
733 &hauppauge_hvr_config,
734 &dev->core->i2c_adap);
735 if (fe1->dvb.frontend) {
736 fe1->dvb.frontend->id = 1;
737 if (!dvb_attach(simple_tuner_attach,
738 fe1->dvb.frontend,
739 &dev->core->i2c_adap,
740 0x61, TUNER_PHILIPS_FMD1216ME_MK3))
741 goto frontend_detach;
742 }
743 break;
744 case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_PLUS:
745 fe0->dvb.frontend = dvb_attach(mt352_attach,
746 &dvico_fusionhdtv,
747 &core->i2c_adap);
748 if (fe0->dvb.frontend != NULL) {
749 if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend,
750 0x60, NULL, DVB_PLL_THOMSON_DTT7579))
751 goto frontend_detach;
752 break;
753 }
754 /* ZL10353 replaces MT352 on later cards */
755 fe0->dvb.frontend = dvb_attach(zl10353_attach,
756 &dvico_fusionhdtv_plus_v1_1,
757 &core->i2c_adap);
758 if (fe0->dvb.frontend != NULL) {
759 if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend,
760 0x60, NULL, DVB_PLL_THOMSON_DTT7579))
761 goto frontend_detach;
762 }
763 break;
764 case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL:
765 /* The tin box says DEE1601, but it seems to be DTT7579
766 * compatible, with a slightly different MT352 AGC gain. */
767 fe0->dvb.frontend = dvb_attach(mt352_attach,
768 &dvico_fusionhdtv_dual,
769 &core->i2c_adap);
770 if (fe0->dvb.frontend != NULL) {
771 if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend,
772 0x61, NULL, DVB_PLL_THOMSON_DTT7579))
773 goto frontend_detach;
774 break;
775 }
776 /* ZL10353 replaces MT352 on later cards */
777 fe0->dvb.frontend = dvb_attach(zl10353_attach,
778 &dvico_fusionhdtv_plus_v1_1,
779 &core->i2c_adap);
780 if (fe0->dvb.frontend != NULL) {
781 if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend,
782 0x61, NULL, DVB_PLL_THOMSON_DTT7579))
783 goto frontend_detach;
784 }
785 break;
786 case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T1:
787 fe0->dvb.frontend = dvb_attach(mt352_attach,
788 &dvico_fusionhdtv,
789 &core->i2c_adap);
790 if (fe0->dvb.frontend != NULL) {
791 if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend,
792 0x61, NULL, DVB_PLL_LG_Z201))
793 goto frontend_detach;
794 }
795 break;
796 case CX88_BOARD_KWORLD_DVB_T:
797 case CX88_BOARD_DNTV_LIVE_DVB_T:
798 case CX88_BOARD_ADSTECH_DVB_T_PCI:
799 fe0->dvb.frontend = dvb_attach(mt352_attach,
800 &dntv_live_dvbt_config,
801 &core->i2c_adap);
802 if (fe0->dvb.frontend != NULL) {
803 if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend,
804 0x61, NULL, DVB_PLL_UNKNOWN_1))
805 goto frontend_detach;
806 }
807 break;
808 case CX88_BOARD_DNTV_LIVE_DVB_T_PRO:
809 #if defined(CONFIG_VIDEO_CX88_VP3054) || (defined(CONFIG_VIDEO_CX88_VP3054_MODULE) && defined(MODULE))
810 /* MT352 is on a secondary I2C bus made from some GPIO lines */
811 fe0->dvb.frontend = dvb_attach(mt352_attach, &dntv_live_dvbt_pro_config,
812 &dev->vp3054->adap);
813 if (fe0->dvb.frontend != NULL) {
814 if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
815 &core->i2c_adap, 0x61,
816 TUNER_PHILIPS_FMD1216ME_MK3))
817 goto frontend_detach;
818 }
819 #else
820 printk(KERN_ERR "%s/2: built without vp3054 support\n",
821 core->name);
822 #endif
823 break;
824 case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_HYBRID:
825 fe0->dvb.frontend = dvb_attach(zl10353_attach,
826 &dvico_fusionhdtv_hybrid,
827 &core->i2c_adap);
828 if (fe0->dvb.frontend != NULL) {
829 if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
830 &core->i2c_adap, 0x61,
831 TUNER_THOMSON_FE6600))
832 goto frontend_detach;
833 }
834 break;
835 case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_PRO:
836 fe0->dvb.frontend = dvb_attach(zl10353_attach,
837 &dvico_fusionhdtv_xc3028,
838 &core->i2c_adap);
839 if (fe0->dvb.frontend == NULL)
840 fe0->dvb.frontend = dvb_attach(mt352_attach,
841 &dvico_fusionhdtv_mt352_xc3028,
842 &core->i2c_adap);
843 /*
844 * On this board, the demod provides the I2C bus pullup.
845 * We must not permit gate_ctrl to be performed, or
846 * the xc3028 cannot communicate on the bus.
847 */
848 if (fe0->dvb.frontend)
849 fe0->dvb.frontend->ops.i2c_gate_ctrl = NULL;
850 if (attach_xc3028(0x61, dev) < 0)
851 goto frontend_detach;
852 break;
853 case CX88_BOARD_PCHDTV_HD3000:
854 fe0->dvb.frontend = dvb_attach(or51132_attach, &pchdtv_hd3000,
855 &core->i2c_adap);
856 if (fe0->dvb.frontend != NULL) {
857 if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
858 &core->i2c_adap, 0x61,
859 TUNER_THOMSON_DTT761X))
860 goto frontend_detach;
861 }
862 break;
863 case CX88_BOARD_DVICO_FUSIONHDTV_3_GOLD_Q:
864 dev->ts_gen_cntrl = 0x08;
865
866 /* Do a hardware reset of chip before using it. */
867 cx_clear(MO_GP0_IO, 1);
868 mdelay(100);
869 cx_set(MO_GP0_IO, 1);
870 mdelay(200);
871
872 /* Select RF connector callback */
873 fusionhdtv_3_gold.pll_rf_set = lgdt330x_pll_rf_set;
874 fe0->dvb.frontend = dvb_attach(lgdt330x_attach,
875 &fusionhdtv_3_gold,
876 &core->i2c_adap);
877 if (fe0->dvb.frontend != NULL) {
878 if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
879 &core->i2c_adap, 0x61,
880 TUNER_MICROTUNE_4042FI5))
881 goto frontend_detach;
882 }
883 break;
884 case CX88_BOARD_DVICO_FUSIONHDTV_3_GOLD_T:
885 dev->ts_gen_cntrl = 0x08;
886
887 /* Do a hardware reset of chip before using it. */
888 cx_clear(MO_GP0_IO, 1);
889 mdelay(100);
890 cx_set(MO_GP0_IO, 9);
891 mdelay(200);
892 fe0->dvb.frontend = dvb_attach(lgdt330x_attach,
893 &fusionhdtv_3_gold,
894 &core->i2c_adap);
895 if (fe0->dvb.frontend != NULL) {
896 if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
897 &core->i2c_adap, 0x61,
898 TUNER_THOMSON_DTT761X))
899 goto frontend_detach;
900 }
901 break;
902 case CX88_BOARD_DVICO_FUSIONHDTV_5_GOLD:
903 dev->ts_gen_cntrl = 0x08;
904
905 /* Do a hardware reset of chip before using it. */
906 cx_clear(MO_GP0_IO, 1);
907 mdelay(100);
908 cx_set(MO_GP0_IO, 1);
909 mdelay(200);
910 fe0->dvb.frontend = dvb_attach(lgdt330x_attach,
911 &fusionhdtv_5_gold,
912 &core->i2c_adap);
913 if (fe0->dvb.frontend != NULL) {
914 if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
915 &core->i2c_adap, 0x61,
916 TUNER_LG_TDVS_H06XF))
917 goto frontend_detach;
918 if (!dvb_attach(tda9887_attach, fe0->dvb.frontend,
919 &core->i2c_adap, 0x43))
920 goto frontend_detach;
921 }
922 break;
923 case CX88_BOARD_PCHDTV_HD5500:
924 dev->ts_gen_cntrl = 0x08;
925
926 /* Do a hardware reset of chip before using it. */
927 cx_clear(MO_GP0_IO, 1);
928 mdelay(100);
929 cx_set(MO_GP0_IO, 1);
930 mdelay(200);
931 fe0->dvb.frontend = dvb_attach(lgdt330x_attach,
932 &pchdtv_hd5500,
933 &core->i2c_adap);
934 if (fe0->dvb.frontend != NULL) {
935 if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
936 &core->i2c_adap, 0x61,
937 TUNER_LG_TDVS_H06XF))
938 goto frontend_detach;
939 if (!dvb_attach(tda9887_attach, fe0->dvb.frontend,
940 &core->i2c_adap, 0x43))
941 goto frontend_detach;
942 }
943 break;
944 case CX88_BOARD_ATI_HDTVWONDER:
945 fe0->dvb.frontend = dvb_attach(nxt200x_attach,
946 &ati_hdtvwonder,
947 &core->i2c_adap);
948 if (fe0->dvb.frontend != NULL) {
949 if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
950 &core->i2c_adap, 0x61,
951 TUNER_PHILIPS_TUV1236D))
952 goto frontend_detach;
953 }
954 break;
955 case CX88_BOARD_HAUPPAUGE_NOVASPLUS_S1:
956 case CX88_BOARD_HAUPPAUGE_NOVASE2_S1:
957 fe0->dvb.frontend = dvb_attach(cx24123_attach,
958 &hauppauge_novas_config,
959 &core->i2c_adap);
960 if (fe0->dvb.frontend) {
961 if (!dvb_attach(isl6421_attach, fe0->dvb.frontend,
962 &core->i2c_adap, 0x08, ISL6421_DCL, 0x00))
963 goto frontend_detach;
964 }
965 break;
966 case CX88_BOARD_KWORLD_DVBS_100:
967 fe0->dvb.frontend = dvb_attach(cx24123_attach,
968 &kworld_dvbs_100_config,
969 &core->i2c_adap);
970 if (fe0->dvb.frontend) {
971 core->prev_set_voltage = fe0->dvb.frontend->ops.set_voltage;
972 fe0->dvb.frontend->ops.set_voltage = kworld_dvbs_100_set_voltage;
973 }
974 break;
975 case CX88_BOARD_GENIATECH_DVBS:
976 fe0->dvb.frontend = dvb_attach(cx24123_attach,
977 &geniatech_dvbs_config,
978 &core->i2c_adap);
979 if (fe0->dvb.frontend) {
980 core->prev_set_voltage = fe0->dvb.frontend->ops.set_voltage;
981 fe0->dvb.frontend->ops.set_voltage = geniatech_dvbs_set_voltage;
982 }
983 break;
984 case CX88_BOARD_PINNACLE_PCTV_HD_800i:
985 fe0->dvb.frontend = dvb_attach(s5h1409_attach,
986 &pinnacle_pctv_hd_800i_config,
987 &core->i2c_adap);
988 if (fe0->dvb.frontend != NULL) {
989 if (!dvb_attach(xc5000_attach, fe0->dvb.frontend,
990 &core->i2c_adap,
991 &pinnacle_pctv_hd_800i_tuner_config))
992 goto frontend_detach;
993 }
994 break;
995 case CX88_BOARD_DVICO_FUSIONHDTV_5_PCI_NANO:
996 fe0->dvb.frontend = dvb_attach(s5h1409_attach,
997 &dvico_hdtv5_pci_nano_config,
998 &core->i2c_adap);
999 if (fe0->dvb.frontend != NULL) {
1000 struct dvb_frontend *fe;
1001 struct xc2028_config cfg = {
1002 .i2c_adap = &core->i2c_adap,
1003 .i2c_addr = 0x61,
1004 };
1005 static struct xc2028_ctrl ctl = {
1006 .fname = XC2028_DEFAULT_FIRMWARE,
1007 .max_len = 64,
1008 .scode_table = XC3028_FE_OREN538,
1009 };
1010
1011 fe = dvb_attach(xc2028_attach,
1012 fe0->dvb.frontend, &cfg);
1013 if (fe != NULL && fe->ops.tuner_ops.set_config != NULL)
1014 fe->ops.tuner_ops.set_config(fe, &ctl);
1015 }
1016 break;
1017 case CX88_BOARD_PINNACLE_HYBRID_PCTV:
1018 case CX88_BOARD_WINFAST_DTV1800H:
1019 fe0->dvb.frontend = dvb_attach(zl10353_attach,
1020 &cx88_pinnacle_hybrid_pctv,
1021 &core->i2c_adap);
1022 if (fe0->dvb.frontend) {
1023 fe0->dvb.frontend->ops.i2c_gate_ctrl = NULL;
1024 if (attach_xc3028(0x61, dev) < 0)
1025 goto frontend_detach;
1026 }
1027 break;
1028 case CX88_BOARD_GENIATECH_X8000_MT:
1029 dev->ts_gen_cntrl = 0x00;
1030
1031 fe0->dvb.frontend = dvb_attach(zl10353_attach,
1032 &cx88_geniatech_x8000_mt,
1033 &core->i2c_adap);
1034 if (attach_xc3028(0x61, dev) < 0)
1035 goto frontend_detach;
1036 break;
1037 case CX88_BOARD_KWORLD_ATSC_120:
1038 fe0->dvb.frontend = dvb_attach(s5h1409_attach,
1039 &kworld_atsc_120_config,
1040 &core->i2c_adap);
1041 if (attach_xc3028(0x61, dev) < 0)
1042 goto frontend_detach;
1043 break;
1044 case CX88_BOARD_DVICO_FUSIONHDTV_7_GOLD:
1045 fe0->dvb.frontend = dvb_attach(s5h1411_attach,
1046 &dvico_fusionhdtv7_config,
1047 &core->i2c_adap);
1048 if (fe0->dvb.frontend != NULL) {
1049 if (!dvb_attach(xc5000_attach, fe0->dvb.frontend,
1050 &core->i2c_adap,
1051 &dvico_fusionhdtv7_tuner_config))
1052 goto frontend_detach;
1053 }
1054 break;
1055 case CX88_BOARD_HAUPPAUGE_HVR4000:
1056 /* MFE frontend 1 */
1057 mfe_shared = 1;
1058 dev->frontends.gate = 2;
1059 /* DVB-S/S2 Init */
1060 fe0->dvb.frontend = dvb_attach(cx24116_attach,
1061 &hauppauge_hvr4000_config,
1062 &dev->core->i2c_adap);
1063 if (fe0->dvb.frontend) {
1064 if (!dvb_attach(isl6421_attach,
1065 fe0->dvb.frontend,
1066 &dev->core->i2c_adap,
1067 0x08, ISL6421_DCL, 0x00))
1068 goto frontend_detach;
1069 }
1070 /* MFE frontend 2 */
1071 fe1 = videobuf_dvb_get_frontend(&dev->frontends, 2);
1072 if (!fe1)
1073 goto frontend_detach;
1074 /* DVB-T Init */
1075 fe1->dvb.frontend = dvb_attach(cx22702_attach,
1076 &hauppauge_hvr_config,
1077 &dev->core->i2c_adap);
1078 if (fe1->dvb.frontend) {
1079 fe1->dvb.frontend->id = 1;
1080 if (!dvb_attach(simple_tuner_attach,
1081 fe1->dvb.frontend,
1082 &dev->core->i2c_adap,
1083 0x61, TUNER_PHILIPS_FMD1216ME_MK3))
1084 goto frontend_detach;
1085 }
1086 break;
1087 case CX88_BOARD_HAUPPAUGE_HVR4000LITE:
1088 fe0->dvb.frontend = dvb_attach(cx24116_attach,
1089 &hauppauge_hvr4000_config,
1090 &dev->core->i2c_adap);
1091 if (fe0->dvb.frontend) {
1092 if (!dvb_attach(isl6421_attach,
1093 fe0->dvb.frontend,
1094 &dev->core->i2c_adap,
1095 0x08, ISL6421_DCL, 0x00))
1096 goto frontend_detach;
1097 }
1098 break;
1099 case CX88_BOARD_PROF_6200:
1100 case CX88_BOARD_TBS_8910:
1101 case CX88_BOARD_TEVII_S420:
1102 fe0->dvb.frontend = dvb_attach(stv0299_attach,
1103 &tevii_tuner_sharp_config,
1104 &core->i2c_adap);
1105 if (fe0->dvb.frontend != NULL) {
1106 if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend, 0x60,
1107 &core->i2c_adap, DVB_PLL_OPERA1))
1108 goto frontend_detach;
1109 core->prev_set_voltage = fe0->dvb.frontend->ops.set_voltage;
1110 fe0->dvb.frontend->ops.set_voltage = tevii_dvbs_set_voltage;
1111
1112 } else {
1113 fe0->dvb.frontend = dvb_attach(stv0288_attach,
1114 &tevii_tuner_earda_config,
1115 &core->i2c_adap);
1116 if (fe0->dvb.frontend != NULL) {
1117 if (!dvb_attach(stb6000_attach, fe0->dvb.frontend, 0x61,
1118 &core->i2c_adap))
1119 goto frontend_detach;
1120 core->prev_set_voltage = fe0->dvb.frontend->ops.set_voltage;
1121 fe0->dvb.frontend->ops.set_voltage = tevii_dvbs_set_voltage;
1122 }
1123 }
1124 break;
1125 case CX88_BOARD_TEVII_S460:
1126 fe0->dvb.frontend = dvb_attach(cx24116_attach,
1127 &tevii_s460_config,
1128 &core->i2c_adap);
1129 if (fe0->dvb.frontend != NULL)
1130 fe0->dvb.frontend->ops.set_voltage = tevii_dvbs_set_voltage;
1131 break;
1132 case CX88_BOARD_OMICOM_SS4_PCI:
1133 case CX88_BOARD_TBS_8920:
1134 case CX88_BOARD_PROF_7300:
1135 case CX88_BOARD_SATTRADE_ST4200:
1136 fe0->dvb.frontend = dvb_attach(cx24116_attach,
1137 &hauppauge_hvr4000_config,
1138 &core->i2c_adap);
1139 if (fe0->dvb.frontend != NULL)
1140 fe0->dvb.frontend->ops.set_voltage = tevii_dvbs_set_voltage;
1141 break;
1142 case CX88_BOARD_TERRATEC_CINERGY_HT_PCI_MKII:
1143 fe0->dvb.frontend = dvb_attach(zl10353_attach,
1144 &cx88_terratec_cinergy_ht_pci_mkii_config,
1145 &core->i2c_adap);
1146 if (fe0->dvb.frontend) {
1147 fe0->dvb.frontend->ops.i2c_gate_ctrl = NULL;
1148 if (attach_xc3028(0x61, dev) < 0)
1149 goto frontend_detach;
1150 }
1151 break;
1152 default:
1153 printk(KERN_ERR "%s/2: The frontend of your DVB/ATSC card isn't supported yet\n",
1154 core->name);
1155 break;
1156 }
1157
1158 if ( (NULL == fe0->dvb.frontend) || (fe1 && NULL == fe1->dvb.frontend) ) {
1159 printk(KERN_ERR
1160 "%s/2: frontend initialization failed\n",
1161 core->name);
1162 goto frontend_detach;
1163 }
1164 /* define general-purpose callback pointer */
1165 fe0->dvb.frontend->callback = cx88_tuner_callback;
1166
1167 /* Ensure all frontends negotiate bus access */
1168 fe0->dvb.frontend->ops.ts_bus_ctrl = cx88_dvb_bus_ctrl;
1169 if (fe1)
1170 fe1->dvb.frontend->ops.ts_bus_ctrl = cx88_dvb_bus_ctrl;
1171
1172 /* Put the analog decoder in standby to keep it quiet */
1173 call_all(core, tuner, s_standby);
1174
1175 /* register everything */
1176 return videobuf_dvb_register_bus(&dev->frontends, THIS_MODULE, dev,
1177 &dev->pci->dev, adapter_nr, mfe_shared);
1178
1179 frontend_detach:
1180 core->gate_ctrl = NULL;
1181 videobuf_dvb_dealloc_frontends(&dev->frontends);
1182 return -EINVAL;
1183 }
1184
1185 /* ----------------------------------------------------------- */
1186
1187 /* CX8802 MPEG -> mini driver - We have been given the hardware */
1188 static int cx8802_dvb_advise_acquire(struct cx8802_driver *drv)
1189 {
1190 struct cx88_core *core = drv->core;
1191 int err = 0;
1192 dprintk( 1, "%s\n", __func__);
1193
1194 switch (core->boardnr) {
1195 case CX88_BOARD_HAUPPAUGE_HVR1300:
1196 /* We arrive here with either the cx23416 or the cx22702
1197 * on the bus. Take the bus from the cx23416 and enable the
1198 * cx22702 demod
1199 */
1200 /* Toggle reset on cx22702 leaving i2c active */
1201 cx_set(MO_GP0_IO, 0x00000080);
1202 udelay(1000);
1203 cx_clear(MO_GP0_IO, 0x00000080);
1204 udelay(50);
1205 cx_set(MO_GP0_IO, 0x00000080);
1206 udelay(1000);
1207 /* enable the cx22702 pins */
1208 cx_clear(MO_GP0_IO, 0x00000004);
1209 udelay(1000);
1210 break;
1211
1212 case CX88_BOARD_HAUPPAUGE_HVR3000:
1213 case CX88_BOARD_HAUPPAUGE_HVR4000:
1214 /* Toggle reset on cx22702 leaving i2c active */
1215 cx_set(MO_GP0_IO, 0x00000080);
1216 udelay(1000);
1217 cx_clear(MO_GP0_IO, 0x00000080);
1218 udelay(50);
1219 cx_set(MO_GP0_IO, 0x00000080);
1220 udelay(1000);
1221 switch (core->dvbdev->frontends.active_fe_id) {
1222 case 1: /* DVB-S/S2 Enabled */
1223 /* tri-state the cx22702 pins */
1224 cx_set(MO_GP0_IO, 0x00000004);
1225 /* Take the cx24116/cx24123 out of reset */
1226 cx_write(MO_SRST_IO, 1);
1227 core->dvbdev->ts_gen_cntrl = 0x02; /* Parallel IO */
1228 break;
1229 case 2: /* DVB-T Enabled */
1230 /* Put the cx24116/cx24123 into reset */
1231 cx_write(MO_SRST_IO, 0);
1232 /* enable the cx22702 pins */
1233 cx_clear(MO_GP0_IO, 0x00000004);
1234 core->dvbdev->ts_gen_cntrl = 0x0c; /* Serial IO */
1235 break;
1236 }
1237 udelay(1000);
1238 break;
1239
1240 default:
1241 err = -ENODEV;
1242 }
1243 return err;
1244 }
1245
1246 /* CX8802 MPEG -> mini driver - We no longer have the hardware */
1247 static int cx8802_dvb_advise_release(struct cx8802_driver *drv)
1248 {
1249 struct cx88_core *core = drv->core;
1250 int err = 0;
1251 dprintk( 1, "%s\n", __func__);
1252
1253 switch (core->boardnr) {
1254 case CX88_BOARD_HAUPPAUGE_HVR1300:
1255 /* Do Nothing, leave the cx22702 on the bus. */
1256 break;
1257 case CX88_BOARD_HAUPPAUGE_HVR3000:
1258 case CX88_BOARD_HAUPPAUGE_HVR4000:
1259 break;
1260 default:
1261 err = -ENODEV;
1262 }
1263 return err;
1264 }
1265
1266 static int cx8802_dvb_probe(struct cx8802_driver *drv)
1267 {
1268 struct cx88_core *core = drv->core;
1269 struct cx8802_dev *dev = drv->core->dvbdev;
1270 int err;
1271 struct videobuf_dvb_frontend *fe;
1272 int i;
1273
1274 dprintk( 1, "%s\n", __func__);
1275 dprintk( 1, " ->being probed by Card=%d Name=%s, PCI %02x:%02x\n",
1276 core->boardnr,
1277 core->name,
1278 core->pci_bus,
1279 core->pci_slot);
1280
1281 err = -ENODEV;
1282 if (!(core->board.mpeg & CX88_MPEG_DVB))
1283 goto fail_core;
1284
1285 /* If vp3054 isn't enabled, a stub will just return 0 */
1286 err = vp3054_i2c_probe(dev);
1287 if (0 != err)
1288 goto fail_core;
1289
1290 /* dvb stuff */
1291 printk(KERN_INFO "%s/2: cx2388x based DVB/ATSC card\n", core->name);
1292 dev->ts_gen_cntrl = 0x0c;
1293
1294 err = cx8802_alloc_frontends(dev);
1295 if (err)
1296 goto fail_core;
1297
1298 err = -ENODEV;
1299 for (i = 1; i <= core->board.num_frontends; i++) {
1300 fe = videobuf_dvb_get_frontend(&core->dvbdev->frontends, i);
1301 if (fe == NULL) {
1302 printk(KERN_ERR "%s() failed to get frontend(%d)\n",
1303 __func__, i);
1304 goto fail_probe;
1305 }
1306 videobuf_queue_sg_init(&fe->dvb.dvbq, &dvb_qops,
1307 &dev->pci->dev, &dev->slock,
1308 V4L2_BUF_TYPE_VIDEO_CAPTURE,
1309 V4L2_FIELD_TOP,
1310 sizeof(struct cx88_buffer),
1311 dev);
1312 /* init struct videobuf_dvb */
1313 fe->dvb.name = dev->core->name;
1314 }
1315
1316 err = dvb_register(dev);
1317 if (err)
1318 /* frontends/adapter de-allocated in dvb_register */
1319 printk(KERN_ERR "%s/2: dvb_register failed (err = %d)\n",
1320 core->name, err);
1321 return err;
1322 fail_probe:
1323 videobuf_dvb_dealloc_frontends(&core->dvbdev->frontends);
1324 fail_core:
1325 return err;
1326 }
1327
1328 static int cx8802_dvb_remove(struct cx8802_driver *drv)
1329 {
1330 struct cx88_core *core = drv->core;
1331 struct cx8802_dev *dev = drv->core->dvbdev;
1332
1333 dprintk( 1, "%s\n", __func__);
1334
1335 videobuf_dvb_unregister_bus(&dev->frontends);
1336
1337 vp3054_i2c_remove(dev);
1338
1339 core->gate_ctrl = NULL;
1340
1341 return 0;
1342 }
1343
1344 static struct cx8802_driver cx8802_dvb_driver = {
1345 .type_id = CX88_MPEG_DVB,
1346 .hw_access = CX8802_DRVCTL_SHARED,
1347 .probe = cx8802_dvb_probe,
1348 .remove = cx8802_dvb_remove,
1349 .advise_acquire = cx8802_dvb_advise_acquire,
1350 .advise_release = cx8802_dvb_advise_release,
1351 };
1352
1353 static int dvb_init(void)
1354 {
1355 printk(KERN_INFO "cx88/2: cx2388x dvb driver version %d.%d.%d loaded\n",
1356 (CX88_VERSION_CODE >> 16) & 0xff,
1357 (CX88_VERSION_CODE >> 8) & 0xff,
1358 CX88_VERSION_CODE & 0xff);
1359 #ifdef SNAPSHOT
1360 printk(KERN_INFO "cx2388x: snapshot date %04d-%02d-%02d\n",
1361 SNAPSHOT/10000, (SNAPSHOT/100)%100, SNAPSHOT%100);
1362 #endif
1363 return cx8802_register_driver(&cx8802_dvb_driver);
1364 }
1365
1366 static void dvb_fini(void)
1367 {
1368 cx8802_unregister_driver(&cx8802_dvb_driver);
1369 }
1370
1371 module_init(dvb_init);
1372 module_exit(dvb_fini);
1373
1374 /*
1375 * Local variables:
1376 * c-basic-offset: 8
1377 * compile-command: "make DVB=1"
1378 * End:
1379 */