powerpc: use consistent types in mktree
[zen-stable.git] / drivers / media / video / upd64031a.c
bloba07a3fbb51eb8aad3af201289ff9a677e765dc5f
1 /*
2 * upd64031A - NEC Electronics Ghost Reduction for NTSC in Japan
4 * 2003 by T.Adachi <tadachi@tadachi-net.com>
5 * 2003 by Takeru KOMORIYA <komoriya@paken.org>
6 * 2006 by Hans Verkuil <hverkuil@xs4all.nl>
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
24 #include <linux/module.h>
25 #include <linux/kernel.h>
26 #include <linux/i2c.h>
27 #include <linux/videodev2.h>
28 #include <media/v4l2-device.h>
29 #include <media/v4l2-chip-ident.h>
30 #include <media/v4l2-i2c-drv.h>
31 #include <media/upd64031a.h>
33 /* --------------------- read registers functions define -------------------- */
35 /* bit masks */
36 #define GR_MODE_MASK 0xc0
37 #define DIRECT_3DYCS_CONNECT_MASK 0xc0
38 #define SYNC_CIRCUIT_MASK 0xa0
40 /* -------------------------------------------------------------------------- */
42 MODULE_DESCRIPTION("uPD64031A driver");
43 MODULE_AUTHOR("T. Adachi, Takeru KOMORIYA, Hans Verkuil");
44 MODULE_LICENSE("GPL");
46 static int debug;
47 module_param(debug, int, 0644);
49 MODULE_PARM_DESC(debug, "Debug level (0-1)");
52 enum {
53 R00 = 0, R01, R02, R03, R04,
54 R05, R06, R07, R08, R09,
55 R0A, R0B, R0C, R0D, R0E, R0F,
56 /* unused registers
57 R10, R11, R12, R13, R14,
58 R15, R16, R17,
60 TOT_REGS
63 struct upd64031a_state {
64 struct v4l2_subdev sd;
65 u8 regs[TOT_REGS];
66 u8 gr_mode;
67 u8 direct_3dycs_connect;
68 u8 ext_comp_sync;
69 u8 ext_vert_sync;
72 static inline struct upd64031a_state *to_state(struct v4l2_subdev *sd)
74 return container_of(sd, struct upd64031a_state, sd);
77 static u8 upd64031a_init[] = {
78 0x00, 0xb8, 0x48, 0xd2, 0xe6,
79 0x03, 0x10, 0x0b, 0xaf, 0x7f,
80 0x00, 0x00, 0x1d, 0x5e, 0x00,
81 0xd0
84 /* ------------------------------------------------------------------------ */
86 static u8 upd64031a_read(struct v4l2_subdev *sd, u8 reg)
88 struct i2c_client *client = v4l2_get_subdevdata(sd);
89 u8 buf[2];
91 if (reg >= sizeof(buf))
92 return 0xff;
93 i2c_master_recv(client, buf, 2);
94 return buf[reg];
97 /* ------------------------------------------------------------------------ */
99 static void upd64031a_write(struct v4l2_subdev *sd, u8 reg, u8 val)
101 struct i2c_client *client = v4l2_get_subdevdata(sd);
102 u8 buf[2];
104 buf[0] = reg;
105 buf[1] = val;
106 v4l2_dbg(1, debug, sd, "write reg: %02X val: %02X\n", reg, val);
107 if (i2c_master_send(client, buf, 2) != 2)
108 v4l2_err(sd, "I/O error write 0x%02x/0x%02x\n", reg, val);
111 /* ------------------------------------------------------------------------ */
113 /* The input changed due to new input or channel changed */
114 static int upd64031a_s_frequency(struct v4l2_subdev *sd, struct v4l2_frequency *freq)
116 struct upd64031a_state *state = to_state(sd);
117 u8 reg = state->regs[R00];
119 v4l2_dbg(1, debug, sd, "changed input or channel\n");
120 upd64031a_write(sd, R00, reg | 0x10);
121 upd64031a_write(sd, R00, reg & ~0x10);
122 return 0;
125 /* ------------------------------------------------------------------------ */
127 static int upd64031a_s_routing(struct v4l2_subdev *sd,
128 u32 input, u32 output, u32 config)
130 struct upd64031a_state *state = to_state(sd);
131 u8 r00, r05, r08;
133 state->gr_mode = (input & 3) << 6;
134 state->direct_3dycs_connect = (input & 0xc) << 4;
135 state->ext_comp_sync =
136 (input & UPD64031A_COMPOSITE_EXTERNAL) << 1;
137 state->ext_vert_sync =
138 (input & UPD64031A_VERTICAL_EXTERNAL) << 2;
139 r00 = (state->regs[R00] & ~GR_MODE_MASK) | state->gr_mode;
140 r05 = (state->regs[R00] & ~SYNC_CIRCUIT_MASK) |
141 state->ext_comp_sync | state->ext_vert_sync;
142 r08 = (state->regs[R08] & ~DIRECT_3DYCS_CONNECT_MASK) |
143 state->direct_3dycs_connect;
144 upd64031a_write(sd, R00, r00);
145 upd64031a_write(sd, R05, r05);
146 upd64031a_write(sd, R08, r08);
147 return upd64031a_s_frequency(sd, NULL);
150 static int upd64031a_g_chip_ident(struct v4l2_subdev *sd, struct v4l2_dbg_chip_ident *chip)
152 struct i2c_client *client = v4l2_get_subdevdata(sd);
154 return v4l2_chip_ident_i2c_client(client, chip, V4L2_IDENT_UPD64031A, 0);
157 static int upd64031a_log_status(struct v4l2_subdev *sd)
159 v4l2_info(sd, "Status: SA00=0x%02x SA01=0x%02x\n",
160 upd64031a_read(sd, 0), upd64031a_read(sd, 1));
161 return 0;
164 #ifdef CONFIG_VIDEO_ADV_DEBUG
165 static int upd64031a_g_register(struct v4l2_subdev *sd, struct v4l2_dbg_register *reg)
167 struct i2c_client *client = v4l2_get_subdevdata(sd);
169 if (!v4l2_chip_match_i2c_client(client, &reg->match))
170 return -EINVAL;
171 if (!capable(CAP_SYS_ADMIN))
172 return -EPERM;
173 reg->val = upd64031a_read(sd, reg->reg & 0xff);
174 reg->size = 1;
175 return 0;
178 static int upd64031a_s_register(struct v4l2_subdev *sd, struct v4l2_dbg_register *reg)
180 struct i2c_client *client = v4l2_get_subdevdata(sd);
182 if (!v4l2_chip_match_i2c_client(client, &reg->match))
183 return -EINVAL;
184 if (!capable(CAP_SYS_ADMIN))
185 return -EPERM;
186 upd64031a_write(sd, reg->reg & 0xff, reg->val & 0xff);
187 return 0;
189 #endif
191 /* ----------------------------------------------------------------------- */
193 static const struct v4l2_subdev_core_ops upd64031a_core_ops = {
194 .log_status = upd64031a_log_status,
195 .g_chip_ident = upd64031a_g_chip_ident,
196 #ifdef CONFIG_VIDEO_ADV_DEBUG
197 .g_register = upd64031a_g_register,
198 .s_register = upd64031a_s_register,
199 #endif
202 static const struct v4l2_subdev_tuner_ops upd64031a_tuner_ops = {
203 .s_frequency = upd64031a_s_frequency,
206 static const struct v4l2_subdev_video_ops upd64031a_video_ops = {
207 .s_routing = upd64031a_s_routing,
210 static const struct v4l2_subdev_ops upd64031a_ops = {
211 .core = &upd64031a_core_ops,
212 .tuner = &upd64031a_tuner_ops,
213 .video = &upd64031a_video_ops,
216 /* ------------------------------------------------------------------------ */
218 /* i2c implementation */
220 static int upd64031a_probe(struct i2c_client *client,
221 const struct i2c_device_id *id)
223 struct upd64031a_state *state;
224 struct v4l2_subdev *sd;
225 int i;
227 if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_BYTE_DATA))
228 return -EIO;
230 v4l_info(client, "chip found @ 0x%x (%s)\n",
231 client->addr << 1, client->adapter->name);
233 state = kmalloc(sizeof(struct upd64031a_state), GFP_KERNEL);
234 if (state == NULL)
235 return -ENOMEM;
236 sd = &state->sd;
237 v4l2_i2c_subdev_init(sd, client, &upd64031a_ops);
238 memcpy(state->regs, upd64031a_init, sizeof(state->regs));
239 state->gr_mode = UPD64031A_GR_ON << 6;
240 state->direct_3dycs_connect = UPD64031A_3DYCS_COMPOSITE << 4;
241 state->ext_comp_sync = state->ext_vert_sync = 0;
242 for (i = 0; i < TOT_REGS; i++)
243 upd64031a_write(sd, i, state->regs[i]);
244 return 0;
247 static int upd64031a_remove(struct i2c_client *client)
249 struct v4l2_subdev *sd = i2c_get_clientdata(client);
251 v4l2_device_unregister_subdev(sd);
252 kfree(to_state(sd));
253 return 0;
256 /* ----------------------------------------------------------------------- */
258 static const struct i2c_device_id upd64031a_id[] = {
259 { "upd64031a", 0 },
262 MODULE_DEVICE_TABLE(i2c, upd64031a_id);
264 static struct v4l2_i2c_driver_data v4l2_i2c_data = {
265 .name = "upd64031a",
266 .probe = upd64031a_probe,
267 .remove = upd64031a_remove,
268 .id_table = upd64031a_id,