2 * xHCI host controller driver
4 * Copyright (C) 2008 Intel Corp.
7 * Some code borrowed from the Linux EHCI driver.
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
15 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software Foundation,
20 * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
23 #include <linux/gfp.h>
24 #include <asm/unaligned.h>
28 #define PORT_WAKE_BITS (PORT_WKOC_E | PORT_WKDISC_E | PORT_WKCONN_E)
29 #define PORT_RWC_BITS (PORT_CSC | PORT_PEC | PORT_WRC | PORT_OCC | \
30 PORT_RC | PORT_PLC | PORT_PE)
32 /* usb 1.1 root hub device descriptor */
33 static u8 usb_bos_descriptor
[] = {
34 USB_DT_BOS_SIZE
, /* __u8 bLength, 5 bytes */
35 USB_DT_BOS
, /* __u8 bDescriptorType */
36 0x0F, 0x00, /* __le16 wTotalLength, 15 bytes */
37 0x1, /* __u8 bNumDeviceCaps */
38 /* First device capability */
39 USB_DT_USB_SS_CAP_SIZE
, /* __u8 bLength, 10 bytes */
40 USB_DT_DEVICE_CAPABILITY
, /* Device Capability */
41 USB_SS_CAP_TYPE
, /* bDevCapabilityType, SUPERSPEED_USB */
42 0x00, /* bmAttributes, LTM off by default */
43 USB_5GBPS_OPERATION
, 0x00, /* wSpeedsSupported, 5Gbps only */
44 0x03, /* bFunctionalitySupport,
46 0x00, /* bU1DevExitLat, set later. */
47 0x00, 0x00 /* __le16 bU2DevExitLat, set later. */
51 static void xhci_common_hub_descriptor(struct xhci_hcd
*xhci
,
52 struct usb_hub_descriptor
*desc
, int ports
)
56 desc
->bPwrOn2PwrGood
= 10; /* xhci section 5.4.9 says 20ms max */
57 desc
->bHubContrCurrent
= 0;
59 desc
->bNbrPorts
= ports
;
60 /* Ugh, these should be #defines, FIXME */
61 /* Using table 11-13 in USB 2.0 spec. */
63 /* Bits 1:0 - support port power switching, or power always on */
64 if (HCC_PPC(xhci
->hcc_params
))
68 /* Bit 2 - root hubs are not part of a compound device */
69 /* Bits 4:3 - individual port over current protection */
71 /* Bits 6:5 - no TTs in root ports */
72 /* Bit 7 - no port indicators */
73 desc
->wHubCharacteristics
= cpu_to_le16(temp
);
76 /* Fill in the USB 2.0 roothub descriptor */
77 static void xhci_usb2_hub_descriptor(struct usb_hcd
*hcd
, struct xhci_hcd
*xhci
,
78 struct usb_hub_descriptor
*desc
)
82 __u8 port_removable
[(USB_MAXCHILDREN
+ 1 + 7) / 8];
86 ports
= xhci
->num_usb2_ports
;
88 xhci_common_hub_descriptor(xhci
, desc
, ports
);
89 desc
->bDescriptorType
= 0x29;
90 temp
= 1 + (ports
/ 8);
91 desc
->bDescLength
= 7 + 2 * temp
;
93 /* The Device Removable bits are reported on a byte granularity.
94 * If the port doesn't exist within that byte, the bit is set to 0.
96 memset(port_removable
, 0, sizeof(port_removable
));
97 for (i
= 0; i
< ports
; i
++) {
98 portsc
= xhci_readl(xhci
, xhci
->usb3_ports
[i
]);
99 /* If a device is removable, PORTSC reports a 0, same as in the
100 * hub descriptor DeviceRemovable bits.
102 if (portsc
& PORT_DEV_REMOVE
)
103 /* This math is hairy because bit 0 of DeviceRemovable
104 * is reserved, and bit 1 is for port 1, etc.
106 port_removable
[(i
+ 1) / 8] |= 1 << ((i
+ 1) % 8);
109 /* ch11.h defines a hub descriptor that has room for USB_MAXCHILDREN
110 * ports on it. The USB 2.0 specification says that there are two
111 * variable length fields at the end of the hub descriptor:
112 * DeviceRemovable and PortPwrCtrlMask. But since we can have less than
113 * USB_MAXCHILDREN ports, we may need to use the DeviceRemovable array
114 * to set PortPwrCtrlMask bits. PortPwrCtrlMask must always be set to
115 * 0xFF, so we initialize the both arrays (DeviceRemovable and
116 * PortPwrCtrlMask) to 0xFF. Then we set the DeviceRemovable for each
117 * set of ports that actually exist.
119 memset(desc
->u
.hs
.DeviceRemovable
, 0xff,
120 sizeof(desc
->u
.hs
.DeviceRemovable
));
121 memset(desc
->u
.hs
.PortPwrCtrlMask
, 0xff,
122 sizeof(desc
->u
.hs
.PortPwrCtrlMask
));
124 for (i
= 0; i
< (ports
+ 1 + 7) / 8; i
++)
125 memset(&desc
->u
.hs
.DeviceRemovable
[i
], port_removable
[i
],
129 /* Fill in the USB 3.0 roothub descriptor */
130 static void xhci_usb3_hub_descriptor(struct usb_hcd
*hcd
, struct xhci_hcd
*xhci
,
131 struct usb_hub_descriptor
*desc
)
138 ports
= xhci
->num_usb3_ports
;
139 xhci_common_hub_descriptor(xhci
, desc
, ports
);
140 desc
->bDescriptorType
= 0x2a;
141 desc
->bDescLength
= 12;
143 /* header decode latency should be zero for roothubs,
144 * see section 4.23.5.2.
146 desc
->u
.ss
.bHubHdrDecLat
= 0;
147 desc
->u
.ss
.wHubDelay
= 0;
150 /* bit 0 is reserved, bit 1 is for port 1, etc. */
151 for (i
= 0; i
< ports
; i
++) {
152 portsc
= xhci_readl(xhci
, xhci
->usb3_ports
[i
]);
153 if (portsc
& PORT_DEV_REMOVE
)
154 port_removable
|= 1 << (i
+ 1);
156 memset(&desc
->u
.ss
.DeviceRemovable
,
157 (__force __u16
) cpu_to_le16(port_removable
),
161 static void xhci_hub_descriptor(struct usb_hcd
*hcd
, struct xhci_hcd
*xhci
,
162 struct usb_hub_descriptor
*desc
)
165 if (hcd
->speed
== HCD_USB3
)
166 xhci_usb3_hub_descriptor(hcd
, xhci
, desc
);
168 xhci_usb2_hub_descriptor(hcd
, xhci
, desc
);
172 static unsigned int xhci_port_speed(unsigned int port_status
)
174 if (DEV_LOWSPEED(port_status
))
175 return USB_PORT_STAT_LOW_SPEED
;
176 if (DEV_HIGHSPEED(port_status
))
177 return USB_PORT_STAT_HIGH_SPEED
;
179 * FIXME: Yes, we should check for full speed, but the core uses that as
180 * a default in portspeed() in usb/core/hub.c (which is the only place
181 * USB_PORT_STAT_*_SPEED is used).
187 * These bits are Read Only (RO) and should be saved and written to the
188 * registers: 0, 3, 10:13, 30
189 * connect status, over-current status, port speed, and device removable.
190 * connect status and port speed are also sticky - meaning they're in
191 * the AUX well and they aren't changed by a hot, warm, or cold reset.
193 #define XHCI_PORT_RO ((1<<0) | (1<<3) | (0xf<<10) | (1<<30))
195 * These bits are RW; writing a 0 clears the bit, writing a 1 sets the bit:
196 * bits 5:8, 9, 14:15, 25:27
197 * link state, port power, port indicator state, "wake on" enable state
199 #define XHCI_PORT_RWS ((0xf<<5) | (1<<9) | (0x3<<14) | (0x7<<25))
201 * These bits are RW; writing a 1 sets the bit, writing a 0 has no effect:
204 #define XHCI_PORT_RW1S ((1<<4))
206 * These bits are RW; writing a 1 clears the bit, writing a 0 has no effect:
207 * bits 1, 17, 18, 19, 20, 21, 22, 23
208 * port enable/disable, and
209 * change bits: connect, PED, warm port reset changed (reserved zero for USB 2.0 ports),
210 * over-current, reset, link state, and L1 change
212 #define XHCI_PORT_RW1CS ((1<<1) | (0x7f<<17))
214 * Bit 16 is RW, and writing a '1' to it causes the link state control to be
217 #define XHCI_PORT_RW ((1<<16))
219 * These bits are Reserved Zero (RsvdZ) and zero should be written to them:
222 #define XHCI_PORT_RZ ((1<<2) | (1<<24) | (0xf<<28))
225 * Given a port state, this function returns a value that would result in the
226 * port being in the same state, if the value was written to the port status
228 * Save Read Only (RO) bits and save read/write bits where
229 * writing a 0 clears the bit and writing a 1 sets the bit (RWS).
230 * For all other types (RW1S, RW1CS, RW, and RZ), writing a '0' has no effect.
232 u32
xhci_port_state_to_neutral(u32 state
)
234 /* Save read-only status and port state */
235 return (state
& XHCI_PORT_RO
) | (state
& XHCI_PORT_RWS
);
239 * find slot id based on port number.
240 * @port: The one-based port number from one of the two split roothubs.
242 int xhci_find_slot_id_by_port(struct usb_hcd
*hcd
, struct xhci_hcd
*xhci
,
247 enum usb_device_speed speed
;
250 for (i
= 0; i
< MAX_HC_SLOTS
; i
++) {
253 speed
= xhci
->devs
[i
]->udev
->speed
;
254 if (((speed
== USB_SPEED_SUPER
) == (hcd
->speed
== HCD_USB3
))
255 && xhci
->devs
[i
]->fake_port
== port
) {
266 * It issues stop endpoint command for EP 0 to 30. And wait the last command
268 * suspend will set to 1, if suspend bit need to set in command.
270 static int xhci_stop_device(struct xhci_hcd
*xhci
, int slot_id
, int suspend
)
272 struct xhci_virt_device
*virt_dev
;
273 struct xhci_command
*cmd
;
280 virt_dev
= xhci
->devs
[slot_id
];
281 cmd
= xhci_alloc_command(xhci
, false, true, GFP_NOIO
);
283 xhci_dbg(xhci
, "Couldn't allocate command structure.\n");
287 spin_lock_irqsave(&xhci
->lock
, flags
);
288 for (i
= LAST_EP_INDEX
; i
> 0; i
--) {
289 if (virt_dev
->eps
[i
].ring
&& virt_dev
->eps
[i
].ring
->dequeue
)
290 xhci_queue_stop_endpoint(xhci
, slot_id
, i
, suspend
);
292 cmd
->command_trb
= xhci
->cmd_ring
->enqueue
;
293 list_add_tail(&cmd
->cmd_list
, &virt_dev
->cmd_list
);
294 xhci_queue_stop_endpoint(xhci
, slot_id
, 0, suspend
);
295 xhci_ring_cmd_db(xhci
);
296 spin_unlock_irqrestore(&xhci
->lock
, flags
);
298 /* Wait for last stop endpoint command to finish */
299 timeleft
= wait_for_completion_interruptible_timeout(
301 USB_CTRL_SET_TIMEOUT
);
303 xhci_warn(xhci
, "%s while waiting for stop endpoint command\n",
304 timeleft
== 0 ? "Timeout" : "Signal");
305 spin_lock_irqsave(&xhci
->lock
, flags
);
306 /* The timeout might have raced with the event ring handler, so
307 * only delete from the list if the item isn't poisoned.
309 if (cmd
->cmd_list
.next
!= LIST_POISON1
)
310 list_del(&cmd
->cmd_list
);
311 spin_unlock_irqrestore(&xhci
->lock
, flags
);
313 goto command_cleanup
;
317 xhci_free_command(xhci
, cmd
);
322 * Ring device, it rings the all doorbells unconditionally.
324 void xhci_ring_device(struct xhci_hcd
*xhci
, int slot_id
)
328 for (i
= 0; i
< LAST_EP_INDEX
+ 1; i
++)
329 if (xhci
->devs
[slot_id
]->eps
[i
].ring
&&
330 xhci
->devs
[slot_id
]->eps
[i
].ring
->dequeue
)
331 xhci_ring_ep_doorbell(xhci
, slot_id
, i
, 0);
336 static void xhci_disable_port(struct usb_hcd
*hcd
, struct xhci_hcd
*xhci
,
337 u16 wIndex
, __le32 __iomem
*addr
, u32 port_status
)
339 /* Don't allow the USB core to disable SuperSpeed ports. */
340 if (hcd
->speed
== HCD_USB3
) {
341 xhci_dbg(xhci
, "Ignoring request to disable "
342 "SuperSpeed port.\n");
346 /* Write 1 to disable the port */
347 xhci_writel(xhci
, port_status
| PORT_PE
, addr
);
348 port_status
= xhci_readl(xhci
, addr
);
349 xhci_dbg(xhci
, "disable port, actual port %d status = 0x%x\n",
350 wIndex
, port_status
);
353 static void xhci_clear_port_change_bit(struct xhci_hcd
*xhci
, u16 wValue
,
354 u16 wIndex
, __le32 __iomem
*addr
, u32 port_status
)
356 char *port_change_bit
;
360 case USB_PORT_FEAT_C_RESET
:
362 port_change_bit
= "reset";
364 case USB_PORT_FEAT_C_BH_PORT_RESET
:
366 port_change_bit
= "warm(BH) reset";
368 case USB_PORT_FEAT_C_CONNECTION
:
370 port_change_bit
= "connect";
372 case USB_PORT_FEAT_C_OVER_CURRENT
:
374 port_change_bit
= "over-current";
376 case USB_PORT_FEAT_C_ENABLE
:
378 port_change_bit
= "enable/disable";
380 case USB_PORT_FEAT_C_SUSPEND
:
382 port_change_bit
= "suspend/resume";
384 case USB_PORT_FEAT_C_PORT_LINK_STATE
:
386 port_change_bit
= "link state";
389 /* Should never happen */
392 /* Change bits are all write 1 to clear */
393 xhci_writel(xhci
, port_status
| status
, addr
);
394 port_status
= xhci_readl(xhci
, addr
);
395 xhci_dbg(xhci
, "clear port %s change, actual port %d status = 0x%x\n",
396 port_change_bit
, wIndex
, port_status
);
399 static int xhci_get_ports(struct usb_hcd
*hcd
, __le32 __iomem
***port_array
)
402 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
404 if (hcd
->speed
== HCD_USB3
) {
405 max_ports
= xhci
->num_usb3_ports
;
406 *port_array
= xhci
->usb3_ports
;
408 max_ports
= xhci
->num_usb2_ports
;
409 *port_array
= xhci
->usb2_ports
;
415 void xhci_set_link_state(struct xhci_hcd
*xhci
, __le32 __iomem
**port_array
,
416 int port_id
, u32 link_state
)
420 temp
= xhci_readl(xhci
, port_array
[port_id
]);
421 temp
= xhci_port_state_to_neutral(temp
);
422 temp
&= ~PORT_PLS_MASK
;
423 temp
|= PORT_LINK_STROBE
| link_state
;
424 xhci_writel(xhci
, temp
, port_array
[port_id
]);
427 /* Test and clear port RWC bit */
428 void xhci_test_and_clear_bit(struct xhci_hcd
*xhci
, __le32 __iomem
**port_array
,
429 int port_id
, u32 port_bit
)
433 temp
= xhci_readl(xhci
, port_array
[port_id
]);
434 if (temp
& port_bit
) {
435 temp
= xhci_port_state_to_neutral(temp
);
437 xhci_writel(xhci
, temp
, port_array
[port_id
]);
441 int xhci_hub_control(struct usb_hcd
*hcd
, u16 typeReq
, u16 wValue
,
442 u16 wIndex
, char *buf
, u16 wLength
)
444 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
449 __le32 __iomem
**port_array
;
451 struct xhci_bus_state
*bus_state
;
454 max_ports
= xhci_get_ports(hcd
, &port_array
);
455 bus_state
= &xhci
->bus_state
[hcd_index(hcd
)];
457 spin_lock_irqsave(&xhci
->lock
, flags
);
460 /* No power source, over-current reported per port */
463 case GetHubDescriptor
:
464 /* Check to make sure userspace is asking for the USB 3.0 hub
465 * descriptor for the USB 3.0 roothub. If not, we stall the
466 * endpoint, like external hubs do.
468 if (hcd
->speed
== HCD_USB3
&&
469 (wLength
< USB_DT_SS_HUB_SIZE
||
470 wValue
!= (USB_DT_SS_HUB
<< 8))) {
471 xhci_dbg(xhci
, "Wrong hub descriptor type for "
472 "USB 3.0 roothub.\n");
475 xhci_hub_descriptor(hcd
, xhci
,
476 (struct usb_hub_descriptor
*) buf
);
478 case DeviceRequest
| USB_REQ_GET_DESCRIPTOR
:
479 if ((wValue
& 0xff00) != (USB_DT_BOS
<< 8))
482 if (hcd
->speed
!= HCD_USB3
)
485 memcpy(buf
, &usb_bos_descriptor
,
486 USB_DT_BOS_SIZE
+ USB_DT_USB_SS_CAP_SIZE
);
487 temp
= xhci_readl(xhci
, &xhci
->cap_regs
->hcs_params3
);
488 buf
[12] = HCS_U1_LATENCY(temp
);
489 put_unaligned_le16(HCS_U2_LATENCY(temp
), &buf
[13]);
491 spin_unlock_irqrestore(&xhci
->lock
, flags
);
492 return USB_DT_BOS_SIZE
+ USB_DT_USB_SS_CAP_SIZE
;
494 if (!wIndex
|| wIndex
> max_ports
)
498 temp
= xhci_readl(xhci
, port_array
[wIndex
]);
499 if (temp
== 0xffffffff) {
503 xhci_dbg(xhci
, "get port status, actual port %d status = 0x%x\n", wIndex
, temp
);
505 /* wPortChange bits */
507 status
|= USB_PORT_STAT_C_CONNECTION
<< 16;
509 status
|= USB_PORT_STAT_C_ENABLE
<< 16;
510 if ((temp
& PORT_OCC
))
511 status
|= USB_PORT_STAT_C_OVERCURRENT
<< 16;
512 if ((temp
& PORT_RC
))
513 status
|= USB_PORT_STAT_C_RESET
<< 16;
515 if (hcd
->speed
== HCD_USB3
) {
516 if ((temp
& PORT_PLC
))
517 status
|= USB_PORT_STAT_C_LINK_STATE
<< 16;
518 if ((temp
& PORT_WRC
))
519 status
|= USB_PORT_STAT_C_BH_RESET
<< 16;
522 if (hcd
->speed
!= HCD_USB3
) {
523 if ((temp
& PORT_PLS_MASK
) == XDEV_U3
524 && (temp
& PORT_POWER
))
525 status
|= USB_PORT_STAT_SUSPEND
;
527 if ((temp
& PORT_PLS_MASK
) == XDEV_RESUME
&&
528 !DEV_SUPERSPEED(temp
)) {
529 if ((temp
& PORT_RESET
) || !(temp
& PORT_PE
))
531 if (time_after_eq(jiffies
,
532 bus_state
->resume_done
[wIndex
])) {
533 xhci_dbg(xhci
, "Resume USB2 port %d\n",
535 bus_state
->resume_done
[wIndex
] = 0;
536 xhci_set_link_state(xhci
, port_array
, wIndex
,
538 xhci_dbg(xhci
, "set port %d resume\n",
540 slot_id
= xhci_find_slot_id_by_port(hcd
, xhci
,
543 xhci_dbg(xhci
, "slot_id is zero\n");
546 xhci_ring_device(xhci
, slot_id
);
547 bus_state
->port_c_suspend
|= 1 << wIndex
;
548 bus_state
->suspended_ports
&= ~(1 << wIndex
);
551 * The resume has been signaling for less than
552 * 20ms. Report the port status as SUSPEND,
553 * let the usbcore check port status again
554 * and clear resume signaling later.
556 status
|= USB_PORT_STAT_SUSPEND
;
559 if ((temp
& PORT_PLS_MASK
) == XDEV_U0
560 && (temp
& PORT_POWER
)
561 && (bus_state
->suspended_ports
& (1 << wIndex
))) {
562 bus_state
->suspended_ports
&= ~(1 << wIndex
);
563 if (hcd
->speed
!= HCD_USB3
)
564 bus_state
->port_c_suspend
|= 1 << wIndex
;
566 if (temp
& PORT_CONNECT
) {
567 status
|= USB_PORT_STAT_CONNECTION
;
568 status
|= xhci_port_speed(temp
);
571 status
|= USB_PORT_STAT_ENABLE
;
573 status
|= USB_PORT_STAT_OVERCURRENT
;
574 if (temp
& PORT_RESET
)
575 status
|= USB_PORT_STAT_RESET
;
576 if (temp
& PORT_POWER
) {
577 if (hcd
->speed
== HCD_USB3
)
578 status
|= USB_SS_PORT_STAT_POWER
;
580 status
|= USB_PORT_STAT_POWER
;
582 /* Port Link State */
583 if (hcd
->speed
== HCD_USB3
) {
584 /* resume state is a xHCI internal state.
585 * Do not report it to usb core.
587 if ((temp
& PORT_PLS_MASK
) != XDEV_RESUME
)
588 status
|= (temp
& PORT_PLS_MASK
);
590 if (bus_state
->port_c_suspend
& (1 << wIndex
))
591 status
|= 1 << USB_PORT_FEAT_C_SUSPEND
;
592 xhci_dbg(xhci
, "Get port status returned 0x%x\n", status
);
593 put_unaligned(cpu_to_le32(status
), (__le32
*) buf
);
596 if (wValue
== USB_PORT_FEAT_LINK_STATE
)
597 link_state
= (wIndex
& 0xff00) >> 3;
599 if (!wIndex
|| wIndex
> max_ports
)
602 temp
= xhci_readl(xhci
, port_array
[wIndex
]);
603 if (temp
== 0xffffffff) {
607 temp
= xhci_port_state_to_neutral(temp
);
608 /* FIXME: What new port features do we need to support? */
610 case USB_PORT_FEAT_SUSPEND
:
611 temp
= xhci_readl(xhci
, port_array
[wIndex
]);
612 if ((temp
& PORT_PLS_MASK
) != XDEV_U0
) {
613 /* Resume the port to U0 first */
614 xhci_set_link_state(xhci
, port_array
, wIndex
,
616 spin_unlock_irqrestore(&xhci
->lock
, flags
);
618 spin_lock_irqsave(&xhci
->lock
, flags
);
620 /* In spec software should not attempt to suspend
621 * a port unless the port reports that it is in the
622 * enabled (PED = ‘1’,PLS < ‘3’) state.
624 temp
= xhci_readl(xhci
, port_array
[wIndex
]);
625 if ((temp
& PORT_PE
) == 0 || (temp
& PORT_RESET
)
626 || (temp
& PORT_PLS_MASK
) >= XDEV_U3
) {
627 xhci_warn(xhci
, "USB core suspending device "
628 "not in U0/U1/U2.\n");
632 slot_id
= xhci_find_slot_id_by_port(hcd
, xhci
,
635 xhci_warn(xhci
, "slot_id is zero\n");
638 /* unlock to execute stop endpoint commands */
639 spin_unlock_irqrestore(&xhci
->lock
, flags
);
640 xhci_stop_device(xhci
, slot_id
, 1);
641 spin_lock_irqsave(&xhci
->lock
, flags
);
643 xhci_set_link_state(xhci
, port_array
, wIndex
, XDEV_U3
);
645 spin_unlock_irqrestore(&xhci
->lock
, flags
);
646 msleep(10); /* wait device to enter */
647 spin_lock_irqsave(&xhci
->lock
, flags
);
649 temp
= xhci_readl(xhci
, port_array
[wIndex
]);
650 bus_state
->suspended_ports
|= 1 << wIndex
;
652 case USB_PORT_FEAT_LINK_STATE
:
653 temp
= xhci_readl(xhci
, port_array
[wIndex
]);
654 /* Software should not attempt to set
655 * port link state above '5' (Rx.Detect) and the port
658 if ((temp
& PORT_PE
) == 0 ||
659 (link_state
> USB_SS_PORT_LS_RX_DETECT
)) {
660 xhci_warn(xhci
, "Cannot set link state.\n");
664 if (link_state
== USB_SS_PORT_LS_U3
) {
665 slot_id
= xhci_find_slot_id_by_port(hcd
, xhci
,
668 /* unlock to execute stop endpoint
670 spin_unlock_irqrestore(&xhci
->lock
,
672 xhci_stop_device(xhci
, slot_id
, 1);
673 spin_lock_irqsave(&xhci
->lock
, flags
);
677 xhci_set_link_state(xhci
, port_array
, wIndex
,
680 spin_unlock_irqrestore(&xhci
->lock
, flags
);
681 msleep(20); /* wait device to enter */
682 spin_lock_irqsave(&xhci
->lock
, flags
);
684 temp
= xhci_readl(xhci
, port_array
[wIndex
]);
685 if (link_state
== USB_SS_PORT_LS_U3
)
686 bus_state
->suspended_ports
|= 1 << wIndex
;
688 case USB_PORT_FEAT_POWER
:
690 * Turn on ports, even if there isn't per-port switching.
691 * HC will report connect events even before this is set.
692 * However, khubd will ignore the roothub events until
693 * the roothub is registered.
695 xhci_writel(xhci
, temp
| PORT_POWER
,
698 temp
= xhci_readl(xhci
, port_array
[wIndex
]);
699 xhci_dbg(xhci
, "set port power, actual port %d status = 0x%x\n", wIndex
, temp
);
701 case USB_PORT_FEAT_RESET
:
702 temp
= (temp
| PORT_RESET
);
703 xhci_writel(xhci
, temp
, port_array
[wIndex
]);
705 temp
= xhci_readl(xhci
, port_array
[wIndex
]);
706 xhci_dbg(xhci
, "set port reset, actual port %d status = 0x%x\n", wIndex
, temp
);
708 case USB_PORT_FEAT_BH_PORT_RESET
:
710 xhci_writel(xhci
, temp
, port_array
[wIndex
]);
712 temp
= xhci_readl(xhci
, port_array
[wIndex
]);
717 /* unblock any posted writes */
718 temp
= xhci_readl(xhci
, port_array
[wIndex
]);
720 case ClearPortFeature
:
721 if (!wIndex
|| wIndex
> max_ports
)
724 temp
= xhci_readl(xhci
, port_array
[wIndex
]);
725 if (temp
== 0xffffffff) {
729 /* FIXME: What new port features do we need to support? */
730 temp
= xhci_port_state_to_neutral(temp
);
732 case USB_PORT_FEAT_SUSPEND
:
733 temp
= xhci_readl(xhci
, port_array
[wIndex
]);
734 xhci_dbg(xhci
, "clear USB_PORT_FEAT_SUSPEND\n");
735 xhci_dbg(xhci
, "PORTSC %04x\n", temp
);
736 if (temp
& PORT_RESET
)
738 if ((temp
& PORT_PLS_MASK
) == XDEV_U3
) {
739 if ((temp
& PORT_PE
) == 0)
742 xhci_set_link_state(xhci
, port_array
, wIndex
,
744 spin_unlock_irqrestore(&xhci
->lock
, flags
);
746 spin_lock_irqsave(&xhci
->lock
, flags
);
747 xhci_set_link_state(xhci
, port_array
, wIndex
,
750 bus_state
->port_c_suspend
|= 1 << wIndex
;
752 slot_id
= xhci_find_slot_id_by_port(hcd
, xhci
,
755 xhci_dbg(xhci
, "slot_id is zero\n");
758 xhci_ring_device(xhci
, slot_id
);
760 case USB_PORT_FEAT_C_SUSPEND
:
761 bus_state
->port_c_suspend
&= ~(1 << wIndex
);
762 case USB_PORT_FEAT_C_RESET
:
763 case USB_PORT_FEAT_C_BH_PORT_RESET
:
764 case USB_PORT_FEAT_C_CONNECTION
:
765 case USB_PORT_FEAT_C_OVER_CURRENT
:
766 case USB_PORT_FEAT_C_ENABLE
:
767 case USB_PORT_FEAT_C_PORT_LINK_STATE
:
768 xhci_clear_port_change_bit(xhci
, wValue
, wIndex
,
769 port_array
[wIndex
], temp
);
771 case USB_PORT_FEAT_ENABLE
:
772 xhci_disable_port(hcd
, xhci
, wIndex
,
773 port_array
[wIndex
], temp
);
781 /* "stall" on error */
784 spin_unlock_irqrestore(&xhci
->lock
, flags
);
789 * Returns 0 if the status hasn't changed, or the number of bytes in buf.
790 * Ports are 0-indexed from the HCD point of view,
791 * and 1-indexed from the USB core pointer of view.
793 * Note that the status change bits will be cleared as soon as a port status
794 * change event is generated, so we use the saved status from that event.
796 int xhci_hub_status_data(struct usb_hcd
*hcd
, char *buf
)
802 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
804 __le32 __iomem
**port_array
;
805 struct xhci_bus_state
*bus_state
;
807 max_ports
= xhci_get_ports(hcd
, &port_array
);
808 bus_state
= &xhci
->bus_state
[hcd_index(hcd
)];
810 /* Initial status is no changes */
811 retval
= (max_ports
+ 8) / 8;
812 memset(buf
, 0, retval
);
815 mask
= PORT_CSC
| PORT_PEC
| PORT_OCC
| PORT_PLC
| PORT_WRC
;
817 spin_lock_irqsave(&xhci
->lock
, flags
);
818 /* For each port, did anything change? If so, set that bit in buf. */
819 for (i
= 0; i
< max_ports
; i
++) {
820 temp
= xhci_readl(xhci
, port_array
[i
]);
821 if (temp
== 0xffffffff) {
825 if ((temp
& mask
) != 0 ||
826 (bus_state
->port_c_suspend
& 1 << i
) ||
827 (bus_state
->resume_done
[i
] && time_after_eq(
828 jiffies
, bus_state
->resume_done
[i
]))) {
829 buf
[(i
+ 1) / 8] |= 1 << (i
+ 1) % 8;
833 spin_unlock_irqrestore(&xhci
->lock
, flags
);
834 return status
? retval
: 0;
839 int xhci_bus_suspend(struct usb_hcd
*hcd
)
841 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
842 int max_ports
, port_index
;
843 __le32 __iomem
**port_array
;
844 struct xhci_bus_state
*bus_state
;
847 max_ports
= xhci_get_ports(hcd
, &port_array
);
848 bus_state
= &xhci
->bus_state
[hcd_index(hcd
)];
850 spin_lock_irqsave(&xhci
->lock
, flags
);
852 if (hcd
->self
.root_hub
->do_remote_wakeup
) {
853 port_index
= max_ports
;
854 while (port_index
--) {
855 if (bus_state
->resume_done
[port_index
] != 0) {
856 spin_unlock_irqrestore(&xhci
->lock
, flags
);
857 xhci_dbg(xhci
, "suspend failed because "
858 "port %d is resuming\n",
865 port_index
= max_ports
;
866 bus_state
->bus_suspended
= 0;
867 while (port_index
--) {
868 /* suspend the port if the port is not suspended */
872 t1
= xhci_readl(xhci
, port_array
[port_index
]);
873 t2
= xhci_port_state_to_neutral(t1
);
875 if ((t1
& PORT_PE
) && !(t1
& PORT_PLS_MASK
)) {
876 xhci_dbg(xhci
, "port %d not suspended\n", port_index
);
877 slot_id
= xhci_find_slot_id_by_port(hcd
, xhci
,
880 spin_unlock_irqrestore(&xhci
->lock
, flags
);
881 xhci_stop_device(xhci
, slot_id
, 1);
882 spin_lock_irqsave(&xhci
->lock
, flags
);
884 t2
&= ~PORT_PLS_MASK
;
885 t2
|= PORT_LINK_STROBE
| XDEV_U3
;
886 set_bit(port_index
, &bus_state
->bus_suspended
);
888 if (hcd
->self
.root_hub
->do_remote_wakeup
) {
889 if (t1
& PORT_CONNECT
) {
890 t2
|= PORT_WKOC_E
| PORT_WKDISC_E
;
891 t2
&= ~PORT_WKCONN_E
;
893 t2
|= PORT_WKOC_E
| PORT_WKCONN_E
;
894 t2
&= ~PORT_WKDISC_E
;
897 t2
&= ~PORT_WAKE_BITS
;
899 t1
= xhci_port_state_to_neutral(t1
);
901 xhci_writel(xhci
, t2
, port_array
[port_index
]);
903 if (hcd
->speed
!= HCD_USB3
) {
904 /* enable remote wake up for USB 2.0 */
905 __le32 __iomem
*addr
;
908 /* Add one to the port status register address to get
909 * the port power control register address.
911 addr
= port_array
[port_index
] + 1;
912 tmp
= xhci_readl(xhci
, addr
);
914 xhci_writel(xhci
, tmp
, addr
);
917 hcd
->state
= HC_STATE_SUSPENDED
;
918 bus_state
->next_statechange
= jiffies
+ msecs_to_jiffies(10);
919 spin_unlock_irqrestore(&xhci
->lock
, flags
);
923 int xhci_bus_resume(struct usb_hcd
*hcd
)
925 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
926 int max_ports
, port_index
;
927 __le32 __iomem
**port_array
;
928 struct xhci_bus_state
*bus_state
;
932 max_ports
= xhci_get_ports(hcd
, &port_array
);
933 bus_state
= &xhci
->bus_state
[hcd_index(hcd
)];
935 if (time_before(jiffies
, bus_state
->next_statechange
))
938 spin_lock_irqsave(&xhci
->lock
, flags
);
939 if (!HCD_HW_ACCESSIBLE(hcd
)) {
940 spin_unlock_irqrestore(&xhci
->lock
, flags
);
945 temp
= xhci_readl(xhci
, &xhci
->op_regs
->command
);
947 xhci_writel(xhci
, temp
, &xhci
->op_regs
->command
);
949 port_index
= max_ports
;
950 while (port_index
--) {
951 /* Check whether need resume ports. If needed
952 resume port and disable remote wakeup */
956 temp
= xhci_readl(xhci
, port_array
[port_index
]);
957 if (DEV_SUPERSPEED(temp
))
958 temp
&= ~(PORT_RWC_BITS
| PORT_CEC
| PORT_WAKE_BITS
);
960 temp
&= ~(PORT_RWC_BITS
| PORT_WAKE_BITS
);
961 if (test_bit(port_index
, &bus_state
->bus_suspended
) &&
962 (temp
& PORT_PLS_MASK
)) {
963 if (DEV_SUPERSPEED(temp
)) {
964 xhci_set_link_state(xhci
, port_array
,
965 port_index
, XDEV_U0
);
967 xhci_set_link_state(xhci
, port_array
,
968 port_index
, XDEV_RESUME
);
970 spin_unlock_irqrestore(&xhci
->lock
, flags
);
972 spin_lock_irqsave(&xhci
->lock
, flags
);
974 xhci_set_link_state(xhci
, port_array
,
975 port_index
, XDEV_U0
);
977 /* wait for the port to enter U0 and report port link
980 spin_unlock_irqrestore(&xhci
->lock
, flags
);
982 spin_lock_irqsave(&xhci
->lock
, flags
);
985 xhci_test_and_clear_bit(xhci
, port_array
, port_index
,
988 slot_id
= xhci_find_slot_id_by_port(hcd
,
989 xhci
, port_index
+ 1);
991 xhci_ring_device(xhci
, slot_id
);
993 xhci_writel(xhci
, temp
, port_array
[port_index
]);
995 if (hcd
->speed
!= HCD_USB3
) {
996 /* disable remote wake up for USB 2.0 */
997 __le32 __iomem
*addr
;
1000 /* Add one to the port status register address to get
1001 * the port power control register address.
1003 addr
= port_array
[port_index
] + 1;
1004 tmp
= xhci_readl(xhci
, addr
);
1006 xhci_writel(xhci
, tmp
, addr
);
1010 (void) xhci_readl(xhci
, &xhci
->op_regs
->command
);
1012 bus_state
->next_statechange
= jiffies
+ msecs_to_jiffies(5);
1013 /* re-enable irqs */
1014 temp
= xhci_readl(xhci
, &xhci
->op_regs
->command
);
1016 xhci_writel(xhci
, temp
, &xhci
->op_regs
->command
);
1017 temp
= xhci_readl(xhci
, &xhci
->op_regs
->command
);
1019 spin_unlock_irqrestore(&xhci
->lock
, flags
);
1023 #endif /* CONFIG_PM */