arch/avr32/kernel/cpu.c

   1 /*
   2  * Copyright (C) 2005-2006 Atmel Corporation
   3  *
   4  * This program is free software; you can redistribute it and/or modify
   5  * it under the terms of the GNU General Public License version 2 as
   6  * published by the Free Software Foundation.
   7  */
   8 #include <linux/init.h>
   9 #include <linux/device.h>
  10 #include <linux/seq_file.h>
  11 #include <linux/cpu.h>
  12 #include <linux/module.h>
  13 #include <linux/percpu.h>
  14 #include <linux/param.h>
  15 #include <linux/errno.h>
  16 #include <linux/clk.h>
  17
  18 #include <asm/setup.h>
  19 #include <asm/sysreg.h>
  20
  21 static DEFINE_PER_CPU(struct cpu, cpu_devices);
  22
  23 #ifdef CONFIG_PERFORMANCE_COUNTERS
  24
  25 /*
  26  * XXX: If/when a SMP-capable implementation of AVR32 will ever be
  27  * made, we must make sure that the code executes on the correct CPU.
  28  */
  29 static ssize_t show_pc0event(struct device *dev,
  30                         struct device_attribute *attr, char *buf)
  31 {
  32         unsigned long pccr;
  33
  34         pccr = sysreg_read(PCCR);
  35         return sprintf(buf, "0x%lx\n", (pccr >> 12) & 0x3f);
  36 }
  37 static ssize_t store_pc0event(struct device *dev,
  38                         struct device_attribute *attr, const char *buf,
  39                               size_t count)
  40 {
  41         unsigned long val;
  42         char *endp;
  43
  44         val = simple_strtoul(buf, &endp, 0);
  45         if (endp == buf || val > 0x3f)
  46                 return -EINVAL;
  47         val = (val << 12) | (sysreg_read(PCCR) & 0xfffc0fff);
  48         sysreg_write(PCCR, val);
  49         return count;
  50 }
  51 static ssize_t show_pc0count(struct device *dev,
  52                         struct device_attribute *attr, char *buf)
  53 {
  54         unsigned long pcnt0;
  55
  56         pcnt0 = sysreg_read(PCNT0);
  57         return sprintf(buf, "%lu\n", pcnt0);
  58 }
  59 static ssize_t store_pc0count(struct device *dev,
  60                                 struct device_attribute *attr,
  61                                 const char *buf, size_t count)
  62 {
  63         unsigned long val;
  64         char *endp;
  65
  66         val = simple_strtoul(buf, &endp, 0);
  67         if (endp == buf)
  68                 return -EINVAL;
  69         sysreg_write(PCNT0, val);
  70
  71         return count;
  72 }
  73
  74 static ssize_t show_pc1event(struct device *dev,
  75                                 struct device_attribute *attr, char *buf)
  76 {
  77         unsigned long pccr;
  78
  79         pccr = sysreg_read(PCCR);
  80         return sprintf(buf, "0x%lx\n", (pccr >> 18) & 0x3f);
  81 }
  82 static ssize_t store_pc1event(struct device *dev,
  83                               struct device_attribute *attr, const char *buf,
  84                               size_t count)
  85 {
  86         unsigned long val;
  87         char *endp;
  88
  89         val = simple_strtoul(buf, &endp, 0);
  90         if (endp == buf || val > 0x3f)
  91                 return -EINVAL;
  92         val = (val << 18) | (sysreg_read(PCCR) & 0xff03ffff);
  93         sysreg_write(PCCR, val);
  94         return count;
  95 }
  96 static ssize_t show_pc1count(struct device *dev,
  97                                 struct device_attribute *attr, char *buf)
  98 {
  99         unsigned long pcnt1;
 100
 101         pcnt1 = sysreg_read(PCNT1);
 102         return sprintf(buf, "%lu\n", pcnt1);
 103 }
 104 static ssize_t store_pc1count(struct device *dev,
 105                                 struct device_attribute *attr, const char *buf,
 106                               size_t count)
 107 {
 108         unsigned long val;
 109         char *endp;
 110
 111         val = simple_strtoul(buf, &endp, 0);
 112         if (endp == buf)
 113                 return -EINVAL;
 114         sysreg_write(PCNT1, val);
 115
 116         return count;
 117 }
 118
 119 static ssize_t show_pccycles(struct device *dev,
 120                                 struct device_attribute *attr, char *buf)
 121 {
 122         unsigned long pccnt;
 123
 124         pccnt = sysreg_read(PCCNT);
 125         return sprintf(buf, "%lu\n", pccnt);
 126 }
 127 static ssize_t store_pccycles(struct device *dev,
 128                                 struct device_attribute *attr, const char *buf,
 129                               size_t count)
 130 {
 131         unsigned long val;
 132         char *endp;
 133
 134         val = simple_strtoul(buf, &endp, 0);
 135         if (endp == buf)
 136                 return -EINVAL;
 137         sysreg_write(PCCNT, val);
 138
 139         return count;
 140 }
 141
 142 static ssize_t show_pcenable(struct device *dev,
 143                         struct device_attribute *attr, char *buf)
 144 {
 145         unsigned long pccr;
 146
 147         pccr = sysreg_read(PCCR);
 148         return sprintf(buf, "%c\n", (pccr & 1)?'1':'0');
 149 }
 150 static ssize_t store_pcenable(struct device *dev,
 151                               struct device_attribute *attr, const char *buf,
 152                               size_t count)
 153 {
 154         unsigned long pccr, val;
 155         char *endp;
 156
 157         val = simple_strtoul(buf, &endp, 0);
 158         if (endp == buf)
 159                 return -EINVAL;
 160         if (val)
 161                 val = 1;
 162
 163         pccr = sysreg_read(PCCR);
 164         pccr = (pccr & ~1UL) | val;
 165         sysreg_write(PCCR, pccr);
 166
 167         return count;
 168 }
 169
 170 static DEVICE_ATTR(pc0event, 0600, show_pc0event, store_pc0event);
 171 static DEVICE_ATTR(pc0count, 0600, show_pc0count, store_pc0count);
 172 static DEVICE_ATTR(pc1event, 0600, show_pc1event, store_pc1event);
 173 static DEVICE_ATTR(pc1count, 0600, show_pc1count, store_pc1count);
 174 static DEVICE_ATTR(pccycles, 0600, show_pccycles, store_pccycles);
 175 static DEVICE_ATTR(pcenable, 0600, show_pcenable, store_pcenable);
 176
 177 #endif /* CONFIG_PERFORMANCE_COUNTERS */
 178
 179 static int __init topology_init(void)
 180 {
 181         int cpu;
 182
 183         for_each_possible_cpu(cpu) {
 184                 struct cpu *c = &per_cpu(cpu_devices, cpu);
 185
 186                 register_cpu(c, cpu);
 187
 188 #ifdef CONFIG_PERFORMANCE_COUNTERS
 189                 device_create_file(&c->dev, &dev_attr_pc0event);
 190                 device_create_file(&c->dev, &dev_attr_pc0count);
 191                 device_create_file(&c->dev, &dev_attr_pc1event);
 192                 device_create_file(&c->dev, &dev_attr_pc1count);
 193                 device_create_file(&c->dev, &dev_attr_pccycles);
 194                 device_create_file(&c->dev, &dev_attr_pcenable);
 195 #endif
 196         }
 197
 198         return 0;
 199 }
 200
 201 subsys_initcall(topology_init);
 202
 203 struct chip_id_map {
 204         u16     mid;
 205         u16     pn;
 206         const char *name;
 207 };
 208
 209 static const struct chip_id_map chip_names[] = {
 210         { .mid = 0x1f, .pn = 0x1e82, .name = "AT32AP700x" },
 211 };
 212 #define NR_CHIP_NAMES ARRAY_SIZE(chip_names)
 213
 214 static const char *cpu_names[] = {
 215         "Morgan",
 216         "AP7",
 217 };
 218 #define NR_CPU_NAMES ARRAY_SIZE(cpu_names)
 219
 220 static const char *arch_names[] = {
 221         "AVR32A",
 222         "AVR32B",
 223 };
 224 #define NR_ARCH_NAMES ARRAY_SIZE(arch_names)
 225
 226 static const char *mmu_types[] = {
 227         "No MMU",
 228         "ITLB and DTLB",
 229         "Shared TLB",
 230         "MPU"
 231 };
 232
 233 static const char *cpu_feature_flags[] = {
 234         "rmw", "dsp", "simd", "ocd", "perfctr", "java", "fpu",
 235 };
 236
 237 static const char *get_chip_name(struct avr32_cpuinfo *cpu)
 238 {
 239         unsigned int i;
 240         unsigned int mid = avr32_get_manufacturer_id(cpu);
 241         unsigned int pn = avr32_get_product_number(cpu);
 242
 243         for (i = 0; i < NR_CHIP_NAMES; i++) {
 244                 if (chip_names[i].mid == mid && chip_names[i].pn == pn)
 245                         return chip_names[i].name;
 246         }
 247
 248         return "(unknown)";
 249 }
 250
 251 void __init setup_processor(void)
 252 {
 253         unsigned long config0, config1;
 254         unsigned long features;
 255         unsigned cpu_id, cpu_rev, arch_id, arch_rev, mmu_type;
 256         unsigned device_id;
 257         unsigned tmp;
 258         unsigned i;
 259
 260         config0 = sysreg_read(CONFIG0);
 261         config1 = sysreg_read(CONFIG1);
 262         cpu_id = SYSREG_BFEXT(PROCESSORID, config0);
 263         cpu_rev = SYSREG_BFEXT(PROCESSORREVISION, config0);
 264         arch_id = SYSREG_BFEXT(AT, config0);
 265         arch_rev = SYSREG_BFEXT(AR, config0);
 266         mmu_type = SYSREG_BFEXT(MMUT, config0);
 267
 268         device_id = ocd_read(DID);
 269
 270         boot_cpu_data.arch_type = arch_id;
 271         boot_cpu_data.cpu_type = cpu_id;
 272         boot_cpu_data.arch_revision = arch_rev;
 273         boot_cpu_data.cpu_revision = cpu_rev;
 274         boot_cpu_data.tlb_config = mmu_type;
 275         boot_cpu_data.device_id = device_id;
 276
 277         tmp = SYSREG_BFEXT(ILSZ, config1);
 278         if (tmp) {
 279                 boot_cpu_data.icache.ways = 1 << SYSREG_BFEXT(IASS, config1);
 280                 boot_cpu_data.icache.sets = 1 << SYSREG_BFEXT(ISET, config1);
 281                 boot_cpu_data.icache.linesz = 1 << (tmp + 1);
 282         }
 283         tmp = SYSREG_BFEXT(DLSZ, config1);
 284         if (tmp) {
 285                 boot_cpu_data.dcache.ways = 1 << SYSREG_BFEXT(DASS, config1);
 286                 boot_cpu_data.dcache.sets = 1 << SYSREG_BFEXT(DSET, config1);
 287                 boot_cpu_data.dcache.linesz = 1 << (tmp + 1);
 288         }
 289
 290         if ((cpu_id >= NR_CPU_NAMES) || (arch_id >= NR_ARCH_NAMES)) {
 291                 printk ("Unknown CPU configuration (ID %02x, arch %02x), "
 292                         "continuing anyway...\n",
 293                         cpu_id, arch_id);
 294                 return;
 295         }
 296
 297         printk ("CPU: %s chip revision %c\n", get_chip_name(&boot_cpu_data),
 298                         avr32_get_chip_revision(&boot_cpu_data) + 'A');
 299         printk ("CPU: %s [%02x] core revision %d (%s arch revision %d)\n",
 300                 cpu_names[cpu_id], cpu_id, cpu_rev,
 301                 arch_names[arch_id], arch_rev);
 302         printk ("CPU: MMU configuration: %s\n", mmu_types[mmu_type]);
 303
 304         printk ("CPU: features:");
 305         features = 0;
 306         if (config0 & SYSREG_BIT(CONFIG0_R))
 307                 features |= AVR32_FEATURE_RMW;
 308         if (config0 & SYSREG_BIT(CONFIG0_D))
 309                 features |= AVR32_FEATURE_DSP;
 310         if (config0 & SYSREG_BIT(CONFIG0_S))
 311                 features |= AVR32_FEATURE_SIMD;
 312         if (config0 & SYSREG_BIT(CONFIG0_O))
 313                 features |= AVR32_FEATURE_OCD;
 314         if (config0 & SYSREG_BIT(CONFIG0_P))
 315                 features |= AVR32_FEATURE_PCTR;
 316         if (config0 & SYSREG_BIT(CONFIG0_J))
 317                 features |= AVR32_FEATURE_JAVA;
 318         if (config0 & SYSREG_BIT(CONFIG0_F))
 319                 features |= AVR32_FEATURE_FPU;
 320
 321         for (i = 0; i < ARRAY_SIZE(cpu_feature_flags); i++)
 322                 if (features & (1 << i))
 323                         printk(" %s", cpu_feature_flags[i]);
 324
 325         printk("\n");
 326         boot_cpu_data.features = features;
 327 }
 328
 329 #ifdef CONFIG_PROC_FS
 330 static int c_show(struct seq_file *m, void *v)
 331 {
 332         unsigned int icache_size, dcache_size;
 333         unsigned int cpu = smp_processor_id();
 334         unsigned int freq;
 335         unsigned int i;
 336
 337         icache_size = boot_cpu_data.icache.ways *
 338                 boot_cpu_data.icache.sets *
 339                 boot_cpu_data.icache.linesz;
 340         dcache_size = boot_cpu_data.dcache.ways *
 341                 boot_cpu_data.dcache.sets *
 342                 boot_cpu_data.dcache.linesz;
 343
 344         seq_printf(m, "processor\t: %d\n", cpu);
 345
 346         seq_printf(m, "chip type\t: %s revision %c\n",
 347                         get_chip_name(&boot_cpu_data),
 348                         avr32_get_chip_revision(&boot_cpu_data) + 'A');
 349         if (boot_cpu_data.arch_type < NR_ARCH_NAMES)
 350                 seq_printf(m, "cpu arch\t: %s revision %d\n",
 351                            arch_names[boot_cpu_data.arch_type],
 352                            boot_cpu_data.arch_revision);
 353         if (boot_cpu_data.cpu_type < NR_CPU_NAMES)
 354                 seq_printf(m, "cpu core\t: %s revision %d\n",
 355                            cpu_names[boot_cpu_data.cpu_type],
 356                            boot_cpu_data.cpu_revision);
 357
 358         freq = (clk_get_rate(boot_cpu_data.clk) + 500) / 1000;
 359         seq_printf(m, "cpu MHz\t\t: %u.%03u\n", freq / 1000, freq % 1000);
 360
 361         seq_printf(m, "i-cache\t\t: %dK (%u ways x %u sets x %u)\n",
 362                    icache_size >> 10,
 363                    boot_cpu_data.icache.ways,
 364                    boot_cpu_data.icache.sets,
 365                    boot_cpu_data.icache.linesz);
 366         seq_printf(m, "d-cache\t\t: %dK (%u ways x %u sets x %u)\n",
 367                    dcache_size >> 10,
 368                    boot_cpu_data.dcache.ways,
 369                    boot_cpu_data.dcache.sets,
 370                    boot_cpu_data.dcache.linesz);
 371
 372         seq_printf(m, "features\t:");
 373         for (i = 0; i < ARRAY_SIZE(cpu_feature_flags); i++)
 374                 if (boot_cpu_data.features & (1 << i))
 375                         seq_printf(m, " %s", cpu_feature_flags[i]);
 376
 377         seq_printf(m, "\nbogomips\t: %lu.%02lu\n",
 378                    boot_cpu_data.loops_per_jiffy / (500000/HZ),
 379                    (boot_cpu_data.loops_per_jiffy / (5000/HZ)) % 100);
 380
 381         return 0;
 382 }
 383
 384 static void *c_start(struct seq_file *m, loff_t *pos)
 385 {
 386         return *pos < 1 ? (void *)1 : NULL;
 387 }
 388
 389 static void *c_next(struct seq_file *m, void *v, loff_t *pos)
 390 {
 391         ++*pos;
 392         return NULL;
 393 }
 394
 395 static void c_stop(struct seq_file *m, void *v)
 396 {
 397
 398 }
 399
 400 const struct seq_operations cpuinfo_op = {
 401         .start  = c_start,
 402         .next   = c_next,
 403         .stop   = c_stop,
 404         .show   = c_show
 405 };
 406 #endif /* CONFIG_PROC_FS */