arch/mips/alchemy/devboards/db1000.c

   1 /*
   2  * DBAu1000/1500/1100 board support
   3  *
   4  * Copyright 2000, 2008 MontaVista Software Inc.
   5  * Author: MontaVista Software, Inc. <source@mvista.com>
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License as published by
   9  * the Free Software Foundation; either version 2 of the License, or
  10  * (at your option) any later version.
  11  *
  12  * This program is distributed in the hope that it will be useful,
  13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15  * GNU General Public License for more details.
  16  *
  17  * You should have received a copy of the GNU General Public License
  18  * along with this program; if not, write to the Free Software
  19  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
  20  */
  21
  22 #include <linux/dma-mapping.h>
  23 #include <linux/gpio.h>
  24 #include <linux/init.h>
  25 #include <linux/interrupt.h>
  26 #include <linux/leds.h>
  27 #include <linux/mmc/host.h>
  28 #include <linux/module.h>
  29 #include <linux/platform_device.h>
  30 #include <linux/pm.h>
  31 #include <linux/spi/spi.h>
  32 #include <linux/spi/spi_gpio.h>
  33 #include <linux/spi/ads7846.h>
  34 #include <asm/mach-au1x00/au1000.h>
  35 #include <asm/mach-au1x00/au1000_dma.h>
  36 #include <asm/mach-au1x00/au1100_mmc.h>
  37 #include <asm/mach-db1x00/bcsr.h>
  38 #include <asm/reboot.h>
  39 #include <prom.h>
  40 #include "platform.h"
  41
  42 #define F_SWAPPED (bcsr_read(BCSR_STATUS) & BCSR_STATUS_DB1000_SWAPBOOT)
  43
  44 struct pci_dev;
  45
  46 static const char *board_type_str(void)
  47 {
  48         switch (BCSR_WHOAMI_BOARD(bcsr_read(BCSR_WHOAMI))) {
  49         case BCSR_WHOAMI_DB1000:
  50                 return "DB1000";
  51         case BCSR_WHOAMI_DB1500:
  52                 return "DB1500";
  53         case BCSR_WHOAMI_DB1100:
  54                 return "DB1100";
  55         default:
  56                 return "(unknown)";
  57         }
  58 }
  59
  60 const char *get_system_type(void)
  61 {
  62         return board_type_str();
  63 }
  64
  65 void __init board_setup(void)
  66 {
  67         /* initialize board register space */
  68         bcsr_init(DB1000_BCSR_PHYS_ADDR,
  69                   DB1000_BCSR_PHYS_ADDR + DB1000_BCSR_HEXLED_OFS);
  70
  71         printk(KERN_INFO "AMD Alchemy %s Board\n", board_type_str());
  72 }
  73
  74
  75 static int db1500_map_pci_irq(const struct pci_dev *d, u8 slot, u8 pin)
  76 {
  77         if ((slot < 12) || (slot > 13) || pin == 0)
  78                 return -1;
  79         if (slot == 12)
  80                 return (pin == 1) ? AU1500_PCI_INTA : 0xff;
  81         if (slot == 13) {
  82                 switch (pin) {
  83                 case 1: return AU1500_PCI_INTA;
  84                 case 2: return AU1500_PCI_INTB;
  85                 case 3: return AU1500_PCI_INTC;
  86                 case 4: return AU1500_PCI_INTD;
  87                 }
  88         }
  89         return -1;
  90 }
  91
  92 static struct resource alchemy_pci_host_res[] = {
  93         [0] = {
  94                 .start  = AU1500_PCI_PHYS_ADDR,
  95                 .end    = AU1500_PCI_PHYS_ADDR + 0xfff,
  96                 .flags  = IORESOURCE_MEM,
  97         },
  98 };
  99
 100 static struct alchemy_pci_platdata db1500_pci_pd = {
 101         .board_map_irq  = db1500_map_pci_irq,
 102 };
 103
 104 static struct platform_device db1500_pci_host_dev = {
 105         .dev.platform_data = &db1500_pci_pd,
 106         .name           = "alchemy-pci",
 107         .id             = 0,
 108         .num_resources  = ARRAY_SIZE(alchemy_pci_host_res),
 109         .resource       = alchemy_pci_host_res,
 110 };
 111
 112 static int __init db1500_pci_init(void)
 113 {
 114         if (BCSR_WHOAMI_BOARD(bcsr_read(BCSR_WHOAMI)) == BCSR_WHOAMI_DB1500)
 115                 return platform_device_register(&db1500_pci_host_dev);
 116         return 0;
 117 }
 118 /* must be arch_initcall; MIPS PCI scans busses in a subsys_initcall */
 119 arch_initcall(db1500_pci_init);
 120
 121
 122 static struct resource au1100_lcd_resources[] = {
 123         [0] = {
 124                 .start  = AU1100_LCD_PHYS_ADDR,
 125                 .end    = AU1100_LCD_PHYS_ADDR + 0x800 - 1,
 126                 .flags  = IORESOURCE_MEM,
 127         },
 128         [1] = {
 129                 .start  = AU1100_LCD_INT,
 130                 .end    = AU1100_LCD_INT,
 131                 .flags  = IORESOURCE_IRQ,
 132         }
 133 };
 134
 135 static u64 au1100_lcd_dmamask = DMA_BIT_MASK(32);
 136
 137 static struct platform_device au1100_lcd_device = {
 138         .name           = "au1100-lcd",
 139         .id             = 0,
 140         .dev = {
 141                 .dma_mask               = &au1100_lcd_dmamask,
 142                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 143         },
 144         .num_resources  = ARRAY_SIZE(au1100_lcd_resources),
 145         .resource       = au1100_lcd_resources,
 146 };
 147
 148 static struct resource alchemy_ac97c_res[] = {
 149         [0] = {
 150                 .start  = AU1000_AC97_PHYS_ADDR,
 151                 .end    = AU1000_AC97_PHYS_ADDR + 0xfff,
 152                 .flags  = IORESOURCE_MEM,
 153         },
 154         [1] = {
 155                 .start  = DMA_ID_AC97C_TX,
 156                 .end    = DMA_ID_AC97C_TX,
 157                 .flags  = IORESOURCE_DMA,
 158         },
 159         [2] = {
 160                 .start  = DMA_ID_AC97C_RX,
 161                 .end    = DMA_ID_AC97C_RX,
 162                 .flags  = IORESOURCE_DMA,
 163         },
 164 };
 165
 166 static struct platform_device alchemy_ac97c_dev = {
 167         .name           = "alchemy-ac97c",
 168         .id             = -1,
 169         .resource       = alchemy_ac97c_res,
 170         .num_resources  = ARRAY_SIZE(alchemy_ac97c_res),
 171 };
 172
 173 static struct platform_device alchemy_ac97c_dma_dev = {
 174         .name           = "alchemy-pcm-dma",
 175         .id             = 0,
 176 };
 177
 178 static struct platform_device db1x00_codec_dev = {
 179         .name           = "ac97-codec",
 180         .id             = -1,
 181 };
 182
 183 static struct platform_device db1x00_audio_dev = {
 184         .name           = "db1000-audio",
 185 };
 186
 187 /******************************************************************************/
 188
 189 static irqreturn_t db1100_mmc_cd(int irq, void *ptr)
 190 {
 191         void (*mmc_cd)(struct mmc_host *, unsigned long);
 192         /* link against CONFIG_MMC=m */
 193         mmc_cd = symbol_get(mmc_detect_change);
 194         mmc_cd(ptr, msecs_to_jiffies(500));
 195         symbol_put(mmc_detect_change);
 196
 197         return IRQ_HANDLED;
 198 }
 199
 200 static int db1100_mmc_cd_setup(void *mmc_host, int en)
 201 {
 202         int ret = 0;
 203
 204         if (en) {
 205                 irq_set_irq_type(AU1100_GPIO19_INT, IRQ_TYPE_EDGE_BOTH);
 206                 ret = request_irq(AU1100_GPIO19_INT, db1100_mmc_cd, 0,
 207                                   "sd0_cd", mmc_host);
 208         } else
 209                 free_irq(AU1100_GPIO19_INT, mmc_host);
 210         return ret;
 211 }
 212
 213 static int db1100_mmc1_cd_setup(void *mmc_host, int en)
 214 {
 215         int ret = 0;
 216
 217         if (en) {
 218                 irq_set_irq_type(AU1100_GPIO20_INT, IRQ_TYPE_EDGE_BOTH);
 219                 ret = request_irq(AU1100_GPIO20_INT, db1100_mmc_cd, 0,
 220                                   "sd1_cd", mmc_host);
 221         } else
 222                 free_irq(AU1100_GPIO20_INT, mmc_host);
 223         return ret;
 224 }
 225
 226 static int db1100_mmc_card_readonly(void *mmc_host)
 227 {
 228         /* testing suggests that this bit is inverted */
 229         return (bcsr_read(BCSR_STATUS) & BCSR_STATUS_SD0WP) ? 0 : 1;
 230 }
 231
 232 static int db1100_mmc_card_inserted(void *mmc_host)
 233 {
 234         return !alchemy_gpio_get_value(19);
 235 }
 236
 237 static void db1100_mmc_set_power(void *mmc_host, int state)
 238 {
 239         if (state) {
 240                 bcsr_mod(BCSR_BOARD, 0, BCSR_BOARD_SD0PWR);
 241                 msleep(400);    /* stabilization time */
 242         } else
 243                 bcsr_mod(BCSR_BOARD, BCSR_BOARD_SD0PWR, 0);
 244 }
 245
 246 static void db1100_mmcled_set(struct led_classdev *led, enum led_brightness b)
 247 {
 248         if (b != LED_OFF)
 249                 bcsr_mod(BCSR_LEDS, BCSR_LEDS_LED0, 0);
 250         else
 251                 bcsr_mod(BCSR_LEDS, 0, BCSR_LEDS_LED0);
 252 }
 253
 254 static struct led_classdev db1100_mmc_led = {
 255         .brightness_set = db1100_mmcled_set,
 256 };
 257
 258 static int db1100_mmc1_card_readonly(void *mmc_host)
 259 {
 260         return (bcsr_read(BCSR_BOARD) & BCSR_BOARD_SD1WP) ? 1 : 0;
 261 }
 262
 263 static int db1100_mmc1_card_inserted(void *mmc_host)
 264 {
 265         return !alchemy_gpio_get_value(20);
 266 }
 267
 268 static void db1100_mmc1_set_power(void *mmc_host, int state)
 269 {
 270         if (state) {
 271                 bcsr_mod(BCSR_BOARD, 0, BCSR_BOARD_SD1PWR);
 272                 msleep(400);    /* stabilization time */
 273         } else
 274                 bcsr_mod(BCSR_BOARD, BCSR_BOARD_SD1PWR, 0);
 275 }
 276
 277 static void db1100_mmc1led_set(struct led_classdev *led, enum led_brightness b)
 278 {
 279         if (b != LED_OFF)
 280                 bcsr_mod(BCSR_LEDS, BCSR_LEDS_LED1, 0);
 281         else
 282                 bcsr_mod(BCSR_LEDS, 0, BCSR_LEDS_LED1);
 283 }
 284
 285 static struct led_classdev db1100_mmc1_led = {
 286         .brightness_set = db1100_mmc1led_set,
 287 };
 288
 289 static struct au1xmmc_platform_data db1100_mmc_platdata[2] = {
 290         [0] = {
 291                 .cd_setup       = db1100_mmc_cd_setup,
 292                 .set_power      = db1100_mmc_set_power,
 293                 .card_inserted  = db1100_mmc_card_inserted,
 294                 .card_readonly  = db1100_mmc_card_readonly,
 295                 .led            = &db1100_mmc_led,
 296         },
 297         [1] = {
 298                 .cd_setup       = db1100_mmc1_cd_setup,
 299                 .set_power      = db1100_mmc1_set_power,
 300                 .card_inserted  = db1100_mmc1_card_inserted,
 301                 .card_readonly  = db1100_mmc1_card_readonly,
 302                 .led            = &db1100_mmc1_led,
 303         },
 304 };
 305
 306 static struct resource au1100_mmc0_resources[] = {
 307         [0] = {
 308                 .start  = AU1100_SD0_PHYS_ADDR,
 309                 .end    = AU1100_SD0_PHYS_ADDR + 0xfff,
 310                 .flags  = IORESOURCE_MEM,
 311         },
 312         [1] = {
 313                 .start  = AU1100_SD_INT,
 314                 .end    = AU1100_SD_INT,
 315                 .flags  = IORESOURCE_IRQ,
 316         },
 317         [2] = {
 318                 .start  = DMA_ID_SD0_TX,
 319                 .end    = DMA_ID_SD0_TX,
 320                 .flags  = IORESOURCE_DMA,
 321         },
 322         [3] = {
 323                 .start  = DMA_ID_SD0_RX,
 324                 .end    = DMA_ID_SD0_RX,
 325                 .flags  = IORESOURCE_DMA,
 326         }
 327 };
 328
 329 static u64 au1xxx_mmc_dmamask =  DMA_BIT_MASK(32);
 330
 331 static struct platform_device db1100_mmc0_dev = {
 332         .name           = "au1xxx-mmc",
 333         .id             = 0,
 334         .dev = {
 335                 .dma_mask               = &au1xxx_mmc_dmamask,
 336                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 337                 .platform_data          = &db1100_mmc_platdata[0],
 338         },
 339         .num_resources  = ARRAY_SIZE(au1100_mmc0_resources),
 340         .resource       = au1100_mmc0_resources,
 341 };
 342
 343 static struct resource au1100_mmc1_res[] = {
 344         [0] = {
 345                 .start  = AU1100_SD1_PHYS_ADDR,
 346                 .end    = AU1100_SD1_PHYS_ADDR + 0xfff,
 347                 .flags  = IORESOURCE_MEM,
 348         },
 349         [1] = {
 350                 .start  = AU1100_SD_INT,
 351                 .end    = AU1100_SD_INT,
 352                 .flags  = IORESOURCE_IRQ,
 353         },
 354         [2] = {
 355                 .start  = DMA_ID_SD1_TX,
 356                 .end    = DMA_ID_SD1_TX,
 357                 .flags  = IORESOURCE_DMA,
 358         },
 359         [3] = {
 360                 .start  = DMA_ID_SD1_RX,
 361                 .end    = DMA_ID_SD1_RX,
 362                 .flags  = IORESOURCE_DMA,
 363         }
 364 };
 365
 366 static struct platform_device db1100_mmc1_dev = {
 367         .name           = "au1xxx-mmc",
 368         .id             = 1,
 369         .dev = {
 370                 .dma_mask               = &au1xxx_mmc_dmamask,
 371                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 372                 .platform_data          = &db1100_mmc_platdata[1],
 373         },
 374         .num_resources  = ARRAY_SIZE(au1100_mmc1_res),
 375         .resource       = au1100_mmc1_res,
 376 };
 377
 378 /******************************************************************************/
 379
 380 static void db1000_irda_set_phy_mode(int mode)
 381 {
 382         unsigned short mask = BCSR_RESETS_IRDA_MODE_MASK | BCSR_RESETS_FIR_SEL;
 383
 384         switch (mode) {
 385         case AU1000_IRDA_PHY_MODE_OFF:
 386                 bcsr_mod(BCSR_RESETS, mask, BCSR_RESETS_IRDA_MODE_OFF);
 387                 break;
 388         case AU1000_IRDA_PHY_MODE_SIR:
 389                 bcsr_mod(BCSR_RESETS, mask, BCSR_RESETS_IRDA_MODE_FULL);
 390                 break;
 391         case AU1000_IRDA_PHY_MODE_FIR:
 392                 bcsr_mod(BCSR_RESETS, mask, BCSR_RESETS_IRDA_MODE_FULL |
 393                                             BCSR_RESETS_FIR_SEL);
 394                 break;
 395         }
 396 }
 397
 398 static struct au1k_irda_platform_data db1000_irda_platdata = {
 399         .set_phy_mode   = db1000_irda_set_phy_mode,
 400 };
 401
 402 static struct resource au1000_irda_res[] = {
 403         [0] = {
 404                 .start  = AU1000_IRDA_PHYS_ADDR,
 405                 .end    = AU1000_IRDA_PHYS_ADDR + 0x0fff,
 406                 .flags  = IORESOURCE_MEM,
 407         },
 408         [1] = {
 409                 .start  = AU1000_IRDA_TX_INT,
 410                 .end    = AU1000_IRDA_TX_INT,
 411                 .flags  = IORESOURCE_IRQ,
 412         },
 413         [2] = {
 414                 .start  = AU1000_IRDA_RX_INT,
 415                 .end    = AU1000_IRDA_RX_INT,
 416                 .flags  = IORESOURCE_IRQ,
 417         },
 418 };
 419
 420 static struct platform_device db1000_irda_dev = {
 421         .name   = "au1000-irda",
 422         .id     = -1,
 423         .dev    = {
 424                 .platform_data = &db1000_irda_platdata,
 425         },
 426         .resource       = au1000_irda_res,
 427         .num_resources  = ARRAY_SIZE(au1000_irda_res),
 428 };
 429
 430 /******************************************************************************/
 431
 432 static struct ads7846_platform_data db1100_touch_pd = {
 433         .model          = 7846,
 434         .vref_mv        = 3300,
 435         .gpio_pendown   = 21,
 436 };
 437
 438 static struct spi_gpio_platform_data db1100_spictl_pd = {
 439         .sck            = 209,
 440         .mosi           = 208,
 441         .miso           = 207,
 442         .num_chipselect = 1,
 443 };
 444
 445 static struct spi_board_info db1100_spi_info[] __initdata = {
 446         [0] = {
 447                 .modalias        = "ads7846",
 448                 .max_speed_hz    = 3250000,
 449                 .bus_num         = 0,
 450                 .chip_select     = 0,
 451                 .mode            = 0,
 452                 .irq             = AU1100_GPIO21_INT,
 453                 .platform_data   = &db1100_touch_pd,
 454                 .controller_data = (void *)210, /* for spi_gpio: CS# GPIO210 */
 455         },
 456 };
 457
 458 static struct platform_device db1100_spi_dev = {
 459         .name           = "spi_gpio",
 460         .id             = 0,
 461         .dev            = {
 462                 .platform_data  = &db1100_spictl_pd,
 463         },
 464 };
 465
 466
 467 static struct platform_device *db1x00_devs[] = {
 468         &db1x00_codec_dev,
 469         &alchemy_ac97c_dma_dev,
 470         &alchemy_ac97c_dev,
 471         &db1x00_audio_dev,
 472 };
 473
 474 static struct platform_device *db1000_devs[] = {
 475         &db1000_irda_dev,
 476 };
 477
 478 static struct platform_device *db1100_devs[] = {
 479         &au1100_lcd_device,
 480         &db1100_mmc0_dev,
 481         &db1100_mmc1_dev,
 482         &db1000_irda_dev,
 483         &db1100_spi_dev,
 484 };
 485
 486 static int __init db1000_dev_init(void)
 487 {
 488         int board = BCSR_WHOAMI_BOARD(bcsr_read(BCSR_WHOAMI));
 489         int c0, c1, d0, d1, s0, s1;
 490         unsigned long pfc;
 491
 492         if (board == BCSR_WHOAMI_DB1500) {
 493                 c0 = AU1500_GPIO2_INT;
 494                 c1 = AU1500_GPIO5_INT;
 495                 d0 = AU1500_GPIO0_INT;
 496                 d1 = AU1500_GPIO3_INT;
 497                 s0 = AU1500_GPIO1_INT;
 498                 s1 = AU1500_GPIO4_INT;
 499         } else if (board == BCSR_WHOAMI_DB1100) {
 500                 c0 = AU1100_GPIO2_INT;
 501                 c1 = AU1100_GPIO5_INT;
 502                 d0 = AU1100_GPIO0_INT;
 503                 d1 = AU1100_GPIO3_INT;
 504                 s0 = AU1100_GPIO1_INT;
 505                 s1 = AU1100_GPIO4_INT;
 506
 507                 gpio_direction_input(19);       /* sd0 cd# */
 508                 gpio_direction_input(20);       /* sd1 cd# */
 509                 gpio_direction_input(21);       /* touch pendown# */
 510                 gpio_direction_input(207);      /* SPI MISO */
 511                 gpio_direction_output(208, 0);  /* SPI MOSI */
 512                 gpio_direction_output(209, 1);  /* SPI SCK */
 513                 gpio_direction_output(210, 1);  /* SPI CS# */
 514
 515                 /* spi_gpio on SSI0 pins */
 516                 pfc = __raw_readl((void __iomem *)SYS_PINFUNC);
 517                 pfc |= (1 << 0);        /* SSI0 pins as GPIOs */
 518                 __raw_writel(pfc, (void __iomem *)SYS_PINFUNC);
 519                 wmb();
 520
 521                 spi_register_board_info(db1100_spi_info,
 522                                         ARRAY_SIZE(db1100_spi_info));
 523
 524                 platform_add_devices(db1100_devs, ARRAY_SIZE(db1100_devs));
 525         } else if (board == BCSR_WHOAMI_DB1000) {
 526                 c0 = AU1000_GPIO2_INT;
 527                 c1 = AU1000_GPIO5_INT;
 528                 d0 = AU1000_GPIO0_INT;
 529                 d1 = AU1000_GPIO3_INT;
 530                 s0 = AU1000_GPIO1_INT;
 531                 s1 = AU1000_GPIO4_INT;
 532                 platform_add_devices(db1000_devs, ARRAY_SIZE(db1000_devs));
 533         } else
 534                 return 0; /* unknown board, no further dev setup to do */
 535
 536         irq_set_irq_type(d0, IRQ_TYPE_EDGE_BOTH);
 537         irq_set_irq_type(d1, IRQ_TYPE_EDGE_BOTH);
 538         irq_set_irq_type(c0, IRQ_TYPE_LEVEL_LOW);
 539         irq_set_irq_type(c1, IRQ_TYPE_LEVEL_LOW);
 540         irq_set_irq_type(s0, IRQ_TYPE_LEVEL_LOW);
 541         irq_set_irq_type(s1, IRQ_TYPE_LEVEL_LOW);
 542
 543         db1x_register_pcmcia_socket(
 544                 AU1000_PCMCIA_ATTR_PHYS_ADDR,
 545                 AU1000_PCMCIA_ATTR_PHYS_ADDR + 0x000400000 - 1,
 546                 AU1000_PCMCIA_MEM_PHYS_ADDR,
 547                 AU1000_PCMCIA_MEM_PHYS_ADDR  + 0x000400000 - 1,
 548                 AU1000_PCMCIA_IO_PHYS_ADDR,
 549                 AU1000_PCMCIA_IO_PHYS_ADDR   + 0x000010000 - 1,
 550                 c0, d0, /*s0*/0, 0, 0);
 551
 552         db1x_register_pcmcia_socket(
 553                 AU1000_PCMCIA_ATTR_PHYS_ADDR + 0x004000000,
 554                 AU1000_PCMCIA_ATTR_PHYS_ADDR + 0x004400000 - 1,
 555                 AU1000_PCMCIA_MEM_PHYS_ADDR  + 0x004000000,
 556                 AU1000_PCMCIA_MEM_PHYS_ADDR  + 0x004400000 - 1,
 557                 AU1000_PCMCIA_IO_PHYS_ADDR   + 0x004000000,
 558                 AU1000_PCMCIA_IO_PHYS_ADDR   + 0x004010000 - 1,
 559                 c1, d1, /*s1*/0, 0, 1);
 560
 561         platform_add_devices(db1x00_devs, ARRAY_SIZE(db1x00_devs));
 562         db1x_register_norflash(32 << 20, 4 /* 32bit */, F_SWAPPED);
 563         return 0;
 564 }
 565 device_initcall(db1000_dev_init);