drivers/media/common/tuners/tda18218_priv.h

   1 /*
   2  * NXP TDA18218HN silicon tuner driver
   3  *
   4  * Copyright (C) 2010 Antti Palosaari <crope@iki.fi>
   5  *
   6  *    This program is free software; you can redistribute it and/or modify
   7  *    it under the terms of the GNU General Public License as published by
   8  *    the Free Software Foundation; either version 2 of the License, or
   9  *    (at your option) any later version.
  10  *
  11  *    This program is distributed in the hope that it will be useful,
  12  *    but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  *    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  *    GNU General Public License for more details.
  15  *
  16  *    You should have received a copy of the GNU General Public License
  17  *    along with this program; if not, write to the Free Software
  18  *    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  19  */
  20
  21 #ifndef TDA18218_PRIV_H
  22 #define TDA18218_PRIV_H
  23
  24 #define LOG_PREFIX "tda18218"
  25
  26 #undef dbg
  27 #define dbg(f, arg...) \
  28         if (debug) \
  29                 printk(KERN_DEBUG   LOG_PREFIX": " f "\n" , ## arg)
  30 #undef err
  31 #define err(f, arg...)  printk(KERN_ERR     LOG_PREFIX": " f "\n" , ## arg)
  32 #undef info
  33 #define info(f, arg...) printk(KERN_INFO    LOG_PREFIX": " f "\n" , ## arg)
  34 #undef warn
  35 #define warn(f, arg...) printk(KERN_WARNING LOG_PREFIX": " f "\n" , ## arg)
  36
  37 #define R00_ID         0x00     /* ID byte */
  38 #define R01_R1         0x01     /* Read byte 1 */
  39 #define R02_R2         0x02     /* Read byte 2 */
  40 #define R03_R3         0x03     /* Read byte 3 */
  41 #define R04_R4         0x04     /* Read byte 4 */
  42 #define R05_R5         0x05     /* Read byte 5 */
  43 #define R06_R6         0x06     /* Read byte 6 */
  44 #define R07_MD1        0x07     /* Main divider byte 1 */
  45 #define R08_PSM1       0x08     /* PSM byte 1 */
  46 #define R09_MD2        0x09     /* Main divider byte 2 */
  47 #define R0A_MD3        0x0a     /* Main divider byte 1 */
  48 #define R0B_MD4        0x0b     /* Main divider byte 4 */
  49 #define R0C_MD5        0x0c     /* Main divider byte 5 */
  50 #define R0D_MD6        0x0d     /* Main divider byte 6 */
  51 #define R0E_MD7        0x0e     /* Main divider byte 7 */
  52 #define R0F_MD8        0x0f     /* Main divider byte 8 */
  53 #define R10_CD1        0x10     /* Call divider byte 1 */
  54 #define R11_CD2        0x11     /* Call divider byte 2 */
  55 #define R12_CD3        0x12     /* Call divider byte 3 */
  56 #define R13_CD4        0x13     /* Call divider byte 4 */
  57 #define R14_CD5        0x14     /* Call divider byte 5 */
  58 #define R15_CD6        0x15     /* Call divider byte 6 */
  59 #define R16_CD7        0x16     /* Call divider byte 7 */
  60 #define R17_PD1        0x17     /* Power-down byte 1 */
  61 #define R18_PD2        0x18     /* Power-down byte 2 */
  62 #define R19_XTOUT      0x19     /* XTOUT byte */
  63 #define R1A_IF1        0x1a     /* IF byte 1 */
  64 #define R1B_IF2        0x1b     /* IF byte 2 */
  65 #define R1C_AGC2B      0x1c     /* AGC2b byte */
  66 #define R1D_PSM2       0x1d     /* PSM byte 2 */
  67 #define R1E_PSM3       0x1e     /* PSM byte 3 */
  68 #define R1F_PSM4       0x1f     /* PSM byte 4 */
  69 #define R20_AGC11      0x20     /* AGC1 byte 1 */
  70 #define R21_AGC12      0x21     /* AGC1 byte 2 */
  71 #define R22_AGC13      0x22     /* AGC1 byte 3 */
  72 #define R23_AGC21      0x23     /* AGC2 byte 1 */
  73 #define R24_AGC22      0x24     /* AGC2 byte 2 */
  74 #define R25_AAGC       0x25     /* Analog AGC byte */
  75 #define R26_RC         0x26     /* RC byte */
  76 #define R27_RSSI       0x27     /* RSSI byte */
  77 #define R28_IRCAL1     0x28     /* IR CAL byte 1 */
  78 #define R29_IRCAL2     0x29     /* IR CAL byte 2 */
  79 #define R2A_IRCAL3     0x2a     /* IR CAL byte 3 */
  80 #define R2B_IRCAL4     0x2b     /* IR CAL byte 4 */
  81 #define R2C_RFCAL1     0x2c     /* RF CAL byte 1 */
  82 #define R2D_RFCAL2     0x2d     /* RF CAL byte 2 */
  83 #define R2E_RFCAL3     0x2e     /* RF CAL byte 3 */
  84 #define R2F_RFCAL4     0x2f     /* RF CAL byte 4 */
  85 #define R30_RFCAL5     0x30     /* RF CAL byte 5 */
  86 #define R31_RFCAL6     0x31     /* RF CAL byte 6 */
  87 #define R32_RFCAL7     0x32     /* RF CAL byte 7 */
  88 #define R33_RFCAL8     0x33     /* RF CAL byte 8 */
  89 #define R34_RFCAL9     0x34     /* RF CAL byte 9 */
  90 #define R35_RFCAL10    0x35     /* RF CAL byte 10 */
  91 #define R36_RFCALRAM1  0x36     /* RF CAL RAM byte 1 */
  92 #define R37_RFCALRAM2  0x37     /* RF CAL RAM byte 2 */
  93 #define R38_MARGIN     0x38     /* Margin byte */
  94 #define R39_FMAX1      0x39     /* Fmax byte 1 */
  95 #define R3A_FMAX2      0x3a     /* Fmax byte 2 */
  96
  97 #define TDA18218_NUM_REGS 59
  98
  99 struct tda18218_priv {
 100         struct tda18218_config *cfg;
 101         struct i2c_adapter *i2c;
 102
 103         u32 if_frequency;
 104
 105         u8 regs[TDA18218_NUM_REGS];
 106 };
 107
 108 #endif